Patents by Inventor Steven Teig

Steven Teig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Runtime loading of configuration data in a configurable IC
    Patent number: 7492186
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: February 17, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Operational Cycle Assignment in a Configurable IC
    Publication number: 20090037862
    Abstract: Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.
    Type: Application
    Filed: August 18, 2008
    Publication date: February 5, 2009
    Inventors: Andre Rohe, Steven Teig
  • DYNAMICALLY TRACKING DATA VALUES IN A CONFIGURABLE IC
    Publication number: 20090002020
    Abstract: Some embodiments provide a method of dynamically tracking data values in a configurable integrated circuit (IC). The method, during a run time of the configurable IC, receives a request for a data value and dynamically configures the configurable IC to monitor the data value. In some embodiments, the method, in dynamically configuring the configurable IC, dynamically configures a debug network of the configurable IC. In some such embodiments, the method, in dynamically configuring the configurable IC, further dynamically configures a set of configurable routing circuits of the configurable IC. In some embodiments the configuration is performed while the IC is implementing a user design circuit.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Brad Hutchings, Steven Teig
  • RETRIEVING DATA FROM A CONFIGURABLE IC
    Publication number: 20090002016
    Abstract: Some embodiments provide a configurable integrated circuit (IC). The IC has configurable logic circuits for performing logical operations, configurable routing circuits for routing signals between the configurable logic circuits, and a network for monitoring data. In some embodiments a method uses at least a subset of the configurable logic circuits and a first subset of the configurable routing circuits to implement a user design circuit on the configurable IC. The method uses a second subset of the configurable routing circuits to pass signals to the network.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Brad Hutchings, Steven Teig, Herman Schmit, Jason Redgrave
  • TRANSLATING A USER DESIGN IN A CONFIGURABLE IC FOR DEBUGGING THE USER DESIGN
    Publication number: 20090007027
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit elements(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • RESTRUCTURING DATA FROM A TRACE BUFFER OF A CONFIGURABLE IC
    Publication number: 20090002021
    Abstract: Some embodiments provide a method that outputs from a configurable IC a first set of data bits from a trace buffer. Each bit of the first set of data bits is simultaneously generated in the configurable circuits and, in some embodiments, multiple data bits of the first set of data bits do not reach the traced buffer simultaneously. The method also determines a set of relative delays for the first set of data bits and arranges the first set of data bits into a second set of data bits by compensating for the relative delays.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Brad Hutchings, Steven Teig, Amit Gupta
  • Configurable integrated circuit with offset connections
    Patent number: 7468614
    Abstract: Some embodiments of the invention provide an configurable integrated circuit (“IC”). This IC has at least fifty configurable nodes arranged in an array that several rows and columns. The IC also has several direct offset connections, where each particular direct offset connection connects two offset nodes that are neither in the same column nor in the same row in the array. In some embodiments, several direct connections do not include any intervening circuits. On the other hand, in some embodiments, several direct connections have intervening circuits, which differ from the nodes in the array.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: December 23, 2008
    Assignee: Tabula, Inc.
    Inventors: Andre Rohe, Steven Teig
  • Operational Cycle Assignment in a Configurable IC
    Publication number: 20080307380
    Abstract: Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.
    Type: Application
    Filed: August 18, 2008
    Publication date: December 11, 2008
    Inventors: Andre Rohe, Steven Teig
  • Operational Cycle Assignment in a Configurable IC
    Publication number: 20080307378
    Abstract: Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.
    Type: Application
    Filed: August 18, 2008
    Publication date: December 11, 2008
    Inventors: Andre Rohe, Steven Teig
  • VPA logic circuits
    Patent number: 7449915
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes first and second circuits. The first circuit is a logic circuit for receiving configuration data sets and performing at least a first function when receiving a first configuration data set and a second function when receiving a second configuration data set. The second circuit communicatively couples to the first logic circuit. The second circuit is for supplying configuration data sets to the first logic circuit. The second circuit has a first set of input terminals. The integrated circuit also has a second set of input terminals for carrying data. Several the second set of input terminals overlap several of the first set of input terminals. The IC also has a set of vias, where each via connects an input terminal in the first set with an input terminal in the second set.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: November 11, 2008
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Steven Teig
  • Random access of user design states in a configurable IC
    Publication number: 20080272802
    Abstract: Some embodiments of the invention is a configurable integrated circuit (IC) that includes (1) several configurable logic circuits, (2) a first routing network for connecting the configurable logic circuits, (3) several user design state (UDS) circuits, and (4) a second network communicatively coupled to the UDS circuits. In least one period during the operation of the IC, the second network receives addresses for a several UDS circuits in a random access manner. In some embodiments, the second network is a debug network for reading randomly state values stored by the addressed UDS circuits during the user-design operation of the IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: November 6, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Steven Teig, Herman Schmit
  • RUNTIME LOADING OF CONFIGURATION DATA IN A CONFIGURABLE IC
    Publication number: 20080272801
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: March 13, 2006
    Publication date: November 6, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • RUNTIME LOADING OF CONFIGURATION DATA IN A CONFIGURABLE IC
    Publication number: 20080258761
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubehandani, Herman Schmit, Steven Teig
  • Configurable logic circuits with commutative properties
    Patent number: 7439766
    Abstract: Some embodiments of the invention provide a configurable logic circuit. The logic circuits has inputs for receiving input data. It also has a first connecting circuit for receiving configuration data and at least a portion of the input data. Based at least partially on the received portion of the input data, the first connecting circuit selects configuration data sub-sets. The logic circuit also includes a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing the output data. At least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce output data.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: October 21, 2008
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig
  • Configurable IC Having A Routing Fabric With Storage Elements
    Publication number: 20080231314
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Application
    Filed: May 27, 2007
    Publication date: September 25, 2008
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Configurable IC Having A Routing Fabric With Storage Elements
    Publication number: 20080231315
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Application
    Filed: May 27, 2007
    Publication date: September 25, 2008
    Inventor: Steven Teig
  • Operational cycle assignment in a configurable IC
    Patent number: 7428721
    Abstract: Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: September 23, 2008
    Assignee: Tabula, Inc.
    Inventors: Andre Rohe, Steven Teig
  • Configurable circuits, IC's, and systems
    Patent number: 7425841
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 16, 2008
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Checkpointing user design states in a configurable IC
    Publication number: 20080222465
    Abstract: Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 11, 2008
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig, Tom Kronmiller
  • Accessing multiple user states concurrently in a configurable IC
    Publication number: 20080191735
    Abstract: Some embodiments of the invention provide a configuration/debug network for configuring and debugging a configurable integrated circuit (IC). The configurable IC in some embodiments includes configurable resources (e.g., configurable logic resources, routing resources, memory resources, etc.) that can be grouped in conceptual configurable tiles that are arranged in several rows and columns. Some embodiments allow tiles to be individually addressed, globally addressed (i.e., all addressed together), or addressed based on their tile types. The configurable IC includes numerous user-design state elements (“UDS elements”) in some embodiments. In some embodiments, the configuration/debug network has a streaming mode that can direct various circuits in one or more configurable tiles to stream out their data during the operation of the configurable IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: August 14, 2008
    Inventors: Jason Redgrave, Brad Hutchings, Steven Teig, Herman Schmit, Teju Khubchandani