Patents by Inventor Su-min Park

Su-min Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622340
    Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chanhee Jeong, Hyunki Kim, Junwoo Park, Byoung Wook Jang, Sunchul Kim, Su-Min Park, Pyoungwan Kim, Inku Kang, Heeyeol Kim
  • Publication number: 20200098734
    Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Inventors: CHANHEE JEONG, HYUNKI KIM, JUNWOO PARK, BYOUNG WOOK JANG, SUNCHUL KIM, SU-MIN PARK, PYOUNGWAN KIM, INKU KANG, HEEYEOL KIM
  • Patent number: 10593652
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 17, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu Kwon, Min-Ok Na, Sung-Woo Park, Ji-Hyun Park, Su-Min Park
  • Publication number: 20190319012
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Application
    Filed: June 21, 2019
    Publication date: October 17, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu KWON, Min-Ok NA, Sung-Woo Park, Ji-Hyun Park, Su-Min Park
  • Patent number: 10403606
    Abstract: A method for fabricating a semiconductor package including mounting a first semiconductor chip on a first substrate, disposing a first connector on the first substrate, placing a molding control film on the first semiconductor chip to horizontally extend over the first substrate, filling a space between the molding control film and the first substrate with a molding compound such that the molding compound contacts side surfaces of the first semiconductor chip and covers the first connector and does not cover a top surface of the first semiconductor chip, detaching the molding control film, forming an opening through the molding compound to expose a portion of the first connector, disposing a second connector and a second semiconductor chip on opposite surfaces of a second substrate, respectively, and placing the second substrate on the first substrate such that the second connector contacts the first connector may be provided.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: September 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu Kwon, Min-Ok Na, Sung-Woo Park, Ji-Hyun Park, Su-Min Park
  • Publication number: 20180331071
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Application
    Filed: May 4, 2018
    Publication date: November 15, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu KWON, Min-Ok NA, Sung-Woo PARK, Ji-Hyun PARK, Su-Min PARK
  • Patent number: 9985278
    Abstract: Disclosed is a high energy density lithium secondary battery including a cathode. The cathode contains, as cathode active materials, a first cathode active material having a layered structure and a second cathode active material having a spinel structure. The amount of the first cathode active material is between 40 and 100 wt % based on the total weight of the cathode active materials. The high density lithium secondary battery further comprises an anode, including crystalline graphite having a specific surface area (with respect to capacity) of 0.005 to 0.013 m2/mAh as an anode active material, as well as a separator.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: May 29, 2018
    Assignee: LG Chem, Ltd.
    Inventors: Chang Joo Han, KyungHee Han, Su-min Park, JiEun Lee
  • Publication number: 20180145061
    Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 24, 2018
    Inventors: CHANHEE JEONG, HYUNKI KIM, JUNWOO PARK, BYOUNG WOOK JANG, SUNCHUL KIM, SU-MIN PARK, PYOUNGWAN KIM, INKU KANG, HEEYEOL KIM
  • Patent number: 9978721
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: May 22, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu Kwon, Min-Ok Na, Sung-Woo Park, Ji-Hyun Park, Su-Min Park
  • Patent number: 9837272
    Abstract: In a method of manufacturing a semiconductor device, a mask layer and a first layer may be sequentially formed on a substrate. The first layer may be patterned by a photolithography process to form a first pattern. A silicon oxide layer may be formed on the first pattern. A coating pattern including silicon may be formed on the silicon oxide layer. The mask layer may be etched using a second pattern as an etching mask to form a mask pattern, and the second pattern may includes the first pattern, the silicon oxide layer and the coating pattern. The mask pattern may have a uniform size.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: December 5, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su-Min Park, Su-Min Kim, Hyo-Jin Yun, Hyun-Woo Kim, Kyoung-Seon Kim, Hai-Sub Na, Min-Ju Park, So-Ra Han
  • Patent number: 9812707
    Abstract: Disclosed is lithium iron phosphate having an olivine crystal structure, wherein the lithium iron phosphate has a composition represented by the following Formula 1 and carbon (C) is coated on the particle surface of the lithium iron phosphate containing a predetermined amount of sulfur (S). Li1+aFe1?xMx(PO4?b)Xb??(1) (wherein M, X, a, x, and b are the same as defined in the specification).
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: November 7, 2017
    Assignee: LG CHEM, LTD.
    Inventors: Hyun Kuk Noh, Hong Kyu Park, Cheol-Hee Park, Su-min Park, JiEun Lee
  • Patent number: 9773672
    Abstract: A method of manufacturing a semiconductor device, including forming an etching target film on a substrate; forming an anti-reflection film on the etching target film; forming a photoresist film on the anti-reflection film; exposing the photoresist film; performing heat treatment on the anti-reflection film and the photoresist film to form a covalent bond between the anti-reflection film and the photoresist film; and developing the photoresist film.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: September 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su-min Kim, Hyun-woo Kim, Hyo-jin Yun, Kyoung-seon Kim, Hai-sub Na, Su-min Park, So-ra Han
  • Patent number: 9613821
    Abstract: Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: April 4, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yool Kang, Dong-won Kim, Ju-young Kim, Tae-hoon Kim, Hye-ji Kim, Su-min Park, Hyung-rae Lee
  • Patent number: 9601756
    Abstract: High energy density lithium secondary batteries are disclosed herein. In some embodiments, a high energy density lithium secondary battery includes a cathode, an anode, and a separator. The cathode includes a first cathode active material having a layered structure and a second cathode active material having a spinel structure, wherein the amount of the first cathode active material is between 40 and 100 wt % based on the total weight of the cathode active materials. The anode includes crystalline graphite and amorphous carbon as anode active materials, wherein the amount of the crystalline graphite is between 40 and 100 wt % based on the total weight of the anode active materials.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: March 21, 2017
    Assignee: LG Chem, Ltd.
    Inventors: Kyunghee Han, Chang Joo Han, Su-min Park, Jieun Lee
  • Patent number: 9570304
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an anti-reflection layer on a lower layer, forming photoresist patterns on the anti-reflection layer, forming protection patterns to cover the photoresist patterns, respectively, etching the anti-reflection layer using the photoresist patterns covered with the protection patterns as an etch mask to form anti-reflection patterns, forming spacers to cover sidewalls of the anti-reflection patterns, and removing the anti-reflection patterns.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Ju Park, Haisub Na, Hyojin Yun, Kyoungseon Kim, Su Min Kim, Hyunwoo Kim, Su-min Park, So-Ra Han
  • Patent number: 9525167
    Abstract: Disclosed is a high-energy lithium secondary battery including: a cathode including, as cathode active materials, a first cathode active material represented by Formula 1 below and having a layered structure and a second cathode active material represented by Formula 2 below and having a spinel structure, wherein the amount of the first cathode active material is between 40 and 100 wt % based on a total weight of the cathode active materials; an anode including amorphous carbon having a capacity of 300 mAh/g or more; and a separator.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: December 20, 2016
    Assignee: LG Chem, Ltd.
    Inventors: Kyunghee Han, Chang Joo Han, Su-min Park, Jieun Lee
  • Publication number: 20160358893
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu KWON, Min-Ok NA, Sung-Woo PARK, Ji-Hyun PARK, Su-Min PARK
  • Publication number: 20160314970
    Abstract: In a method of manufacturing a semiconductor device, a mask layer and a first layer may be sequentially formed on a substrate. The first layer may be patterned by a photolithography process to form a first pattern. A silicon oxide layer may be formed on the first pattern. A coating pattern including silicon may be formed on the silicon oxide layer. The mask layer may be etched using a second pattern as an etching mask to form a mask pattern, and the second pattern may includes the first pattern, the silicon oxide layer and the coating pattern. The mask pattern may have a uniform size.
    Type: Application
    Filed: April 6, 2016
    Publication date: October 27, 2016
    Inventors: SU-MIN PARK, SU-MIN KIM, HYO-JIN YUN, HYUN-WOO KIM, KYOUNG-SEON KIM, HAI-SUB NA, MIN-JU PARK, SO-RA HAN
  • Publication number: 20160293417
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an anti-reflection layer on a lower layer, forming photoresist patterns on the anti-reflection layer, forming protection patterns to cover the photoresist patterns, respectively, etching the anti-reflection layer using the photoresist patterns covered with the protection patterns as an etch mask to form anti-reflection patterns, forming spacers to cover sidewalls of the anti-reflection patterns, and removing the anti-reflection patterns.
    Type: Application
    Filed: December 10, 2015
    Publication date: October 6, 2016
    Inventors: Min Ju Park, Haisub Na, Hyojin Yun, Kyoungseon Kim, Su Min Kim, Hyunwoo Kim, Su Min Park, So-Ra Han
  • Publication number: 20160288791
    Abstract: The present invention relates to an automatic driving system for a vehicle, and more specifically, to an automatic driving system for a vehicle which controls a vehicle to be automatically driven to a destination in consideration of traffic signals and peripheral vehicles or objects, when a driver sets the destination in a navigation device. To this end, the system according to the present invention comprises: a mapping module for setting a driving lane by receiving route information set in a navigation device installed in a vehicle and then, converting a distance, direction, and rotation angle to actual measurement data; and a driving control module for having a vehicle be driven along the driving lane set by the mapping module.
    Type: Application
    Filed: March 18, 2014
    Publication date: October 6, 2016
    Inventors: Young-II PARK, Su-Min PARK