Abstract: The present invention provides a process kit for a semiconductor processing chamber. The processing chamber is a vacuum processing chamber that includes a chamber body defining an interior processing region. The processing region receives a substrate for processing, and also supports equipment pieces of the process kit. The process kit includes a pumping liner configured to be placed within the processing region of the processing chamber, and a C-channel liner configured to be placed along an outer diameter of the pumping liner. The pumping liner and the C-channel liner have novel interlocking features designed to inhibit parasitic pumping of processing or cleaning gases from the processing region. The invention further provides a semiconductor processing chamber having an improved process kit, such as the kit described. In one arrangement, the chamber is a tandem processing chamber.

Abstract: We have traced the detachment of photoresist during development of patterned features in the range of about 90 nm and smaller to a combination of the reduced “foot print” of the pattern on the underlying substrate and to the contact angle between the underlying substrate surface and the developing reagent. By maintaining a contact angle of about 30 degrees or greater, the detachment of the photoresist from the underlying substrate can be avoided for photoresists including feature sizes in the range of about 90 nm. We have achieved an increased contact angle between the DARC surface and a water-based CAR photoresist developer while simultaneously reducing CAR poisoning by treating the surface of the DARC after film formation.

Abstract: A layer of antireflective coating (ARC) material for use in photolithographic processing. In one embodiment the ARC material has the formula SiwOxHy:Cz, where w, x, y and z represent the atomic percentage of silicon, oxygen, hydrogen and carbon, respectively, in the material and where w is between 35 and 55, x is between 35 and 55, y is between 4 and 15, z is between 0 and 3 and the atomic percentage of nitrogen in the material is less than or equal to 1 atomic percent.

Abstract: Methods are provided for depositing a dielectric material. The dielectric material may be used for an anti-reflective coating or as a hardmask. In one aspect, a method is provided for processing a substrate including introducing a processing gas comprising a silane-based compound and an oxygen and carbon containing compound to the processing chamber and reacting the processing gas to deposit a nitrogen-free dielectric material on the substrate. The dielectric material comprises silicon and oxygen. In another aspect, the dielectric material forms one or both layers in a dual layer anti-reflective coating.

Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.

Abstract: A layer of antireflective coating (ARC) material for use in photolithographic processing. In one embodiment the ARC material has the formula SiwOxHy:Cz, where w, x, y and z represent the atomic percentage of silicon, oxygen, hydrogen and carbon, respectively, in the material and where w is between 35 and 55, x is between 35 and 55, y is between 4 and 15, z is between 0 and 3 and the atomic percentage of nitrogen in the material is less than or equal to 1 atomic percent.

Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.

Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.

Abstract: Methods are provided for depositing a dielectric material. The dielectric material may be used for an anti-reflective coating or as a hardmask. In one aspect, a method is provided for processing a substrate including introducing a processing gas comprising a silane-based compound and an organosilicon compound to the processing chamber and reacting the processing gas to deposit a nitrogen-free dielectric material on the substrate. The dielectric material comprises silicon and oxygen.

Abstract: The present invention generally provides an improved process for depositing silicon carbide, using a silane-based material with certain process parameters, onto an electronic device, such as a semiconductor, that is useful for forming a suitable barrier layer, an etch stop, and a passivation layer for IC applications. As a barrier layer, in the preferred embodiment, the particular silicon carbide material is used to reduce the diffusion of copper and may also used to minimize the contribution of the barrier layer to the capacitive coupling between interconnect lines. It may also be used as an etch stop, for instance, below an intermetal dielectric (IMD) and especially if the IMD is a low k, silane-based IMD. In another embodiment, it may be used to provide a passivation layer, resistant to moisture and other adverse ambient conditions. Each of these aspects may be used in a dual damascene structure.

Abstract: A method and apparatus for reducing trapped charges in a semiconductor device having a first layer and a second layer, said method comprising the steps of providing said first layer, flowing a deposition, a dilution and a conversion gas upon said first layer thereby forming a transition layer, phasing out said flow of conversion gas and forming said second layer upon said transition layer. The deposition gas, dilution gas and conversion gas are preferably trimethylsilane, helium and N2O respectively. The method is performed via chemical vapor deposition or plasma enhanced chemical vapor deposition. The apparatus has a first insulating layer, a transition layer disposed upon said first layer and a second insulating layer disposed upon said transition layer. The transition layer improves the adhesion between said first insulating layer and said second insulating layer. A reduction in the amount of electrical charges (i.e.

Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.

Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.

Abstract: A method and apparatus for reducing trapped charges in a semiconductor device having a first layer and a second layer, said method comprising the steps of providing said first layer, flowing a deposition, a dilution and a conversion gas upon said first layer thereby forming a transition layer, phasing out said flow of conversion gas and forming said second layer upon said transition layer. The deposition gas, dilution gas and conversion gas are preferably trimethylsilane, helium and N2O respectively. The method is performed via chemical vapor deposition or plasma enhanced chemical vapor deposition. The apparatus has a first insulating layer, a transition layer disposed upon said first layer and a second insulating layer disposed upon said transition layer. The transition layer improves the adhesion between said first insulating layer and said second insulating layer. A reduction in the amount of electrical charges (i.e.

Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.

Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.