Patents by Inventor Sukesh Sandhu

Sukesh Sandhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6398923
    Abstract: An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.
    Type: Grant
    Filed: July 3, 2000
    Date of Patent: June 4, 2002
    Assignee: Micron Technology, Inc.
    Inventors: P. J. Ireland, Howard Rhodes, Sujit Sharan, Sukesh Sandhu, Tim O'Brien, Tim Johnson
  • Patent number: 6323085
    Abstract: A split-gate transistor having high coupling for use in flash memory, EPROMs, and EEPROMs. The transistor has a U-shaped floating gate and a U-shaped control gate, thereby significantly increasing the surface area of the gates and increasing the voltage coupling ratio. The high coupling permits the operation voltage to be reduced while increasing operation speed, and the configuration of the transistor gates allows their use in high density arrays without sacrificing speed or degrading operations. A process for forming such transistors is also disclosed, wherein a polysilicon layer is deposited and then etched so that nitride and polysilicon spacers may be formed in between portions of polysilicon which are then etched to form floating gates. The nitride portion of the spacers is removed, and then the dielectric and control gate layers are formed on the floating gates to yield an array of split-gate transistors.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: November 27, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Sukesh Sandhu, Gurtej S. Sandhu
  • Patent number: 6083358
    Abstract: An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: July 4, 2000
    Assignee: Micron Technology, Inc.
    Inventors: P. J. Ireland, Howard Rhodes, Sujit Sharan, Sukesh Sandhu, Tim O'Brien, Tim Johnson
  • Patent number: 5750012
    Abstract: An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: May 12, 1998
    Assignee: Micron Technology, Inc.
    Inventors: P. J. Ireland, Howard Rhodes, Sujit Sharan, Sukesh Sandhu, Tim O'Brien, Tim Johnson