Patents by Inventor Sun-ae Seo

Sun-ae Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7910232
    Abstract: Information storage devices and methods of manufacturing the same are provided. An information storage device includes a magnetic layer formed on an underlayer. The underlayer has at least one first region and at least one second region. The first and second regions have different crystallinity characteristics. The magnetic layer has at least one third region formed on the at least one first region and at least one fourth region formed on the at least one second region. The third and fourth regions have different magnetic anisotropic energy constants.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Chang-won Lee
  • Publication number: 20110063885
    Abstract: A memory cell includes: a memory cell array unit having a plurality of nano wires arranged vertically on a substrate, each of the plurality of nano wires having a plurality of domains for storing information; a nano wire selection unit formed on the substrate and configured to select at least one of the plurality of nano wires; a domain movement control unit formed on the substrate and configured to control a domain movement operation with respect to at least one of the plurality of nano wires; and a read/write control unit formed on the substrate and configured to control at least one of a read operation and a write operation with respect to at least one of the plurality of nano wires.
    Type: Application
    Filed: March 11, 2010
    Publication date: March 17, 2011
    Inventors: Ho-jung Kim, Jai-kwang Shin, Sun-ae Seo, Sung-chul Lee
  • Patent number: 7901586
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20110045318
    Abstract: A magnetic memory device includes a track in which different non-magnetic layers are respectively formed on upper and lower surfaces of a magnetic layer. One of the two non-magnetic layers includes an element having an atomic number greater than or equal to 12. Accordingly, the magnetic layer has a relatively high non-adiabaticity (?).
    Type: Application
    Filed: April 6, 2010
    Publication date: February 24, 2011
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Jin-seong Heo, Ji-young Bae
  • Publication number: 20110018647
    Abstract: An oscillator generates a signal using precession of a magnetic moment of a magnetic domain wall. The oscillator includes a free layer having the magnetic domain wall and a fixed layer corresponding to the magnetic domain wall. A non-magnetic separation layer is interposed between the free layer and the fixed layer.
    Type: Application
    Filed: December 29, 2009
    Publication date: January 27, 2011
    Inventors: Sung-chul Lee, Mathias Klaui, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Ji-young Bae, Jin-seong Heo
  • Publication number: 20100296347
    Abstract: Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 25, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoon-dong Park, Jo-won Lee, Chung-woo Kim, Eun-hong Lee, Sun-ae Seo, Woo-joo Kim, Hee-soon Chae, Soo-doo Chae, I-hun Song
  • Patent number: 7821809
    Abstract: A nonvolatile memory device including one resistor and one transistor. The resistor may correspond to a resistance layer electrically connected to a first impurity region and a second impurity region of the transistor.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Kyeong Yoo, Myoung-Jae Lee, Sun-Ae Seo, David Seo
  • Publication number: 20100232055
    Abstract: An information storage device includes a magnetic structure having a buffer track and a plurality of storage tracks connected to the buffer track. A write/read unit is disposed on the magnetic structure, and a plurality of switching devices are respectively connected to the buffer track, the plurality of storage tracks, and the write/read unit. The switching devices that are respectively connected to the buffer track and the storage tracks. The information storage device further includes a circuit configured to supply current to at least one of the magnetic structure and the write/read unit.
    Type: Application
    Filed: October 13, 2009
    Publication date: September 16, 2010
    Inventors: Sung-chul Lee, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Ji-young Bae, Jin-seong Heo
  • Patent number: 7796415
    Abstract: Provided are a magnetic layer, a method of forming the magnetic layer, an information storage device, and a method of manufacturing the information storage device. The information storage device may include a magnetic track having a plurality of magnetic domains, a current supply element connected to the magnetic layer and a reading/writing element. The magnetic track includes a hard magnetic track, and the hard magnetic track has a magnetization easy-axis extending in a direction parallel to a width of the hard magnetic track.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-Jin Cho, Kwang-seok Kim
  • Patent number: 7791923
    Abstract: A multi-bit memory cell stores information corresponding to a high resistive state and multiple other resistive states lower than the high resistive state. A resistance of a memory element within the multi-bit memory cell switches from the high resistive state to one of the other multiple resistive states by applying a corresponding current to the memory element.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Gyu Baek, Dong-Chul Kim, Jang-Eun Lee, Myoung-Jae Lee, Sun-Ae Seo, Hyeong-Jun Kim, Seung-Eon Ahn, Eun-Kyung Yim
  • Patent number: 7767502
    Abstract: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: August 3, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-young Kim, Wan-jun Park, Young-soo Park, June-key Lee, Yo-sep Min, Jang-yeon Kwon, Sun-ae Seo, Young-min Choi, Soo-doo Chae
  • Publication number: 20100172169
    Abstract: A magnetic structure includes a first portion and a plurality of second portions. The first portion extends in a first direction. The plurality of second portions extend from ends of the first portion in a second direction. The first and second directions are perpendicular to one another. Two magnetic domains magnetized in directions opposite to each other and a magnetic domain wall between the magnetic domains are formed in the magnetic structure.
    Type: Application
    Filed: July 7, 2009
    Publication date: July 8, 2010
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Ji-young Bae
  • Publication number: 20100157663
    Abstract: An information storage device includes a memory region having a magnetic track and a write/read unit, and a control circuit connected to the memory region. First and second switching devices are connected to both ends of the magnetic track, and a third switching device is connected to the write/read unit. The control circuit controls the first to third switching devices, and supplies operating current to at least one of the magnetic track and the write/read unit.
    Type: Application
    Filed: June 25, 2009
    Publication date: June 24, 2010
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ji-young Bae, Ung-hwan Pi, Hyung-soon Shin, Seung-jun Lee
  • Publication number: 20100149863
    Abstract: A magnetic track includes first and second magnetic domain regions having different lengths and different magnetic domain wall movement speeds. A longer of the first and second magnetic domain regions serves as an information read/write region. An information storage device includes a magnetic track. The magnetic track includes a plurality of magnetic domain regions and a magnetic domain wall region formed between neighboring magnetic domain regions. The plurality of magnetic domain regions includes a first magnetic domain region and at least one second magnetic domain region having a smaller length than the first magnetic domain region. The information storage device further includes a first unit configured to perform at least one of an information recording operation and an information reproducing operation on the first magnetic domain region, and a magnetic domain wall movement unit configured to move a magnetic domain wall of the magnetic domain wall region.
    Type: Application
    Filed: July 30, 2009
    Publication date: June 17, 2010
    Inventors: Sung-chul Lee, Jai-kwang Shin, Sun-ae Seo, Young-jin Cho, Ung-hwan Pl, Ji-young Bae
  • Publication number: 20100135059
    Abstract: Provided are information storage devices using movement of magnetic domain walls and methods of operating information storage devices. An information storage device includes a magnetic track and an operating unit. The magnetic track includes a plurality of magnetic domains separated by magnetic domain walls. The size of the operating unit is sufficient to cover at least two adjacent magnetic domains. And, the operating unit may be configured to write/read information to/from a single magnetic domain as well as a plurality of magnetic domains of the magnetic track.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 3, 2010
    Inventors: Ung-hwan Pi, Young-soo Park, Sun-ae Seo, Young-jin Cho, Sung-chul Lee, Ji-young Bae
  • Patent number: 7719871
    Abstract: Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: May 18, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-dong Park, Jo-won Lee, Chung-woo Kim, Eun-hong Lee, Sun-ae Seo, Woo-joo Kim, Hee-soon Chae, Soo-doo Chae, I-hun Song
  • Patent number: 7710757
    Abstract: Provided are a magnetic track using magnetic domain wall movement and an information storage device including the same. A magnetic track may comprise a zigzag shaped storage track including a plurality of first magnetic layers in parallel with each other, and stacked separate from each other, and a plurality of second magnetic layers for connecting the plurality of first magnetic layers. The information storage device may include the magnetic track having a plurality of magnetic domains, current applying device connected to the magnetic track, and a read/write device on a middle portion of the magnetic track.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-seok Kim, Sung-chul Lee, Sun-ae Seo
  • Publication number: 20100090759
    Abstract: A quantum interference transistor may include a source; a drain; N channels (N?2), between the source and the drain, and having N?1 path differences between the source and the drain; and at least one gate disposed at one or more of the N channels. One or more of the N channels may be formed in a graphene sheet. A method of manufacturing the quantum interference transistor may include forming one or more of the N channels using a graphene sheet. A method of operating the quantum interference transistor may include applying a voltage to the at least one gate. The voltage may shift a phase of a wave of electrons passing through a channel at which the at least one gate is disposed.
    Type: Application
    Filed: September 23, 2009
    Publication date: April 15, 2010
    Inventors: Jai-kwang Shin, Sun-ae Seo, Jong-seob Kim, Ki-ha Hong, Hyun-jong Chung
  • Patent number: 7672154
    Abstract: Provided are a semiconductor memory device and a method of programming the same. The semiconductor memory device includes a mode input value generating unit and a logic operating unit. The mode input value generating unit changes a connection state between input values of a current driving circuit so as to correspond to each of at least two operating modes, and defines a logic function of a magnetic memory cell connected to the current driving circuit in response to each operating mode. The logic operating unit performs a logic operation on the logic functions of at least two magnetic memory cells defined according to each of the operating modes and generates a result of logic operation.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: March 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Kee-won Kim, Kwang-seok Kim
  • Patent number: 7663136
    Abstract: Example embodiments relate to a method of manufacturing amorphous NiO thin films and nonvolatile memory devices including amorphous thin films that use a resistance material. Other example embodiments relate to a method of manufacturing amorphous NiO thin films having improved switching and resistance characteristics by reducing a leakage current and non-volatile memory devices using an amorphous NiO thin film. Provided is a method of manufacturing an amorphous NiO thin film having improved switching behavior by reducing leakage current and improving resistance characteristics. The method may include preparing a substrate in a vacuum chamber, preparing a nickel precursor material, preparing a source gas by vaporizing the nickel precursor material, preparing a reaction gas, preparing a purge gas and forming a monolayer NiO thin film on the substrate by performing one cycle of sequentially supplying the source gas, the purge gas, the reaction gas and the purge gas into the vacuum chamber.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: February 16, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Ho Park, Bum-Seok Seo, Myoung-Jae Lee, June-Mo Koo, Sun-Ae Seo, Young-Kwan Cha