Abstract: The present invention relates to a method of manufacturing a nonvolatile memory cell. The present invention uses tungsten (W) as an upper layer of a control gate electrode in order to integrate the memory cell and performs an ion implantation process for forming a source region and a drain region before a selective oxidization process that is performed to prevent abnormal oxidization of tungsten (W). Therefore, the present invention can reduce a RC delay time of word lines depending on integration of the memory cell and also secure a given distance between a silicon substrate and a tunnel oxide film. As a result, the present invention can solve a data retention problem of the flash memory.

Abstract: A remote robot control method using a three-dimensional pointing procedure and a robot control system using the remote robot control method. The robot control system controls a robot in response to a user's gesture or sign without modifying the structure of the robot. The remote robot control method includes measuring a distance between a remote controller and a robot, calculating an initial position of the remote controller in an inertial navigation frame of the remote controller, calculating an initial position of the robot in the navigation frame of the remote controller, calculating an origin of the inertial navigation frame of the remote controller shown in an inertial navigation frame of the robot, calculating a new position of the remote controller in the inertial navigation frame of the remote controller, and calculating a new position of the robot in the navigation frame of the robot.

Abstract: A spatial information input apparatus and method are provided. The apparatus includes: a motion detecting unit which detects motions of respective parts of the body as predetermined motion signals; and a motion-signal processing unit which outputs the motion signals, which are substantially concurrently detected, as effective motion signals having specific functions.

Abstract: A printing medium and a printing method thereof, for a photo printer using the printing medium, wherein the printing medium includes a printing region, and a first tab region and a second tab region extending from both tabs of the printing region in a lengthwise direction and having different lengths from each other, and having a direction display unit formed in a penetrated manner in any one of the first tab region and the second tab region and displaying an inserting direction. The printing medium can also include an ID display unit including a plurality of slits formed in any one of the first tab region and the second tab region in order to display information regarding the printing medium.

Abstract: A method of driving a display panel includes: quantizing a sustain pulse; and performing a sustain discharge by supplying a ramp-type sustain pulse in at least one sub-field. Accordingly, it is possible to prevent low gray-scale display deterioration due to the quantization of sustain pulses by performing a sustain discharge using a ramp-type sustain pulse.

Abstract: Disclosed are a polyarylene compound and polymers thereof, which can be used as core materials for an organic or polymeric electro-luminescence (EL) element or for other optical devices, a preparation method thereof, and an EL element using the same.

Abstract: A method for forming a seal pattern of an LCD device includes a division mask to print seal patterns onto a substrate. A substrate having a plurality of liquid crystal display panels is prepared; a mask having an opening is arranged on at least one liquid crystal display panel; a seal pattern is formed on the liquid crystal display panel corresponding to the opening with the mask; and the mask is re-arranged on another liquid crystal display panel to form a seal pattern on a corresponding liquid crystal display panel.

Abstract: A plasma display panel (PDP) and a method for driving the PDP, in which address data is applied to address electrodes grouped into two groups in an address period in such a manner that the address data application is carried out for respective address electrode groups at different times. Accordingly, discharge current generated due to address discharge may be distributed in terms of time, and a voltage drop occurring in the address period may be reduced.

Abstract: A thermal image forming apparatus and method of printing a color image by heating a medium having ink layers that react with heat to represent different colors with a single thermal printhead (TPH), includes transferring the medium in a first direction, heating a first surface of the medium using the TPH to represent an image of one or more ink layers, moving a holding unit to an inlet of the TPH in a state where a terminal portion of the medium is engaged with the holding unit installed at an outlet of the TPH to dispose a second surface of the medium to face the TPH, and heating the second surface of the medium to represent an image of the remaining one or more ink layers.

Abstract: The present invention relates to a fixing structure of a side shield for glasses wherein a side shield installed in glasses legs, comprising a through hole formed in inner upper and lower portions of a rear end of a side shield surrounding the glasses legs, and a fixture having an elastic piece in the interior of the same and a hook part in the upper and lower sides of a front end wherein said fixture is inserted through an opening of the side shield, and the hook part of the fixture is engaged to the though hole, and the elastic piece of the fixture is elastically closely contacted with the glasses legs. In the present invention, the size of the fixture is large, and the hook part of the fixture is inserted into the through hole formed in the side shield. Therefore, anyone can easily insert the fixture for thereby achieving a convenient assembling work, and the side shield is easily fixed to the glasses legs.

Abstract: An input apparatus for a multi-layer on-screen display and a method of generating an input signal for a multi-layer on-screen display. The input apparatus includes: an acceleration sensing unit for sensing an acceleration of a motion of the input apparatus; a processing unit for obtaining information including a motion depth and a motion pattern of the input apparatus using the sensed acceleration and determining a layer to be activated from the information; and a transmitter for generating a signal including the determined layer and outputting the signal to the multi-layer OSD.

Abstract: The present invention propose a new mechanism, IP check layer which enables to use TOE cards and legacy NICs simultaneously within same protocol family in a Linux or a UNIX computing environment. The IP check layer is inserted between a BSD socket layer and an INET socket layer. IP check layer maintains a routing information and, information of IP addresses of each network interfaces and each socket's bind state. Using this information, IP check layer determines how to process a socket call and which layer (TOE layer, host INET layer) will take over the socket call. By means of the above mechanism, the present invention makes existing socket applications to use TOE cards and legacy NICs at the same time without modification or recompiling.

Abstract: The present invention provides a non-volatile memory device and fabricating method thereof, in which a height of a floating gate conductor layer pattern is sustained without lowering a degree of integration and by which a coupling ratio is raised. The present invention includes a trench type device isolation layer defining an active area within a semiconductor substrate, a recess in an upper part of the device isolation layer to have a prescribed depth, a tunnel oxide layer on the active area of the semiconductor substrate, a floating gate conductor layer pattern on the tunnel oxide layer, a conductive floating spacer layer provided to a sidewall of the floating gate conductor layer pattern and a sidewall of the recess, a gate-to-gate insulating layer on the floating fate conductor layer pattern and the conductive floating spacer layer, and a control gate conductor layer on the gate-to-gate insulating layer.

Abstract: The present invention provides a trench isolation method in a flash memory device, by which stability and reliability of the device are enhanced in a manner of forming a pad oxide layer thick in the vicinity of an edge of a trench isolation layer.

Abstract: A high voltage semiconductor device and fabricating method thereof, enable a high breakdown voltage to be provided from a surface area without forming a dual spacer layer. The semiconductor device includes a semiconductor substrate having source/drain regions separated from each other by a channel region in-between, a gate insulating layer pattern on the channel region, a gate conductor layer pattern on the gate insulating layer, a sidewall insulating layer provided on a sidewall of the gate conductor layer pattern, a salicide suppress layer pattern covering partial, but not entire, surfaces of the source/drain regions, and covering the sidewall insulating layer, and the gate conductor layer pattern, and a metal salicide layer on remaining portions surfaces of the source/drain regions that are not covered with the salicide suppress layer pattern.

Abstract: There is provided a speech coding/decoding apparatus and method, in which the input speech signals are classified into several classes in accordance with characteristics of the input speech signals and the input speech signals are coded using frame sizes, quantizer structures, and bit assignment methods corresponding to the determined classes, or in which the frame sizes can be adjusted in accordance with network conditions or codec type of a counter part. Therefore, by optimally adjusting the frame size, the quantizer structure, and the bit assignment method in accordance with the characteristics of input speech, it is possible to improve the performance of the speech coding apparatus, and by adjusting the frame size in accordance with the speech codec type of a counter part, it is also possible to reduce the total end-to-end delay.

Abstract: The present invention provides a method of fabricating a flash memory device, by which a coupling ratio is raised in a manner of shortening an interval between floating gates using a spacer and by which a bridge generation is avoided between control and floating gates.

Abstract: The present invention provides a device isolation method of a semiconductor memory device and flash memory device fabricating method using the same, which can prevent a bridge occurrence between cells. The present invention includes forming a nitride layer pattern defining a trench forming area on a semiconductor substrate, forming a spacer on a sidewall of the nitride layer pattern, forming a trench in the semiconductor layer by removing a portion of the semiconductor layer using the nitride layer pattern and the spacer as an etch mask, forming a device isolation layer filling up the trench, removing the nitride layer pattern and the spacer to complete the device isolation layer, forming a conductor layer over the substrate including the device isolation layer, planarizing the conductor layer and the device isolation layer to lie in a same plane, and forming an insulating layer over the substrate.

Abstract: The present invention provides a non-volatile memory device and fabricating method thereof, by which a cell size can be lowered despite high degree of cell integration and by which the device fabrication is facilitated. The present invention includes at least two trench isolation layers arranged in a device isolation area of a semiconductor substrate, each having a first depth, a first conductive type well arranged between the at least two trench isolation layers to have a second depth smaller than the first depth, a second conductive type source region and a second conductive type drain region arranged in a prescribed upper part of the first conductive type well to be separated from each other by a channel region in-between, an ONO layer on the channel region of the semiconductor substrate, the ONO layer comprising a lower oxide layer, a nitride layer, and an upper oxide layer, and a wordline conductor layer on the ONO layer.

Abstract: The present invention provides a method of fabricating a non-volatile memory device, in which trench isolation can be achieved using an insulating layer that needs no separate removal process.