Patents by Inventor Sung Min Yoon
Sung Min Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140035622Abstract: Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.Type: ApplicationFiled: October 9, 2013Publication date: February 6, 2014Applicants: Konkuk University Industrial Cooperation Corp, ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang Hee PARK, Chi Sun Hwang, Sung Min Yoon, Him Chan Oh, Kee Chan Park, Tao Ren, Hong Kyun Leem, Min Woo Oh, Ji Sun Kim, Jae Eun Pi, Byeong Hoon Kim, Byoung Gon Yu
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Publication number: 20140011297Abstract: Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.Type: ApplicationFiled: September 10, 2013Publication date: January 9, 2014Applicant: ELECTRONICS AND TELECOMMUNICATION RESEARCH INSTITUTEInventors: Sung Min YOON, Chun Won BYUN, Shin Hyuk YANG, Sang Hee PARK, Soon Won JUNG, Seung Youl KANG, Chi Sun HWANG, Byoung Gon YU
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Patent number: 8570066Abstract: Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.Type: GrantFiled: January 20, 2012Date of Patent: October 29, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Sang Hee Park, Chi Sun Hwang, Sung Min Yoon, Him Chan Oh, Kee Chan Park, Tao Ren, Hong Kyun Leem, Min Woo Oh, Ji Sun Kim, Jae Eun Pi, Byeong Hoon Kim, Byoung Gon Yu
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Patent number: 8558295Abstract: Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.Type: GrantFiled: July 19, 2010Date of Patent: October 15, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Min Yoon, Chun Won Byun, Shin Hyuk Yang, Sang Hee Park, Soon Won Jung, Seung Youl Kang, Chi Sun Hwang, Byoung Gon Yu
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Patent number: 8493768Abstract: Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.Type: GrantFiled: November 21, 2011Date of Patent: July 23, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Chunwon Byun, ByeongHoon Kim, Sung Min Yoon, Shinhyuk Yang, Min Ki Ryu, Chi-Sun Hwang, Sang-Hee Park, Kyoung Ik Cho
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Patent number: 8476106Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.Type: GrantFiled: May 11, 2012Date of Patent: July 2, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Min Yoon, Shin Hyuk Yang, Soon Won Jung, Seung Youl Kang, Doo Hee Cho, Chun Won Byun, Chi Sun Hwang, Byoung Gon Yu, Kyoung Ik Cho
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Patent number: 8470719Abstract: Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.Type: GrantFiled: May 18, 2011Date of Patent: June 25, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Seung Yun Lee, Young Sam Park, Sung Min Yoon, Soon Won Jung, Byoung Gon Yu
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Patent number: 8445887Abstract: A nonvolatile programmable switch device using a phase-change memory device and a method of manufacturing the same are provided. The switch device includes a substrate, a first metal electrode layer disposed on the substrate and including a plurality of terminals, a phase-change material layer disposed on the substrate and having a self-heating channel structure, the phase-change material layer having a plurality of introduction regions electrically contacting the terminals of the first metal electrode layer and a channel region interposed between the introduction regions, an insulating layer disposed on the first metal electrode layer and the phase-change material layer, a via hole disposed on the first metal electrode layer, and a second metal electrode layer disposed to fill the via hole.Type: GrantFiled: April 23, 2009Date of Patent: May 21, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Min Yoon, Byoung Gon Yu, Soon Won Jung, Seung Yun Lee, Young Sam Park, Joon Suk Lee
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Publication number: 20130030568Abstract: The present invention discloses a method of controlling a robot system and an apparatus thereof. The method of controlling a robot system in accordance with an embodiment of the present invention can include: initializing the master controller by use of a boot loader equipped in the robot system; executing a runtime by loading a runtime execution code stored in a storage space of the master controller; and loading and executing an application program stored in the storage space of the master controller. With an embodiment of the present invention, it becomes possible to manage the application program more efficiently for realizing the functions of the robot system.Type: ApplicationFiled: April 23, 2010Publication date: January 31, 2013Applicant: Samsung Heavy Ind. Co., Ltd.Inventors: Tae Jin Park, Jae Hoon Kim, Young Youl Ha, Sang Dong Park, Sung Min Yoon, Min Su Kim
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Publication number: 20120242370Abstract: Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.Type: ApplicationFiled: January 20, 2012Publication date: September 27, 2012Applicants: Konkuk University Industrial Cooperation Corp, ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang Hee Park, Chi Sun Hwang, Sung Min Yoon, Him Chan Oh, Kee Chan Park, Tao Ren, Hong Kyun Leem, Min Woo Oh, Ji Sun Kim, Jae Eun Pi, Byeong Hoon Kim, Byoung Gon Yu
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Publication number: 20120225500Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.Type: ApplicationFiled: May 11, 2012Publication date: September 6, 2012Applicant: Electronics and Telecommunications Research InstituteInventors: Sung Min YOON, Shin Hyuk Yang, Soon Won Jung, Seung Youl Kang, Doo Hee Cho, Chun Won Byun, Chi Sun Hwang, Byoung Gon Yu, Kyoung Ik Cho
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Publication number: 20120217465Abstract: Provided is a non-volatile programmable device including a first terminal, a first threshold switching layer connected to part of the first terminal, a phase change layer connected to the first threshold switching layer, a second threshold switching layer connected to the phase change layer, a second terminal connected to the second threshold switching layer, and third and fourth terminals respectively connected to a side portion of the phase change layer and the other side portion opposite to the side portion of the phase change layer.Type: ApplicationFiled: May 8, 2012Publication date: August 30, 2012Applicant: Electronics and Telecommunications Research InstituteInventors: Seung Yun LEE, Young Sam Park, Sung Min Yoon, Soonwon Jung, Sang Hoon Cheon, Byoung Gon Yu
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Patent number: 8198625Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.Type: GrantFiled: September 9, 2009Date of Patent: June 12, 2012Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Min Yoon, Shin Hyuk Yang, Soon Won Jung, Seung Youl Kang, Doo Hee Cho, Chun Won Byun, Chi Sun Hwang, Byoung Gon Yu, Kyoung Ik Cho
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Publication number: 20120134197Abstract: Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.Type: ApplicationFiled: November 21, 2011Publication date: May 31, 2012Applicant: ELETRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chunwon Byun, ByeongHoon Kim, Sung Min Yoon, Shinhyuk Yang, Min Ki Ryu, Chi-Sun Hwang, Sang-Hee Park, Kyoung Ik Cho
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Publication number: 20120007158Abstract: Provided is a non-volatile memory transistor having a double gate structure, including a first gate electrode formed on a substrate and to which an operating voltage is applied, a first gate insulating layer formed on the first gate electrode, source and drain electrodes formed on the first gate insulating layer at predetermined intervals, a channel layer formed on the first gate insulating layer between the source and drain electrodes, a second gate insulating layer formed on the channel layer, and a second gate electrode formed on the second gate insulating layer and connected to the first gate electrode such that the operating voltage is applied thereto. Accordingly, a turn-on voltage of the memory transistor can be easily controlled.Type: ApplicationFiled: June 30, 2011Publication date: January 12, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sung Min YOON, Shin Hyuk Yang, Chun Won Byun, Min Ki Ryu, Soon Won Jung
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Publication number: 20120001159Abstract: Provided is an insulating layer in which an inorganic material is added to an organic polymer to thereby improve the insulating properties, an organic thin film transistor using the insulating layer, and a method of fabricating the organic thin film transistor. An insulating layer for an organic thin film transistor including a vinyl polymer and an inorganic material is provided. Here, a weight ratio of the vinyl polymer to the inorganic material may be in the range of 1:0.0001 to 1:0.5. Accordingly, it is possible to fabricate a thin film at low temperature and, further, to fabricate an insulating layer having a high-dielectric constant, not affecting other layers formed in the previous processes during the formation of the insulating layer.Type: ApplicationFiled: September 15, 2011Publication date: January 5, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Gi Heon KIM, Sung Min YOON, Kyu Ha BAEK, In Kyu YOU, Seung Youl KANG, Seong Deok AHN, Kyung Soo SUH
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Publication number: 20110305062Abstract: Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations.Type: ApplicationFiled: September 21, 2010Publication date: December 15, 2011Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chun Won BYUN, Byeong Hoon Kim, Sung Min Yoon, Kyoung Ik Cho, Sang Hee Park, Chi Sun Hwang, Min Ki Ryu, Shin Hyuk Yang, Oh Sang Kwon, Eun Suk Park
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Patent number: 8071396Abstract: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed on a collector. The phase-change memory device has a phase-change material layer which is changed from an amorphous state to a crystalline state by a current, and a heating layer composed of SiGe that contacts the lower surface of the phase-change material layer.Type: GrantFiled: November 9, 2010Date of Patent: December 6, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Seung-Yun Lee, Sangouk Ryu, Sung Min Yoon, Young Sam Park, Kyu-Jeong Choi, Nam-Yeal Lee, Byoung-Gon Yu
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Patent number: 8039294Abstract: Provided is an insulating layer in which an inorganic material is added to an organic polymer to thereby improve the insulating properties, an organic thin film transistor using the insulating layer, and a method of fabricating the organic thin film transistor. An insulating layer for an organic thin film transistor including a vinyl polymer and an inorganic material is provided. Here, a weight ratio of the vinyl polymer to the inorganic material may be in the range of 1:0.0001 to 1:0.5. Accordingly, it is possible to fabricate a thin film at low temperature and, further, to fabricate an insulating layer having a high-dielectric constant, not affecting other layers formed in the previous processes during the formation of the insulating layer.Type: GrantFiled: July 25, 2007Date of Patent: October 18, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Gi Heon Kim, Sung Min Yoon, Kyu Ha Baek, In Kyu You, Seung Youl Kang, Seong Deok Ahn, Kyung Soo Suh
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Publication number: 20110223716Abstract: Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.Type: ApplicationFiled: May 18, 2011Publication date: September 15, 2011Applicant: Electronics and Telecommunications Research InstituteInventors: Seung Yun LEE, Young Sam PARK, Sung Min YOON, Soon Won JUNG, Byoung Gon YU