Patents by Inventor Sung Min Yoon

Sung Min Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7989793
    Abstract: Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: August 2, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung Yun Lee, Young Sam Park, Sung Min Yoon, Soon Won Jung, Byoung Gon Yu
  • Patent number: 7977674
    Abstract: A phase change memory device and a method of fabricating the same are provided. A phase change material layer of the phase change memory device is formed of germanium (Ge)-antimony (Sb)-Tellurium (Te)-based Ge2Sb2+xTe5 (0.12?x?0.32), so that the crystalline state is determined as a stable single phase, not a mixed phase of a metastable phase and a stable phase, in phase transition between crystalline and amorphous states of a phase change material, and the phase transition according to increasing temperature directly transitions to the single stable phase from the amorphous state. As a result, set operation stability and distribution characteristics of set state resistances of the phase change memory device can be significantly enhanced, and an amorphous resistance can be maintained for a long time at a high temperature, i.e., around crystallization temperature, and thus reset operation stability and rewrite operation stability of the phase change memory device can be significantly enhanced.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: July 12, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Min Yoon, Byoung Gon Yu, Seung Yun Lee, Young Sam Park, Kyu Jeong Choi, Nam Yeal Lee
  • Patent number: 7952086
    Abstract: Provided are a phase-change nonvolatile memory device and a manufacturing method thereof. The device includes: a substrate; and a stack structure disposed on the substrate and including a phase-change material layer. The phase-change material layer is formed of an alloy of antimony (Sb) and zinc (Zn), so that the phase-change memory device can stably operate at high speed and reduce power consumption.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: May 31, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Byoung Gon Yu, Sung Min Yoon, Se Young Choi, Tae Jin Park
  • Patent number: 7920413
    Abstract: Provided are an apparatus and method for writing data to a phase-change random access memory (PRAM) by using writing power calculation and data inversion functions, and more particularly, an apparatus and method for writing data which can minimize power consumption by calculating the power consumed while input original data or inverted data is written to a PRAM and storing the data consuming less power. A PRAM consumes a significant amount of power in order to store data in a memory cell since a large electric current is required to flow for a long period of time.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 5, 2011
    Assignees: Electronics & Telecommunications Research Institute, Cungbuk Nat'l Univ. Industry Academic Cooperation Foundation
    Inventors: Byoung-Gon Yu, Byung-Do Yang, Seung-Yun Lee, Sung-Min Yoon, Young Sam Park, Nam Yeal Lee
  • Patent number: 7911227
    Abstract: Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: March 22, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Byoung Gon Yu, Yong-Joo Kim, Sung Min Yoon, Seung-Yun Lee, Young Sam Park, Soonwon Jung
  • Publication number: 20110065246
    Abstract: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed on a collector. The phase-change memory device has a phase-change material layer which is changed from an amorphous state to a crystalline state by a current, and a heating layer composed of SiGe that contacts the lower surface of the phase-change material layer.
    Type: Application
    Filed: November 9, 2010
    Publication date: March 17, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung-Yun LEE, Sang ouk RYU, Sung Min YOON, Young Sam PARK, Kyu-Jeong CHOI, Nam-Yeal LEE, Byoung-Gon YU
  • Publication number: 20110049592
    Abstract: Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.
    Type: Application
    Filed: July 19, 2010
    Publication date: March 3, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung Min YOON, Chun Won BYUN, Shin Hyuk YANG, Sang Hee PARK, Soon Won JUNG, Seung Youl KANG, Chi Sun HWANG, Byoung Gon YUN
  • Patent number: 7886136
    Abstract: An operating system switching method in a computer system having at least two operating systems is provided. The operating system switching method may include receiving a command of switching a first operating system that is currently running to a second operating system, causing the computer system to make a transition to a low-power sleeping state in response to the command, and booting the computer system using the second operating system in the transitioned state.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: February 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-min Yoon
  • Patent number: 7884347
    Abstract: A phase-change memory device in which a phase-change material layer has a multilayered structure with different compositions and a method of fabricating the same are provided. The phase-change memory device includes a first electrode layer formed on a substrate, a heater electrode layer formed on the first electrode layer, an insulating layer formed on the heater electrode layer and having a pore partially exposing the heater electrode layer, a phase-change material layer formed to fill the pore and partially contacting the heater electrode layer, and a second electrode layer formed on the phase-change material layer.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: February 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Min Yoon, Byoung Gon Yu, Soon Won Jung, Seung Yun Lee, Young Sam Park, Joon Suk Lee
  • Patent number: 7867811
    Abstract: Provided is a display panel comprised of a white color organic luminescent element and a color filter for full color implementation, wherein a substrate in which an organic luminescent element is formed and a color filter are assembled and fixed to face each other with an adhesive pattern therebetween, and liquid oil is filled between the color filter and the substrate inside of the adhesive pattern so as to block external moisture or oxygen, so that deterioration of luminous characteristics due to the external moisture or oxygen may be prevented by encapsulating the organic luminescent element and the color filter with the liquid oil, which leads to enhance reliability and stability of the element, and also allows the encapsulation process to be performed with relatively simple steps and low cost.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 11, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gi Heon Kim, Sung Min Yoon, In Kyu You, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 7855421
    Abstract: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed on a collector. The phase-change memory device has a phase-change material layer which is changed from an amorphous state to a crystalline state by a current, and a heating layer composed of SiGe that contacts the lower surface of the phase-change material layer.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: December 21, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung-Yun Lee, Sangouk Ryu, Sung Min Yoon, Young Sam Park, Kyu-Jeong Choi, Nam-Yeal Lee, Byoung-Gon Yu
  • Publication number: 20100287496
    Abstract: An apparatus and method for managing the layout of a window is provided. The apparatus includes a display unit that displays the window on a screen; the screen is divided into a plurality of display areas; a pointer-position-checking unit that checks the coordinate position of a pointer moved by a user and determines the one display area corresponding to the position of the checked pointer; and a window-size-adjusting unit that moves the window to the one display area where the pointer is positioned and adjusts the size of the window in proportion to the size of the one display area.
    Type: Application
    Filed: July 20, 2010
    Publication date: November 11, 2010
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Young-Kuk Kim, Sung-min Yoon
  • Publication number: 20100258780
    Abstract: Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured.
    Type: Application
    Filed: June 23, 2010
    Publication date: October 14, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung-Yun Lee, Young Sam Park, Sung Min Yoon, Kyu-Jeong Choi, Nam-Yeal Lee, Byoung-Gon Yu
  • Publication number: 20100243994
    Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.
    Type: Application
    Filed: September 9, 2009
    Publication date: September 30, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung Min Yoon, Shin Hyuk Yang, Soon Woon Jung, Seung Youl Kang, Doo Hee Cho, Chun Won Byun, Chi Sun Hwang, Byoung Gon Yu, Kyoung Ik Cho
  • Patent number: 7783989
    Abstract: An apparatus and method for managing the layout of a window is provided. The apparatus includes a display unit that displays the window on a screen; the screen is divided into a plurality of display areas; a pointer-position-checking unit that checks the coordinate position of a pointer moved by a user and determines the one display area corresponding to the position of the checked pointer; and a window-size-adjusting unit that moves the window to the one display area where the pointer is positioned and adjusts the size of the window in proportion to the size of the one display area.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: August 24, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-kuk Kim, Sung-min Yoon
  • Patent number: 7767994
    Abstract: Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: August 3, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung-Yun Lee, Young Sam Park, Sung Min Yoon, Kyu-Jeong Choi, Nam-Yeal Lee, Byoung-Gon Yu
  • Publication number: 20100151274
    Abstract: A method of manufacturing a flexible substrate is provided. The method includes coating a precursor including an inorganic polymer on the flexible substrate, curing the precursor including the inorganic polymer, and oxidizing a surface of the cured precursor including the inorganic polymer to form an oxide layer. Accordingly, an organic/inorganic barrier layer may be formed by only one coating process of a thin film. In this case, oxygen plasma or infrared ray/ozone processing may be performed at atmospheric pressure, thereby reducing process costs and equipment costs by not using vacuum equipment.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 17, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Youl KANG, Gi Heon KIM, Yong Hae KIM, Sung Min YOON, Chul Am KIM
  • Publication number: 20100148141
    Abstract: Provided is a non-volatile programmable device including a first terminal, a first threshold switching layer connected to part of the first terminal, a phase change layer connected to the first threshold switching layer, a second threshold switching layer connected to the phase change layer, a second terminal connected to the second threshold switching layer, and third and fourth terminals respectively connected to a side portion of the phase change layer and the other side portion opposite to the side portion of the phase change layer.
    Type: Application
    Filed: June 25, 2009
    Publication date: June 17, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Yun Lee, Young Sam Park, Sung Min Yoon, Soonwon Jung, Sang Hoon Cheon, Byoung Gon Yu
  • Publication number: 20100148821
    Abstract: Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 17, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Byoung Gon YU, Yong-Joo Kim, Sung Min Yoon, Seung-Yun Lee, Young Sam Park, Soonwon Jung
  • Publication number: 20100108977
    Abstract: A nonvolatile programmable switch device using a phase-change memory device and a method of manufacturing the same are provided. The switch device includes a substrate, a first metal electrode layer disposed on the substrate and including a plurality of terminals, a phase-change material layer disposed on the substrate and having a self-heating channel structure, the phase-change material layer having a plurality of introduction regions electrically contacting the terminals of the first metal electrode layer and a channel region interposed between the introduction regions, an insulating layer disposed on the first metal electrode layer and the phase-change material layer, a via hole disposed on the first metal electrode layer, and a second metal electrode layer disposed to fill the via hole.
    Type: Application
    Filed: April 23, 2009
    Publication date: May 6, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung Min YOON, Byoung Gon Yu, Soon Won Jung, Seung Yun Lee, Young Sam Park, Joon Suk Lee