Patents by Inventor Sunil Shanker
Sunil Shanker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8765567Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.Type: GrantFiled: October 24, 2013Date of Patent: July 1, 2014Assignee: Intermolecular, Inc.Inventors: Sandra G Malhotra, Sean Barstow, Tony P. Chiang, Pragati Kumar, Prashant B Phatak, Sunil Shanker, Wen Wu
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Publication number: 20140166616Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.Type: ApplicationFiled: December 17, 2012Publication date: June 19, 2014Applicant: INTERMOLECULAR, INC.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang, Sandip Niyogi
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Patent number: 8737036Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle.Type: GrantFiled: October 22, 2012Date of Patent: May 27, 2014Assignee: Intermolecular, Inc.Inventors: Hanhong Chen, Nobumichi Fuchigami, Imran Hashim, Edward L. Haywood, Pragati Kumar, Sandra G. Malhotra, Monica Sawkar Mathur, Prashant B. Phatak, Sunil Shanker
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Patent number: 8726838Abstract: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.Type: GrantFiled: December 9, 2010Date of Patent: May 20, 2014Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang
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Publication number: 20140134849Abstract: An apparatus that includes a base, a sidewall extending from the base, and a lid disposed over a top of the sidewall is provided. A plasma generating source extends through a surface of the lid. A rotatable substrate support is disposed within the chamber above a surface of the base, the rotatable substrate support operable to vertically translate from the base to the lid. A first fluid inlet extends into a first surface of the sidewall and a second fluid inlet extends into a second surface of the sidewall. The plasma generating source provides a plasma activated species to a region of a surface of a substrate supported on the rotatable substrate support and a fluid delivered proximate to the region from one of the first or the second fluid inlet interacts with the plasma activated species to deposit a layer of material over the region.Type: ApplicationFiled: November 9, 2012Publication date: May 15, 2014Applicant: INTERMOLECULAR INC.Inventors: Sandip Niyogi, Owen Ho Yin Fong, Sunil Shanker, ShouQian Shao, Jingang Su, J. Watanabe, Wenxian Zhu
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Publication number: 20140051210Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.Type: ApplicationFiled: October 24, 2013Publication date: February 20, 2014Applicant: Intermolecular Inc.Inventors: Sandra G Malhotra, Sean Barstow, Tony P. Chiang, Pragati KUMAR, Prashant B Phatak, Sunil Shanker, Wen Wu
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Publication number: 20140017904Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: ApplicationFiled: July 3, 2013Publication date: January 16, 2014Inventors: Vishal GAURI, Raashina HUMAYUN, Chi-I LANG, Judy H. HUANG, Michael BARNES, Sunil SHANKER
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Patent number: 8592282Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.Type: GrantFiled: October 19, 2012Date of Patent: November 26, 2013Assignee: Intermolecular, Inc.Inventors: Sandra G. Malhotra, Sean Barstow, Tony P. Chiang, Pragati Kumar, Prashant B. Phatak, Sunil Shanker, Wen Wu
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Patent number: 8592058Abstract: Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.Type: GrantFiled: June 3, 2010Date of Patent: November 26, 2013Assignee: Intermolecular, Inc.Inventors: Laura M. Matz, Xiangxin Rui, Xinjian Lei, Sunil Shanker, Moo-Sung Kim, Iain Buchanan
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Patent number: 8580697Abstract: The present invention meets these needs by providing improved methods of filling gaps. In certain embodiments, the methods involve placing a substrate into a reaction chamber and introducing a vapor phase silicon-containing compound and oxidant into the chamber. Reactor conditions are controlled so that the silicon-containing compound and the oxidant are made to react and condense onto the substrate. The chemical reaction causes the formation of a flowable film, in some instances containing Si—OH, Si—H and Si—O bonds. The flowable film fills gaps on the substrates. The flowable film is then converted into a silicon oxide film, for example by plasma or thermal annealing. The methods of this invention may be used to fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.Type: GrantFiled: February 18, 2011Date of Patent: November 12, 2013Assignee: Novellus Systems, Inc.Inventors: Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 8574985Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.Type: GrantFiled: March 3, 2011Date of Patent: November 5, 2013Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Xiangxin Rui, Sunil Shanker, Sandra Malhotra, Imran Hashim, Edward Haywood
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Patent number: 8551851Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle.Type: GrantFiled: May 4, 2011Date of Patent: October 8, 2013Assignee: Intermolecular, Inc.Inventors: Hanhong Chen, Pragati Kumar, Sunil Shanker, Edward Haywood, Sandra Malhotra, Imran Hashim, Nobi Fuchigami, Prashant Phatak, Monica Mathur
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Patent number: 8541828Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer includes at least a portion of rutile titanium oxide.Type: GrantFiled: November 5, 2012Date of Patent: September 24, 2013Assignee: Intermolecular, Inc.Inventors: Imran Hashim, Edward L. Haywood, Sandra G. Malhotra, Xiangxin Rui, Sunil Shanker
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Patent number: 8481403Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: January 4, 2011Date of Patent: July 9, 2013Assignee: Novellus Systems, Inc.Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 8440259Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.Type: GrantFiled: January 14, 2008Date of Patent: May 14, 2013Assignee: Intermolecular, Inc.Inventors: Tony P. Chiang, Sunil Shanker, Chi-I Lang
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Patent number: 8409354Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.Type: GrantFiled: December 21, 2011Date of Patent: April 2, 2013Assignee: Intermolecular, Inc.Inventors: Tony P. Chiang, Chi-l Lang, Sunil Shanker
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Patent number: 8389419Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.Type: GrantFiled: December 6, 2011Date of Patent: March 5, 2013Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang
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Publication number: 20130053282Abstract: A combinatorial screening method and system are provided. The combinatorial system and method provide rapid data generation for characterization of phase change material. The characterization data is collected through a multipoint probe card where multiple regions are characterized in a single annealing cycle.Type: ApplicationFiled: December 21, 2011Publication date: February 28, 2013Applicant: Intermolecular, Inc.Inventors: Imran Hashim, Sandra Malhotra, Ryan Clarke, Sunil Shanker, Yun Wang, Yoram Schwarz
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Patent number: 8372758Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.Type: GrantFiled: December 22, 2011Date of Patent: February 12, 2013Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony Chiang
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Patent number: 8354702Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.Type: GrantFiled: February 19, 2010Date of Patent: January 15, 2013Assignee: Elpida Memory, Inc.Inventors: Sunil Shanker, Xiangxin Rui, Pragati Kumar, Hanhong Chen, Toshiyuki Hirota