Patents by Inventor Sunil Shanker
Sunil Shanker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9397292Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.Type: GrantFiled: October 2, 2014Date of Patent: July 19, 2016Assignee: Intermolecular, Inc.Inventors: Pragati Kumar, Sean Barstow, Tony P. Chiang, Sunil Shanker
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Patent number: 9245744Abstract: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.Type: GrantFiled: April 15, 2014Date of Patent: January 26, 2016Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang
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Patent number: 9082782Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.Type: GrantFiled: October 19, 2012Date of Patent: July 14, 2015Assignee: Intermolecular, Inc.Inventors: Hanhong Chen, Toshiyuki Hirota, Pragati Kumar, Xiangxin Rui, Sunil Shanker
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Publication number: 20150144061Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.Type: ApplicationFiled: February 4, 2015Publication date: May 28, 2015Inventors: Sunil Shanker, Tony P. Chiang
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Patent number: 9029232Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.Type: GrantFiled: May 19, 2014Date of Patent: May 12, 2015Assignee: Intermolecular, Inc.Inventors: Sandra G Malhotra, Sean Barstow, Tony P. Chiang, Wayne R French, Pragati Kumar, Prashant B Phatak, Sunil Shanker, Wen Wu
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Patent number: 8980744Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.Type: GrantFiled: November 13, 2012Date of Patent: March 17, 2015Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Hanhong Chen, Toshiyuki Hirota, Pragati Kumar, Xiangxin Rui, Sunil Shanker
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Patent number: 8980765Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.Type: GrantFiled: October 19, 2012Date of Patent: March 17, 2015Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang
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Publication number: 20150056748Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.Type: ApplicationFiled: October 2, 2014Publication date: February 26, 2015Inventors: Pragati Kumar, Sean Barstow, Tony P. Chiang, Sunil Shanker
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Patent number: 8901708Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.Type: GrantFiled: November 13, 2012Date of Patent: December 2, 2014Assignee: Intermolecular, Inc.Inventors: Imran Hashim, Hanhong Chen, Tony Chiang, Indranil De, Nobumichi Fuchigami, Edward Haywood, Pragati Kumar, Sandra Malhotra, Sunil Shanker
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Patent number: 8900422Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.Type: GrantFiled: April 17, 2009Date of Patent: December 2, 2014Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Imran Hashim, Indranil De, Tony Chiang, Edward Haywood, Hanhong Chen, Nobi Fuchigami, Pragati Kumar, Sandra Malhotra, Sunil Shanker
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Patent number: 8900418Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.Type: GrantFiled: November 14, 2012Date of Patent: December 2, 2014Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Imran Hashim, Hanhong Chen, Tony Chiang, Indranil De, Nobi Fuchigami, Edward Haywood, Pragati Kumar, Sandra Malhotra, Sunil Shanker
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Patent number: 8877550Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.Type: GrantFiled: February 10, 2012Date of Patent: November 4, 2014Assignee: Intermolecular, Inc.Inventors: Pragati Kumar, Sean Barstow, Sunil Shanker, Tony Chiang
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Publication number: 20140273309Abstract: Remote-plasma treatments of surfaces, for example in semiconductor manufacture, can be improved by preferentially exposing the surface to only a selected subset of the plasma species generated by the plasma source. The probability that a selected species reaches the surface, or that an unselected species is quenched or otherwise converted or diverted before reaching the surface, can be manipulated by introducing additional gases with selected properties either at the plasma source or in the process chamber, varying chamber pressure or flow rate to increase or decrease collisions, or changing the dimensions or geometry of the injection ports, conduits and other passages traversed by the species. Some example processes treat surfaces preferentially with relatively low-energy radicals, vary the concentration of radicals at the surface in real time, or clean and passivate in the same unit process.Type: ApplicationFiled: October 10, 2013Publication date: September 18, 2014Applicant: Intermolecular, Inc.Inventors: Sandip Niyogi, Sean Barstow, Jay Dedontney, Chi-I Lang, Ratsamee Limdulpaiboon, Martin Romero, Sunil Shanker, James Tsung, J. Watanabe
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Publication number: 20140256111Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.Type: ApplicationFiled: May 19, 2014Publication date: September 11, 2014Applicant: Intermolecular Inc.Inventors: Sandra G. Malhotra, Sean Barstow, Tony P. Chiang, Wayne R. French, Pragati Kumar, Prashant B. Phatak, Sunil Shanker, Wen Wu
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Patent number: 8828821Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device such as a capacitor and DRAM cell. In particular, a bottom electrode upon which a dielectric layer is to be grown may have a ruthenium-based surface. Lattice matching of the ruthenium surface with the dielectric layer (e.g., titanium oxide, strontium titanate or barium strontium titanate) helps promote the growth of rutile-phase titanium oxide, thereby leading to higher dielectric constant and lower effective oxide thickness. The ruthenium-based material also provides a high work function material, leading to lower leakage. To mitigate nucleation delay associated with the use of ruthenium, an adherence or glue layer based in titanium may be employed. A pretreatment process may be further employed so as to increase effective capacitor plate area, and thus promote even further improvements in dielectric constant and effective oxide thickness (“EOT”).Type: GrantFiled: September 18, 2009Date of Patent: September 9, 2014Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Hanhong Chen, Nobumichi Fuchigami, Imran Hashim, Pragati Kumar, Sandra Malhotra, Sunil Shanker
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Patent number: 8821987Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.Type: GrantFiled: December 17, 2012Date of Patent: September 2, 2014Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang, Sandip Niyogi
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Patent number: 8821795Abstract: A combinatorial screening method and system are provided. The combinatorial system and method provide rapid data generation for characterization of phase change material. The characterization data is collected through a multipoint probe card where multiple regions are characterized in a single annealing cycle.Type: GrantFiled: July 16, 2009Date of Patent: September 2, 2014Assignee: Intermolecular, Inc.Inventors: Imran Hashim, Sandra Malhotra, Ryan Clarke, Sunil Shanker, Yun Wang, Yoram Schwarz
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Patent number: 8815157Abstract: A combinatorial screening method and system are provided. The combinatorial system and method provide rapid data generation for characterization of phase change material. The characterization data is collected through a multipoint probe card where multiple regions are characterized in a single annealing cycle.Type: GrantFiled: December 21, 2011Date of Patent: August 26, 2014Assignee: Intermolecular, Inc.Inventors: Imran Hashim, Ryan Clarke, Sandra Malhotra, Yoram Schwarz, Sunil Shanker, Yun Wang
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Patent number: 8809161Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: July 3, 2013Date of Patent: August 19, 2014Assignee: Novellus Systems, Inc.Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Publication number: 20140227880Abstract: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.Type: ApplicationFiled: April 15, 2014Publication date: August 14, 2014Applicant: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang