Patents by Inventor Sunil Shanker

Sunil Shanker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7514375
    Abstract: During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: April 7, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: Sunil Shanker, Chi-I Lang
  • Publication number: 20090061083
    Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.
    Type: Application
    Filed: January 14, 2008
    Publication date: March 5, 2009
    Inventors: Tony P. Chiang, Sunil Shanker, Chi-I Lang
  • Publication number: 20090061646
    Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 5, 2009
    Inventors: Tony P. Chiang, Sunil Shanker, Chi-I Lng
  • Publication number: 20090061644
    Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.
    Type: Application
    Filed: January 14, 2008
    Publication date: March 5, 2009
    Inventors: Tony P. Chiang, Sunil Shanker, Chi I. Lang
  • Publication number: 20090026434
    Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.
    Type: Application
    Filed: July 24, 2008
    Publication date: January 29, 2009
    Inventors: Sandra G. Malhotra, Pragati Kumar, Sean Barstow, Tony Chiang, Prashant B. Phatak, Wen Wu, Sunil Shanker
  • Patent number: 7211525
    Abstract: Methods of filling gaps on semiconductor substrates with dielectric film are described. The methods reduce or eliminate sidewall deposition and top-hat formation. The methods also reduce or eliminate the need for etch steps during dielectric film deposition. The methods include treating a semiconductor substrate with a hydrogen plasma before depositing dielectric film on the substrate. In some embodiments, the hydrogen treatment is used is conjunction with a high rate deposition process.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: May 1, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Sunil Shanker, Sean Cox, Chi-I Lang, Judy H. Huang, Minh Anh Nguyen, Ken Vo, Wenxian Zhu