Patents by Inventor Swarnal Borthakur

Swarnal Borthakur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145515
    Abstract: An integrated circuit package (34, 34?, 34?) may be implemented by stacked first, second, and third integrated circuit dies (40, 50, 60). The first and second dies (40, 50) may be bonded to each other using corresponding inter-die connection structures (74-1, 84-1) at respective interfacial surfaces facing the other die. The second die (50) may also include a metal layer (84-2) for connecting to the third die (60) at its interfacial surface with the first die (40). The metal layer (84-2) may be connected to a corresponding inter-die connection structure (64) on the side of the third die (60) facing the second die (50) through a conductive through-substrate via (84-2) and an additional metal layer (102) in a redistribution layer (96) between the second and third dies (50, 60). The third die (60) may have a different lateral outline than the second die (50).
    Type: Application
    Filed: April 27, 2022
    Publication date: May 2, 2024
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Mario M. PELELLA, Chandrasekharan KOTHANDARAMAN, Marc Allen SULFRIDGE, Yusheng LIN, Larry Duane KINSMAN
  • Patent number: 11973006
    Abstract: A method includes etching a through-substrate via (TSV) in a substrate from a backside of the substrate. The substrate has a device layer on a frontside. The method further includes depositing a conformal spacer layer on the backside of the substrate, and sidewalls and a bottom of the TSV, and etching the spacer layer to form a self-aligned mask for etching a contact opening at the bottom of TSV to a metal pad in the device layer, and etching the contact opening at the bottom of TSV to the metal pad in the device layer. The method further includes disposing a conductive material layer in the TSV and the contact opening to make a vertical interconnection from the backside of the substrate to the metal pad in the device layer.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 30, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jeffrey Peter Gambino, Swarnal Borthakur
  • Publication number: 20240038800
    Abstract: An image sensor may include a sensor chip that is bonded to an application-specific integrated circuit (ASIC) chip. A bond pad for the image sensor may be formed in the ASIC chip and exposed through a trench in the sensor chip. The image sensor may include a conductive light shield at a periphery of the image sensor to shield optically black pixels. An opaque layer may be formed over the conductive light shield to mitigate reflections off the conductive light shield. An anti-reflective layer may be formed over the pixel array. The anti-reflective layer may have a different thickness over the pixel array than in the trench for the bond pad.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 1, 2024
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Marc Allen SULFRIDGE, William CROFOOT, Swarnal BORTHAKUR
  • Publication number: 20230387332
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. The light scattering structures may include a low-index material formed in trenches in the semiconductor substrate. The light scattering structures may have different sizes and/or a layout with a non-uniform number of structures per unit area. SPAD devices may also include isolation structures in a ring around the SPADs to prevent crosstalk. The isolation structures may include metal-filled deep trench isolation structures. The metal filler may include tungsten.
    Type: Application
    Filed: August 14, 2023
    Publication date: November 30, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Swarnal BORTHAKUR
  • Publication number: 20230361139
    Abstract: Implementations of a semiconductor device may include a first semiconductor die hybrid bonded to a second semiconductor die; a bond pad included in the second semiconductor die; a through-silicon-via (TSV) extending entirely through the first semiconductor die and to the bond pad included in the second semiconductor die; and a trench formed entirely through the first semiconductor die and to the bond pad included in the second semiconductor die. The trench may form an edge seal.
    Type: Application
    Filed: March 17, 2023
    Publication date: November 9, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Jeffrey Peter GAMBINO
  • Patent number: 11764314
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. The light scattering structures may include a low-index material formed in trenches in the semiconductor substrate. The light scattering structures may have different sizes and/or a layout with a non-uniform number of structures per unit area. SPAD devices may also include isolation structures in a ring around the SPADs to prevent crosstalk. The isolation structures may include metal-filled deep trench isolation structures. The metal filler may include tungsten.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: September 19, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Swarnal Borthakur
  • Patent number: 11728360
    Abstract: An image sensor package may include a semiconductor wafer having a pixel array, a color filter array (CFA) formed over the pixel array, and one or more lenses formed over the CFA. A light block layer may couple over the semiconductor wafer around a perimeter of the lenses and an encapsulation layer may be coupled around the perimeter of the lenses and over the light block layer. The light block layer may form an opening providing access to the lenses. A mold compound layer may be coupled over the encapsulation layer and the light block layer. A temporary protection layer may be used to protect the one or more lenses from contamination during application of the mold compound and/or during processes occurring outside of a cleanroom environment.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: August 15, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Larry Duane Kinsman, Swarnal Borthakur, Marc Allen Sulfridge, Scott Donald Churchwell, Brian Vaartstra
  • Publication number: 20230253513
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. The light scattering structures may include a low-index material formed in trenches in the semiconductor substrate. One or more microlenses may focus light onto the semiconductor substrate. Areas of the semiconductor substrate that receive more light from the microlenses may have a higher density of light scattering structures to optimize light scattering while mitigating dark current.
    Type: Application
    Filed: April 3, 2023
    Publication date: August 10, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Marc Allen SULFRIDGE, Andrew Eugene PERKINS
  • Publication number: 20230230987
    Abstract: Imaging systems, and image pixels and related methods. At least one example is an image sensor comprising a plurality of image pixels. Each image pixel may comprise: a color router defining a router collection area on an upper surface; a first photosensitive region beneath the color router; a second photosensitive region beneath the color router; and a third photosensitive region beneath the color router. The color router may be configured to route photons of a first wavelength received at the router collection area to the first photosensitive region, route photons of a second wavelength received at the router collection area to the second photosensitive region, and route photons of a third wavelength received at the router collection area to the third photosensitive region.
    Type: Application
    Filed: December 14, 2022
    Publication date: July 20, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Byounghee LEE, Swarnal BORTHAKUR, Marc Allen SULFRIDGE
  • Publication number: 20230230989
    Abstract: Image pixels having IR sensors with reduced exposure to visible light. One example is an image sensor comprising: a photosensitive region; a lower optical filter above the photosensitive region, and the lower optical filter configured to filter visible light and to pass infrared light; and an upper optical filter above the lower optical filter, and the upper optical filter configured to filter visible light and to pass infrared light.
    Type: Application
    Filed: January 14, 2022
    Publication date: July 20, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Andrew Eugene PERKINS
  • Publication number: 20230223415
    Abstract: Implementations of image sensor packages may include: an image sensor die including a first largest planar side and a second largest planar side; an optically transmissive cover including a first largest planar side and a second largest planar side where the second largest planar side coupled to the first largest planar side of the image sensor die using an adhesive; and a light block material that fully covers edges of the image sensor die located between the first largest planar side and the second largest planar side of the image sensor die and fully covers edges of the optically transmissive cover between the first largest planar side and the second largest planar side of the optically transmissive cover. The light block material may extend across a portion of the first largest planar side and second largest planar side of the optically transmissive cover.
    Type: Application
    Filed: January 10, 2022
    Publication date: July 13, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Swarnal BORTHAKUR
  • Publication number: 20230215960
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 6, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Marc Allen SULFRIDGE
  • Publication number: 20230154959
    Abstract: An imaging device may include a plurality of single-photon avalanche diode (SPAD) pixels. The SPAD pixels may be overlapped by microlenses to direct light incident on the pixels onto photosensitive regions of the pixels and a containment grid with openings that surround each of the microlenses. During formation of the microlenses, the containment grid may prevent microlens material for adjacent SPAD pixels from merging. To ensure separation between the microlenses, the containment grid may be formed from material phobic to microlens material, or phobic material may be added over the containment grid material. Additionally, the containment grid may be formed from material that can absorb stray or off-angle light so that it does not reach the associated SPAD pixel, thereby reducing crosstalk during operation of the SPAD pixels.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 18, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Marc Allen SULFRIDGE, Swarnal BORTHAKUR, Nathan Wayne CHAPMAN
  • Patent number: 11652176
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. The light scattering structures may include a low-index material formed in trenches in the semiconductor substrate. One or more microlenses may focus light onto the semiconductor substrate. Areas of the semiconductor substrate that receive more light from the microlenses may have a higher density of light scattering structures to optimize light scattering while mitigating dark current.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: May 16, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Allen Sulfridge, Andrew Eugene Perkins
  • Patent number: 11626440
    Abstract: An imaging device may include a plurality of single-photon avalanche diode (SPAD) pixels. The SPAD pixels may be overlapped by microlenses to direct light incident on the pixels onto photosensitive regions of the pixels and a containment grid with openings that surround each of the microlenses. During formation of the microlenses, the containment grid may prevent microlens material for adjacent SPAD pixels from merging. To ensure separation between the microlenses, the containment grid may be formed from material phobic to microlens material, or phobic material may be added over the containment grid material. Additionally, the containment grid may be formed from material that can absorb stray or off-angle light so that it does not reach the associated SPAD pixel, thereby reducing crosstalk during operation of the SPAD pixels.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: April 11, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Marc Allen Sulfridge, Swarnal Borthakur, Nathan Wayne Chapman
  • Patent number: 11616152
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Allen Sulfridge
  • Publication number: 20230064356
    Abstract: A package includes an interposer substrate having at least one through-substrate via (TSV) electrically connecting a top surface of the interposer substrate to a bottom surface of the interposer substrate. The package further includes at least one semiconductor die having a top side, a bottom side, and a sidewall. The at least one semiconductor die is disposed on the interposer substrate with the bottom side electrically coupled to the top surface of the interposer substrate. A molding material is disposed on at least on a portion of the at least one semiconductor die, and an array of conductive material is disposed on the bottom surface of the interposer substrate. The array of conductive material forms the external contacts of the package.
    Type: Application
    Filed: August 25, 2022
    Publication date: March 2, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yusheng LIN, Swarnal BORTHAKUR, Larry Duane KINSMAN
  • Patent number: 11437426
    Abstract: Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: September 6, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Swarnal Borthakur
  • Patent number: 11342369
    Abstract: An image sensor package may include a semiconductor wafer having a pixel array, a color filter array (CFA) formed over the pixel array, and one or more lenses formed over the CFA. A light block layer may couple over the semiconductor wafer around a perimeter of the lenses and an encapsulation layer may be coupled around the perimeter of the lenses and over the light block layer. The light block layer may form an opening providing access to the lenses. A mold compound layer may be coupled over the encapsulation layer and the light block layer. A temporary protection layer may be used to protect the one or more lenses from contamination during application of the mold compound and/or during processes occurring outside of a cleanroom environment.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: May 24, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Larry Duane Kinsman, Swarnal Borthakur, Marc Allen Sulfridge, Scott Donald Churchwell, Brian Vaartstra
  • Publication number: 20220139982
    Abstract: An image sensor package may include a semiconductor wafer having a pixel array, a color filter array (CFA) formed over the pixel array, and one or more lenses formed over the CFA. A light block layer may couple over the semiconductor wafer around a perimeter of the lenses and an encapsulation layer may be coupled around the perimeter of the lenses and over the light block layer. The light block layer may form an opening providing access to the lenses. A mold compound layer may be coupled over the encapsulation layer and the light block layer. A temporary protection layer may be used to protect the one or more lenses from contamination during application of the mold compound and/or during processes occurring outside of a cleanroom environment.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 5, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Larry Duane KINSMAN, Swarnal BORTHAKUR, Marc Allen SULFRIDGE, Scott Donald CHURCHWELL, Brian VAARTSTRA