Patents by Inventor Ta Ching
Ta Ching has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210295881Abstract: A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the amplifier; an array of bit lines connected to corresponding memory cells; and an intra-sense-amplifier recycling arrangement configured to do as follows including: recovering a first charge from a first bit line associated with a first one of the memory cells, the first charge being associated with a preceding first evaluation performed by the sense amplifier; and boosting the branched line to a reference voltage including reusing the first charge to at least partially charge the branched line; and wherein the sense amplifier is configured to make a second evaluation of a stored value in a second memory cell relative to the reference voltage.Type: ApplicationFiled: June 8, 2021Publication date: September 23, 2021Inventors: Hung-Chang YU, Ta-Ching YEH
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Publication number: 20210275965Abstract: A method for removing boron is provided, which includes (a) mixing a carbon source material and a silicon source material in a chamber to form a solid state mixture, (b) heating the solid state mixture to a temperature of 1000° C. to 1600° C., and adjusting the pressure of the chamber to 1 torr to 100 torr. The method also includes (c) conducting a gas mixture of a first carrier gas and water vapor into the chamber to remove boron from the solid state mixture, and (d) conducting a second carrier gas into the chamber.Type: ApplicationFiled: May 21, 2021Publication date: September 9, 2021Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ta-Ching HSIAO, Chu-Pi JENG, Kuo-Lun HUANG, Mu-Hsi SUNG, Keng-Yang CHEN, Li-Duan TSAI
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Publication number: 20210208451Abstract: An electronic device is provided. The electronic device includes a first substrate, a second substrate, a light-shielding layer, and a color filter layer. The second substrate is disposed opposite to the first substrate. The light-shielding layer is disposed on the second substrate and includes an opening area and a light-shielding area. The color filter layer is disposed on the second substrate and includes a first color filter unit. The first color filter unit includes a first portion and a second portion. In addition, the first portion is at least partially overlapped with the opening area, the second portion is overlapped with the light-shielding area, and there is a first gap between the first portion and the second portion.Type: ApplicationFiled: December 14, 2020Publication date: July 8, 2021Inventors: Chen-Kuan KAO, Ta-Ching CHEN, Wei-Ming KAO, Chih-Chang HOU
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Patent number: 11052348Abstract: A method for removing boron is provided, which includes (a) mixing a carbon source material and a silicon source material in a chamber to form a solid state mixture, (b) heating the solid state mixture to a temperature of 1000° C. to 1600° C., and adjusting the pressure of the chamber to 1 torr to 100 torr. The method also includes (c) conducting a gas mixture of a first carrier gas and water vapor into the chamber to remove boron from the solid state mixture, and (d) conducting a second carrier gas into the chamber.Type: GrantFiled: December 26, 2017Date of Patent: July 6, 2021Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ta-Ching Hsiao, Chu-Pi Jeng, Kuo-Lun Huang, Mu-Hsi Sung, Keng-Yang Chen, Li-Duan Tsai
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Patent number: 11046582Abstract: A method of purifying silicon carbide powder includes: providing a container with a surface coated by a nitrogen-removal metal layer, wherein the nitrogen-removal metal layer is tantalum, niobium, tungsten, or a combination thereof; putting a silicon carbide powder into the container to contact the nitrogen-removal metal layer; and heating the silicon carbide powder under an inert gas at a pressure of 400 torr to 760 torr at 1700° C. to 2300° C. for 2 to 10 hours, thereby reducing the nitrogen content of the silicon carbide powder.Type: GrantFiled: December 27, 2019Date of Patent: June 29, 2021Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ta-Ching Hsiao, Chu-Pi Jeng, Mu-Hsi Sung, Kuo-Lun Huang
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Patent number: 11031051Abstract: A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the sense amplifier; a recycling arrangement selectively connectable to the branched line; an array of memory cells; an array of bit lines connected to corresponding memory cells in the array of memory cells; a multiplexer configured to selectively connect the branched line to a selected one in the array of memory cells through a corresponding line amongst the array of bit lines; and a controller configured to control the recycling arrangement and the multiplexer to perform intra-sense-amplifier recycling of a gleaned amount of charge (gleaned charge) recovered from a first read operation to a second read operation.Type: GrantFiled: November 27, 2019Date of Patent: June 8, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Chang Yu, Ta-Ching Yeh
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Publication number: 20210139330Abstract: A method of purifying silicon carbide powder includes: providing a container with a surface coated by a nitrogen-removal metal layer, wherein the nitrogen-removal metal layer is tantalum, niobium, tungsten, or a combination thereof; putting a silicon carbide powder into the container to contact the nitrogen-removal metal layer; and heating the silicon carbide powder under an inert gas at a pressure of 400 torr to 760 torr at 1700° C. to 2300° C. for 2 to 10 hours, thereby reducing the nitrogen content of the silicon carbide powder.Type: ApplicationFiled: December 27, 2019Publication date: May 13, 2021Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ta-Ching HSIAO, Chu-Pi JENG, Mu-Hsi SUNG, Kuo-Lun HUANG
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Publication number: 20210057231Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.Type: ApplicationFiled: October 26, 2020Publication date: February 25, 2021Inventors: Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu
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Publication number: 20210018848Abstract: Embodiments of the present disclosure relate to methods for defect inspection. After pattern features are formed in a structure layer, a dummy filling material having dissimilar optical properties from the structure layer is filled in the pattern features. The dissimilar optical properties between materials in the pattern features and the structure layer increase contrast in images captured by an inspection tool, thus increasing the defect capture rate.Type: ApplicationFiled: October 5, 2020Publication date: January 21, 2021Inventors: Ta-Ching YU, Shih-Che WANG, Shu-Hao CHANG, Yi-Hao CHEN, Chen-Yen KAO, Te-Chih HUANG, Yuan-Fu HSU
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Publication number: 20200373108Abstract: A keyboard including a substrate and a key structure is provided. The key structure is disposed on the substrate and includes a keycap, an antenna, and a sensor. The keycap is disposed on the substrate, and a length of the keycap is greater than a width of the keycap. The antenna is disposed on a back surface of the keycap facing toward the substrate. The sensor is disposed below the keycap and is electrically connected with the antenna.Type: ApplicationFiled: May 19, 2020Publication date: November 26, 2020Applicants: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology CorporationInventors: Ta-Ching Lu, Wu-Jeng Li, Chin-Ping Chan, Chih-Jen Kuo
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Patent number: 10818509Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.Type: GrantFiled: December 21, 2018Date of Patent: October 27, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu
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Patent number: 10795270Abstract: Embodiments of the present disclosure relate to methods for defect inspection. After pattern features are formed in a structure layer, a dummy filling material having dissimilar optical properties from the structure layer is filled in the pattern features. The dissimilar optical properties between materials in the pattern features and the structure layer increase contrast in images captured by an inspection tool, thus increasing the defect capture rate.Type: GrantFiled: December 6, 2017Date of Patent: October 6, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ta-Ching Yu, Shih-Che Wang, Shu-Hao Chang, Yi-Hao Chen, Chen-Yen Kao, Te-Chih Huang, Yuan-Fu Hsu
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Patent number: 10660358Abstract: The present invention provides a method to convert the intrinsic sugar of a juice into indigestible oligosaccharides (such as, low-polymerization fructose and sorbitol). The present method comprises using a Zymomonas mobilis biomass and fructosyltransferase as well as pressure treatment. Taking advantage of the present method, the drawbacks of drinking juices, such as too many sugar and calorie intake can be obviated, and thereby the present invention can offer healthier option to the consumers.Type: GrantFiled: May 19, 2017Date of Patent: May 26, 2020Assignee: Food Industry Research and Development InstituteInventors: Chung-Liang Chu, Ta-Ching Cheng, Yu-Chuan Tseng
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Patent number: 10622035Abstract: A sense amplifier includes a first sample and hold circuit, a second sample and hold circuit, a latch-type amplifier. The first sample and hold circuit is coupled to a bit line and configured to sample and hold memory cell data during a pre-charge phase of a sensing operation. The second sample and hold circuit is coupled to a reference bit line and configured to sample and hold data of a reference memory cell data during the pre-charge phase of the sensing operation. The latch-type amplifier, coupled to the first sample and hold circuit and the second sample and hold circuit, and configured to compare the memory cell data and the reference cell data during an evaluation phase of the sensing operation to output a sensing signal. The sense amplifier is isolated from the bit line and the reference bit line during the evaluation phase of the sensing operation. A sensing method adapted to a sense amplifier and a non-volatile memory include a sense amplifier are also introduced.Type: GrantFiled: December 28, 2018Date of Patent: April 14, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung-Chang Yu, Ta-Ching Yeh
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Publication number: 20200105314Abstract: A sense amplifier includes a first sample and hold circuit, a second sample and hold circuit, a latch-type amplifier. The first sample and hold circuit is coupled to a bit line and configured to sample and hold memory cell data during a pre-charge phase of a sensing operation. The second sample and hold circuit is coupled to a reference bit line and configured to sample and hold data of a reference memory cell data during the pre-charge phase of the sensing operation. The latch-type amplifier, coupled to the first sample and hold circuit and the second sample and hold circuit, and configured to compare the memory cell data and the reference cell data during an evaluation phase of the sensing operation to output a sensing signal. The sense amplifier is isolated from the bit line and the reference bit line during the evaluation phase of the sensing operation. A sensing method adapted to a sense amplifier and a non-volatile memory include a sense amplifier are also introduced.Type: ApplicationFiled: December 28, 2018Publication date: April 2, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung-Chang Yu, Ta-Ching Yeh
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Publication number: 20200098403Abstract: A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the sense amplifier; a recycling arrangement selectively connectable to the branched line; an array of memory cells; an array of bit lines connected to corresponding memory cells in the array of memory cells; a multiplexer configured to selectively connect the branched line to a selected one in the array of memory cells through a corresponding line amongst the array of bit lines; and a controller configured to control the recycling arrangement and the multiplexer to perform intra-sense-amplifier recycling of a gleaned amount of charge (gleaned charge) recovered from a first read operation to a second read operation.Type: ApplicationFiled: November 27, 2019Publication date: March 26, 2020Inventors: Hung-Chang YU, Ta-Ching YEH
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Patent number: 10497407Abstract: A semiconductor device includes: first and second terminal switches connected correspondingly between the first and second terminals of a sense amplifier and corresponding first and second nodes; first and second recycle switches connected correspondingly between the first and second nodes and corresponding third and fourth nodes; and first and second capacitors connected correspondingly between the third and fourth nodes; and wherein the first and second recycle switches are configured to selectively connect the first and second capacitors correspondingly to the first and second nodes in phases including as follows: during a recovery phase in which first and second gleaned amounts of charge (first and second gleaned charges) are recovered from corresponding selected ones of bit lines; and during a reuse phase in which the first and second gleaned charges are reused from correspondingly onto selected corresponding ones of the array of bit lines.Type: GrantFiled: November 30, 2018Date of Patent: December 3, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Chang Yu, Ta-Ching Yeh
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Publication number: 20190176085Abstract: A method for removing boron is provided, which includes (a) mixing a carbon source material and a silicon source material in a chamber to form a solid state mixture, (b) heating the solid state mixture to a temperature of 1000° C. to 1600° C., and adjusting the pressure of the chamber to 1 torr to 100 torr. The method also includes (c) conducting a gas mixture of a first carrier gas and water vapor into the chamber to remove boron from the solid state mixture, and (d) conducting a second carrier gas into the chamber.Type: ApplicationFiled: December 26, 2017Publication date: June 13, 2019Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ta-Ching HSIAO, Chu-Pi JENG, Kuo-Lun HUANG, Mu-Hsi SUNG, Keng-Yang CHEN, Li-Duan TSAI
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Patent number: 10276377Abstract: Various patterning methods involved with manufacturing semiconductor devices are disclosed herein. A method for fabricating a semiconductor structure (for example, interconnects) includes forming a patterned photoresist layer over a dielectric layer. An opening (hole) is formed in the patterned photoresist layer. In some embodiments, a surrounding wall of the patterned photoresist layer defines the opening, where the surrounding wall has a generally peanut-shaped cross section. The opening in the patterned photoresist layer can be used to form an opening in the dielectric layer, which can be filled with conductive material. In some embodiments, a chemical layer is formed over the patterned photoresist layer to form a pair of spaced apart holes defined by the chemical layer, and an etching process is performed on the dielectric layer using the chemical layer as an etching mask to form a pair of spaced apart holes through the dielectric layer.Type: GrantFiled: May 11, 2017Date of Patent: April 30, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yung-Sung Yen, Yu-Hsun Chen, Chen-Hau Wu, Chun-Kuang Chen, Ta-Ching Yu, Ken-Hsien Hsieh, Ming-Jhih Kuo, Ru-Gun Liu
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Publication number: 20190122895Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.Type: ApplicationFiled: December 21, 2018Publication date: April 25, 2019Inventors: Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu