Abstract: A method of making a photonic crystal includes step 1 providing a seed, followed by etching a surface of the seed to form thereon submicron voids; step 2 providing a graphite disk, followed by coating a side of the graphite disk with a graphite adhesive whereby the void-formed surface of the seed is attached to the graphite disk to form a seed holder; step 3 placing the seed holder above a growth chamber, followed by placing a raw material below the growth chamber; step 4 forming a thermal field in the growth chamber with a heating device to sublime the raw material; and step 5 controlling temperature, thermal field, atmosphere and pressure in the growth chamber to allow the gaseous raw material to be conveyed and deposited on the seed, thereby forming a photonic crystal.

Abstract: A method of making a photonic crystal includes step 1 providing a seed, followed by etching a surface of the seed to form thereon submicron voids; step 2 providing a graphite disk, followed by coating a side of the graphite disk with a graphite adhesive whereby the void-formed surface of the seed is attached to the graphite disk to form a seed holder; step 3 placing the seed holder above a growth chamber, followed by placing a raw material below the growth chamber; step 4 forming a thermal field in the growth chamber with a heating device to sublime the raw material; and step 5 controlling temperature, thermal field, atmosphere and pressure in the growth chamber to allow the gaseous raw material to be conveyed and deposited on the seed, thereby forming a photonic crystal.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack structure and a second gate stack structure on a substrate, and the first gate stack structure includes a first spacer adjacent to the second gate stack structure. The method also includes forming an U-shaped capping layer between the first gate stack structure and the second gate stack structure, and a lateral sidewall of the U-shaped capping layer is in direct contact with the first spacer of the first gate stack structure. A top of the lateral sidewall of the U-shaped capping layer is below a top of the first spacer of the first gate stack structure.

Abstract: A method includes forming a dielectric layer over a conductive feature. A first mask having a first opening is formed over the dielectric layer. A second mask is formed over the first mask. A third mask having a second opening is formed over the second mask. A fourth mask having a third opening is formed over the third mask, a portion of the third opening overlapping with the second opening. The portion of the third opening is transferred to the second mask to form a fourth opening, a portion of the fourth opening overlapping with the first opening. The portion of the fourth opening is transferred to the dielectric layer to form a fifth opening. The fifth opening is extended into the dielectric layer to form an extended fifth opening, the extended fifth opening exposing the conductive feature. The extended fifth opening is filled with a conductive material.

Abstract: A bicycle pedal includes a rotation axle; a pedal body movably coupled to the rotation axle and including an axle sleeve section, two hollowed areas, and a first retention block assembly and a second retention block assembly; first and second adjustment mechanisms respectively arranged in the hollowed areas and each including a fixing bolt arranged in the hollowed area, a holding seat fit over the fixing bolt and abutting one side of the first or second retention block assembly, an elastic element fit over the fixing bolt and having an end abutting one side of the second or first retention block assembly, and an adjustment section movably mounted to the holding seat and abutting an opposite end of the elastic element; and a clip block mounted, in a removable manner, between the first adjustment mechanism and the second adjustment mechanism.

Abstract: A power conversion apparatus is provided. The power conversion apparatus receives an AC input power by an input side and includes a capacitor, an AC-to-DC conversion unit and a discharge unit. The capacitor is connected with the input side. The AC-to-DC conversion unit is coupled to the input side, and configured to convert the AC input power after receiving the AC input power to generate a DC output power. The discharge unit is coupled to the capacitor and has at least two switch elements. The discharge unit enables the at least two switch elements when supply of the AC input power is interrupted, such that one of a first discharge path and a second discharge path formed by the at least two switch elements is taken to discharge or drain the energy stored in the capacitor.

Abstract: A fan blade structure applied to a centrifugal fan is provided. The fan blade structure includes a wheel hub and an annular vane. The wheel hub includes a plurality of connecting brackets, and the annular vane includes multiple crests and troughs which interlace to form a continuous curved surface. The continuous curved surface has an outer ring surface and an inner ring surface. The connecting brackets are connected to the inner ring surface and drive the annular vane to rotate.

Abstract: A dealing robot device includes a machine robotic arm, electric poker rack, and controller. The controller provides a controlling instruction, configures the machine robotic arm or electric poker rack so as to deal and recycle pokers when executing a dealing procedure. Therefore, the dealing robot device of present application can effectively reduce the human resource requirement of the dealing procedure of poke games.

Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.

Abstract: A method for fabricating a semiconductor device includes forming a hard mask (HM) layer over a material layer, forming a first trench in the HM layer, which extends along a first direction. The method also includes forming a first patterned resist layer over the HM layer. The first patterned resist layer has a first opening and a second opening a second direction. The first opening overlaps with the first trench in a middle portion of the first trench and the second opening overlaps with the first trench at an end portion of the first trench. The method also includes etching the HM layer through the first patterned resist layer to form a second trench and a third trench in the HM layer and forming a first feature to fill in a section of the first trench between the second trench and the third trench.

Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.

Abstract: A method for fabricating a semiconductor device includes forming a hard mask (HM) layer over a material layer, forming a first trench in the HM layer, which extends along a first direction. The method also includes forming a first patterned resist layer over the HM layer. The first patterned resist layer has a first opening and a second opening a second direction. The first opening overlaps with the first trench in a middle portion of the first trench and the second opening overlaps with the first trench at an end portion of the first trench. The method also includes etching the HM layer through the first patterned resist layer to form a second trench and a third trench in the HM layer and forming a first feature to fill in a section of the first trench between the second trench and the third trench.

Abstract: A food crumb catching system has a container with a primary enclosed compartment, a second smaller enclosed compartment, and a partition separating the two compartments. The partition has a plurality of spaced-apart openings to allow food crumbs located in the larger compartment to flow through into the second compartment. Removable lids are provided for each of the compartments. Another embodiment of the invention discloses a slideable arm. member located between the first compartment and the smaller second compartment. The arm member also has a plurality of openings and can be slid to a position where all food and its crumbs remain in the first compartment, to a second position in Which the arm member openings are aligned with the partition openings to allow the crumbs to fall into the second compartment.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack structure and a second gate stack structure on a substrate, and the first gate stack structure includes a first spacer adjacent to the second gate stack structure. The method also includes forming an U-shaped capping layer between the first gate stack structure and the second gate stack structure, and a lateral sidewall of the U-shaped capping layer is in direct contact with the first spacer of the first gate stack structure. A top of the lateral sidewall of the U-shaped capping layer is below a top of the first spacer of the first gate stack structure.

Abstract: A carrier belt for fabricating a device or component such as an anisotropic conductive film. The carrier belt includes a substrate having a sacrificial image enhancing layer. Microcavities are formed in the carrier by laser ablation through the image enhancing layer. After the image enhancement layer is removed, a plurality of conductive particles are distributed into an array of microcavities formed by laser ablation on a surface of a carrier belt and transferred to an adhesive layer. The image enhancing layer enables one to form microcavities with a fine pitch and spacing and partitions having a high aspect ratio.

Abstract: In accordance with some embodiments, a semiconductor device structure is provided. The semiconductor device structure includes a substrate, and the substrate has a cell region and a logic region. The semiconductor device structure also includes an isolation feature formed in the substrate and a first gate stack structure formed on the isolation feature and at the cell region. The semiconductor device structure further includes a second gate stack structure formed on the isolation feature and at the cell region, and the first gate stack structure is adjacent to the second gate stack structure. The isolation feature between the first gate stack structure and the second gate stack structure has a substantially planar topography.

Abstract: A low power consumption bleeder circuit is disclosed, and it is coupled to an alternating-current (AC) power source, an input filtering capacitor, and a rectifying filter. The low power consumption bleeder circuit includes a first switch component, a second switch component, and a controller. The first switch component is coupled to a first input terminal of the AC power source and a first connection terminal of the rectifying filter. The second switch component is coupled to a second input terminal of the AC power source and the first connection terminal of the rectifying filter. When the AC power source is detected to be removed, the controller controls at least one of the first switch component and the second switch component to be conductive.

Abstract: In accordance with some embodiments, a semiconductor device structure is provided. The semiconductor device structure includes a substrate, and the substrate has a cell region and a logic region. The semiconductor device structure also includes an isolation feature formed in the substrate and a first gate stack structure formed on the isolation feature and at the cell region. The semiconductor device structure further includes a second gate stack structure formed on the isolation feature and at the cell region, and the first gate stack structure is adjacent to the second gate stack structure. The isolation feature between the first gate stack structure and the second gate stack structure has a substantially planar topography.