Abstract: Inductor device includes first and a second coils. First coil is wound into plural first circles. Second coil is wound into plural second circles. First connection member is coupled to first circle between outermost and innermost sides among first circles located at first area and first circle on outermost side among first circles located at second area. Second connection member is coupled to second circle on outermost side among second circles located at first area and second circle between outermost and innermost sides among second circles located at second area. At least two first circles of first circles are located at first area, and half of first circle of first circles is located at second area. Half of second circle of second circles is located at first area, and at least two second circles of second circles are located at second area.

Abstract: An inductor device includes a first coil and a second coil. The first coil includes a first connection member and a plurality of first circles. At least two first circles of the first circles are located at a first area, and half of the first circle of the first circles is located at a second area. The second coil includes a second connection member and a plurality of second circles. At least two second circles of the second circles are located at the second area, and half of the second circle of the second circles is located at the first area. The first connection member is coupled to the at least two first circles and the half of the first circle. The second connection member is coupled to the at least two second circles and the half of the second circle.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, a first doped well, a second doped well, a mixed doped well, and a gate structure. The first, the second, and the mixed doped wells are disposed in the semiconductor substrate. At least a part of the first doped well and at least a part of the second doped well are located at two opposites sides of the gate structure in a horizontal direction respectively. The mixed doped well are located between the first doped well and the second doped well. The first and the second doped well include a first conductivity type dopant and a second conductivity type dopant respectively. The mixed doped well includes a mixed dopant. A part of the mixed dopant is identical to the first conductivity type dopant, and another part of the mixed dopant is identical to the second conductivity type dopant.

Abstract: A single-ended inductor comprises a first partial coil wound in a first direction; and a second partial coil wound in a second direction and adjoined the first partial coil; wherein, the second direction is opposite to the first direction to reduce the coupling of single-ended inductors and peripheral lines and reduce signal interference.

Abstract: An inductor device includes a first coil and a second coil. The first coil is wound into a plurality of first circles, and the second coil is wound into a plurality of second circles. At least two of the second circles are interlaced with at least two of the first circles on a first side. The at least two of the second circles are disposed adjacent to each other on the first side. At least one of the first circles is only interlaced with at least one of the second circles on a second side. At least another one of the first circles is only interlaced with at least another one of the second circles on the second side.

Abstract: A helical stacked integrated transformer formed by a first inductor and a second inductor includes a first helical coil that has a first outer coil and a first inner coil, a second helical coil that shares an overlapped region with the first helical coil and has a second outer coil and a second inner coil, and a connection structure that connects the first helical coil and the second helical coil. The first inner coil is located inside the first outer coil and the second inner coil is located inside the second outer coil. The first inductor includes a part of the first helical coil and a part of the second helical coil. The second inductor includes a part of the first helical coil and a part of the second helical coil.

Abstract: An integrated inductor is disclosed herein. The integrated inductor includes a substrate, an insulation layer, and an inductor. The substrate includes a trench. At least a portion of the insulation layer is formed in the trench. The inductor is disposed in the trench, and the inductor is disposed on the insulation layer.

Abstract: An inductor device includes a first and a second inductor unit. The first inductor unit includes a first and a second wire. The first wire is winded to form circles. The second wire is winded with the first wire to form circles. The first and/or the second wire are winded in an interlaced manner at a first terminal, a second terminal, a first side, and a second side. The second inductor unit includes a third and a fourth wire. The third wire is winded to form circles. The fourth wire is winded with the third wire to form circles. The third and/or the fourth wire are winded in an interlaced manner at a third terminal, a fourth terminal, a third side, and a fourth side. The first wired is coupled to the fourth wired, and the second wired is coupled to the third wired.

Abstract: A semiconductor element includes a first coil substantially located at a first plane; a second coil substantially located at the first plane; a connecting section that connects the first coil and the second coil; a third coil substantially located at a second plane different from the first plane; and a fourth coil substantially located at the second plane. The third coil and the first coil are connected through a through structure, and the fourth coil and the second coil are connected through a through structure. The third coil and the fourth are not directly connected.

Abstract: A semiconductor element includes a first spiral coil, a second spiral coil, a connecting section, a first guide segment, and a second guide segment. The first spiral coil is formed with a first end and a second end, and includes a first inner turn and a first outer turn. The first inner turn is located in a range surrounded by the outer turn, and the first end and the second end are located at the first inner turn. The second spiral coil and the first spiral coil are located in substantially a same metal layer. The connecting section connects the first spiral coil and the second spiral coil. The first guide segment is connected to the first end. The second guide segment is connected to the second end. The first guide segment and the second guide segment are fabricated in a metal layer different from a metal layer of the first spiral coil.

Abstract: A semiconductor element includes a first coil substantially located at a first plane; a second coil substantially located at the first plane; a connecting section that connects the first coil and the second coil; a third coil substantially located at a second plane different from the first plane; and a fourth coil substantially located at the second plane. The third coil and the first coil are connected through a through structure, and the fourth coil and the second coil are connected through a through structure. The third coil and the fourth are not directly connected.

Abstract: A semiconductor element includes a first spiral coil, a second spiral coil, a connecting section, a first guide segment, and a second guide segment. The first spiral coil is formed with a first end and a second end, and includes a first inner turn and a first outer turn. The first inner turn is located in a range surrounded by the outer turn, and the first end and the second end are located at the first inner turn. The second spiral coil and the first spiral coil are located in substantially a same metal layer. The connecting section connects the first spiral coil and the second spiral coil. The first guide segment is connected to the first end. The second guide segment is connected to the second end. The first guide segment and the second guide segment are fabricated in a metal layer different from a metal layer of the first spiral coil.

Abstract: An electronic device includes a first semiconductor die, a plurality of bumps, and a substrate. The first semiconductor die includes a first conductive feature. The bumps are disposed on the first semiconductor die and are connected to the first conductive feature. The substrate includes a second conductive feature. The bumps are electrically connected to the second conductive feature. The first conductive feature, the bumps, and the second conductive feature are configured to form at least one ring structure.

Abstract: A semiconductor element fabricated in a semiconductor structure and coupled to an application circuit through at least two connecting terminals. The semiconductor element includes a first spiral coil, a second spiral coil and a connecting portion. The first spiral coil is substantially located in a first metal layer and formed with a first end and a second end. The second spiral coil is substantially located in the first metal layer and formed with a third end and a fourth end. The connecting portion, which is located in a second metal layer, connects the second end and the fourth end. The first end is used as one of the two connecting terminals and the third end is used as the other of the two connecting terminals. The second metal layer is different from the first metal layer.

Abstract: A semiconductor package structure is disclosed. The semiconductor package structure comprises a plurality of layered structures, a plurality of wires, and a first ring structure. The wires are connected to each of the layered structures. The first ring structure is coupled to at least one of the layered structures and positioned between the wires.

Abstract: A FinFET that includes a semiconductor substrate that has insulating areas, a fin structure, a gate dielectric layer, a gate electrode structure, a drain structure and a source structure is provided. The fin structure is disposed to extend on the semiconductor substrate between two insulating areas. The gate dielectric layer is disposed to extend across two sides of the fin structure. The gate electrode structure is disposed on the gate dielectric layer. The drain structure is disposed at a first side of the gate electrode structure and has a first resistance relative to the gate electrode. The source structure is disposed at a second side of the gate electrode structure and has a second resistance relative to the gate electrode. The first resistance is larger than the second resistance.

Abstract: A transformer structure includes a first inductor and a second inductor. The first inductor has first turns. The second inductor has second turns. The first inductor and the second inductor are disposed in an interlaced manner. Except jump wires, the first and the second inductors are substantially disposed on a first layer. At least one of the first turns is substantially disposed between another first turn and one of the second turns.

Abstract: An 8-shaped inductive coil device that includes a first and a second spiral coils and a connection segment structure is provided. The first spiral coil includes first metal segments and crossing connection segments disposed at a first and a second metal layers respectively and includes first connection terminals. The second spiral coil includes second connection terminals. The connection segment structure electrically couples the first and the second connection terminals. The first and the second spiral coils are disposed along an imaginary line passing through a central region of each of ranges surrounded by the first and the second spiral coils. The connection segment structure and the crossing connection segments electrically couple the part of the first metal segments substantially vertical to the imaginary line, and the connection segment structure and the crossing connection segments are disposed substantially on the imaginary line.

Abstract: An inductor device includes a first and a second inductor. First inductor includes plural first wires and a first connection member. Second inductor includes plural second wires and a second connection member. Part of first wires are winded/located at a first area, and part of first wires are winded/located at a second area. First and second areas are located on two opposite sides of inductor device. First connection member connects first wire located at first area and located at second area. Part of second wires are winded/located at first area, and part of second wires are winded/located at second area. One terminal of second connection member connects a terminal of second wire at an inner side of inductor device, and another terminal of second connection member is disposed outside inductor device. First and second inductors are symmetrical with respect to a center line of inductor device.

Abstract: A fin field-effect transistor is provided. The fin field-effect transistor includes a substrate, a fin structure, a gate-stacked structure, and an isolation structure. The fin structure is disposed on the substrate, and the gate-stacked structure covers the fin structure. The isolation structure disposed on the substrate to isolate the gate-stacked structure from the substrate has different thicknesses in different portions.