Patents by Inventor Tadahiro Ohmi

Tadahiro Ohmi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9957406
    Abstract: Method for increasing the smoothness of the free surface area of a PFA film, provided on a component by sequentially exposing it to a temperature higher than its melting temperature so as to melt at least the free surface area, lowering the temperature to solidify the melted portion, remelting the free surface area by exposing it to a temperature of at least the PFA melting temperature and again lowering the temperature. The PFA film may be provided on Al2O3, Ni or NiF2 film.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 1, 2018
    Assignee: TOHOKU UNIVERSITY
    Inventors: Masamichi Iwaki, Tadahiro Ohmi, Kenji Ohyama, Isao Akutsu
  • Patent number: 9921089
    Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m (P1-P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: March 20, 2018
    Assignees: Fujikin Incorporated, National University Corporation Tohuku University, Tokyo Electron Ltd.
    Inventors: Tadahiro Ohmi, Masahito Saito, Shoichi Hino, Tsuyoshi Shimazu, Kazuyuki Miura, Kouji Nishino, Masaaki Nagase, Katsuyuki Sugita, Kaoru Hirata, Ryousuke Dohi, Takashi Hirose, Tsutomu Shinohara, Nobukazu Ikeda, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka
  • Patent number: 9875899
    Abstract: The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: January 23, 2018
    Assignees: FUJI ELECTRIC CO., LTD., TOHOKU UNIVERSITY
    Inventors: Hiroshi Kambayashi, Katsunori Ueno, Takehiko Nomura, Yoshihiro Sato, Akinobu Teramoto, Tadahiro Ohmi
  • Patent number: 9812302
    Abstract: In a magnetron sputtering apparatus configured such that a magnetic field pattern on a target surface moves with time by means of a rotary magnet group, it is to solve a problem that the failure rate of substrates to be processed becomes high upon plasma ignition or extinction, thereby providing a magnetron sputtering apparatus in which the failure rate of the substrates is smaller than conventional. In a magnetron sputtering apparatus, a plasma shielding member having a slit is disposed on an opposite side of a target with respect to a rotary magnet group. The distance between the plasma shielding member and the substrate is set shorter than the electron mean free path or the sheath width. Further, the width and the length of the slit are controlled to prevent impingement of plasma on the processing substrate. This makes it possible to reduce the failure rate of the substrates.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: November 7, 2017
    Assignees: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
  • Patent number: 9767994
    Abstract: A shower plate is disposed in a processing chamber in a plasma processing apparatus, and plasma excitation gas is released into the processing chamber so as to generate plasma. A ceramic member having a plurality of gas release holes having a diameter of 20 ?m to 70 ?m, and/or a porous gas-communicating body having pores having a maximum diameter of not more than 75 ?m communicating in the gas-communicating direction are sintered and bonded integrally with the inside of each of a plurality of vertical holes which act as release paths for the plasma excitation gas.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: September 19, 2017
    Assignees: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Masahiro Okesaku, Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka, Toshihisa Nozawa, Atsutoshi Inokuchi, Kiyotaka Ishibashi
  • Patent number: 9476137
    Abstract: A metal oxide film suitable for protection of metals, composed mainly of aluminum. A metal oxide film includes a film of an oxide of a metal composed mainly of aluminum, having a thickness of 10 nm or greater, and exhibiting a moisture release rate from the film of 1E18 mol./cm2 or less. Further, there is provided a process for producing a metal oxide film, wherein a metal composed mainly of aluminum is subjected to anodic oxidation in a chemical solution of 4 to 10 pH value so as to obtain a metal oxide film.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: October 25, 2016
    Assignees: Tohoku University, Mitsubishi Chemical Corporation
    Inventors: Tadahiro Ohmi, Yasuyuki Shirai, Hitoshi Morinaga, Yasuhiro Kawase, Masafumi Kitano, Fumikazu Mizutani, Makoto Ishikawa
  • Publication number: 20160276171
    Abstract: In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed.
    Type: Application
    Filed: September 17, 2015
    Publication date: September 22, 2016
    Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Tadahiro OHMI, Akinobu TERAMOTO, Tomoyuki SUWA
  • Publication number: 20160274595
    Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m(P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.
    Type: Application
    Filed: June 2, 2016
    Publication date: September 22, 2016
    Inventors: Tadahiro Ohmi, Masahito Saito, Shoichi Hino, Tsuyoshi Shimazu, Kazuyuki Miura, Kouji Nishino, Masaaki Nagase, Katsuyuki Sugita, Kaoru Hirata, Ryousuke Dohi, Takashi Hirose, Tsutomu Shinohara, Nobukazu Ikeda, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka
  • Patent number: 9385042
    Abstract: This invention provides a technique advantageous to improve the operating speed of an integrated circuit. In a semiconductor device in which an n-type transistor and a p-type transistor are formed on the (551) plane of silicon, the thickness of a silicide layer which is in contact with a diffusion region of the n-type transistor is smaller than that of a silicide layer which is in contact with a diffusion region of the p-type transistor.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 5, 2016
    Assignee: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Tadahiro Ohmi, Hiroaki Tanaka
  • Patent number: 9383758
    Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m(P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: July 5, 2016
    Assignees: Fujikin Incorporated, National University Corporation Tohoku University, Tokyo Electron Ltd.
    Inventors: Tadahiro Ohmi, Masahito Saito, Shoichi Hino, Tsuyoshi Shimazu, Kazuyuki Miura, Kouji Nishino, Masaaki Nagase, Katsuyuki Sugita, Kaoru Hirata, Ryousuke Dohi, Takashi Hirose, Tsutomu Shinohara, Nobukazu Ikeda, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka
  • Publication number: 20160172666
    Abstract: An electrode structure is provided. The electrode structure includes an electron donating region, an electrode withdrawing region different from the electron donating region, and a region configured to electrically isolate at least surfaces of the electron donating region and the electrode withdrawing region.
    Type: Application
    Filed: February 23, 2016
    Publication date: June 16, 2016
    Applicants: New Nippon Metal Mining Industry Co., Ltd., Tohoku University
    Inventors: Kenzo Shimizu, Tadahiro Ohmi, Tetsuya Goto
  • Publication number: 20160109886
    Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m(P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.
    Type: Application
    Filed: December 21, 2015
    Publication date: April 21, 2016
    Inventors: Tadahiro Ohmi, Masahito Saito, Shoichi Hino, Tsuyoshi Shimazu, Kazuyuki Miura, Kouji Nishino, Masaaki Nagase, Katsuyuki Sugita, Kaoru Hirata, Ryousuke Dohi, Takashi Hirose, Tsutomu Shinohara, Nobukazu Ikeda, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka
  • Publication number: 20160064213
    Abstract: There is provided a method for processing an inner wall surface of a micro vacancy, capable of reliably etching and cleaning even if the hole provided to the substrate to be processed is narrow and deep. The substrate has a surface on which a processing solution is to be applied and a micro vacancy with an opening on the surface. An aspect ratio (l/r) of the micro vacancy being at least 5, or the aspect ratio being less than 5 and a ratio (V/S) of a micro vacancy volume (V) to a surface area of the opening (S) being at least 3. The substrate is arranged in a processing space. Next, the processing space is depressurized, and subsequently the processing solution is introduced into the processing space so as to process the inner wall surface of the micro vacancy.
    Type: Application
    Filed: April 18, 2013
    Publication date: March 3, 2016
    Inventors: Takeshi Sakai, Tatsuro Yoshida, Ryosuke Hiratsuka, Syun Ishikawa, Tadahiro Ohmi, Rui Hasebe, Jun Takano, Hirohisa Kikuyama, Masashi Yamamoto
  • Patent number: 9240505
    Abstract: A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO3(b)H2O(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiO2 layer with the highly concentrated fluonitric acid is significantly lowered by the appropriate selection of its composition as compared with the etching rate of the Si substrate, and etch the Si substrate until the SiO2 layer is exposed. In this way, it is possible to rapidly etch the Si substrate and significantly enhance the flatness of the etched surface.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 19, 2016
    Assignee: TOHOKU UNIVERSITY
    Inventors: Tadahiro Ohmi, Tomotsugu Ohashi, Kazuhiro Yoshikawa, Tatsuro Yoshida, Teppei Uchimura, Kazuki Soeda, Shigetoshi Sugawa
  • Patent number: 9231130
    Abstract: Provided is a photoelectric conversion element that has an nip structure formed of amorphous silicon and that is improved in energy conversion efficiency by a structure in which an n+-type a-Si layer is in contact with a transparent electrode formed by an n+-type ZnO layer. This makes it possible to realize photoelectric conversion elements and a solar cell module or facility with large area and high power with an influence on the global resources minimized.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: January 5, 2016
    Assignee: National University Corporation Tohoku University
    Inventor: Tadahiro Ohmi
  • Patent number: 9230799
    Abstract: A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: January 5, 2016
    Assignees: TOHOKU UNIVERSITY, Fuji Electric Co., Ltd., TOKYO ELECTRON LIMITED
    Inventors: Akinobu Teramoto, Hiroshi Kambayashi, Hirokazu Ueda, Yuichiro Morozumi, Katsushige Harada, Kazuhide Hasebe, Tadahiro Ohmi
  • Patent number: 9196460
    Abstract: A ratio between gas conductances of a main gas passage and a plurality of branch gas passages is increased. A plasma processing apparatus is an apparatus for plasma-processing an object to be processed by exciting gas, and includes a processing container; a gas supply source for supplying a desired gas; a main gas passage distributing the gas supplied from the gas supply source; a plurality of branch gas passages connected to a lower stream side of the main gas passage; a plurality of throttle portions formed on the plurality of branch gas passages to narrow the branch gas passages; and one, two, or more gas discharging holes per each of the branch gas passages, for discharging the gas that has passed through the plurality of throttle portions formed on the plurality of branch gas passages into the processing container.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: November 24, 2015
    Assignees: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITY
    Inventors: Masaki Hirayama, Tadahiro Ohmi
  • Patent number: 9157681
    Abstract: In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: October 13, 2015
    Assignee: National University Corporation Tohoku University
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Tomoyuki Suwa
  • Patent number: 9155209
    Abstract: A flex-rigid printed wiring board is provided which can retain flexibility of a flexible portion while increasing durability of the flexible portion against folding, and can ensure conduction in a rigid portion, and a method of manufacturing the printed wiring board. The flex-rigid printed wiring board includes a conductor layer provided on at least one face of a base film, one region of the wiring board containing the base film being a rigid region, an another region containing the base film being a flexible region. The average thickness “tf” of the conductor layer on the base film formed in the flexible region and the average thickness “tR” of the conductor layer on the base film formed in the rigid region satisfy the relationship of tf<tR.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 6, 2015
    Assignees: DAISHO DENSHI CO., LTD., TOHOKU UNIVERSITY
    Inventors: Akihiro Sato, Masahiro Sasaki, Tadahiro Ohmi, Akihiro Morimoto
  • Patent number: 9133951
    Abstract: An orifice changeable pressure type flow rate control apparatus comprises a valve body of a control valve for a pressure type flow rate control apparatus installed between an inlet side fitting block provided with a coupling part of a fluid supply pipe and an outlet side fitting block provided with a coupling part of a fluid takeout pipe; a fluid inlet side of the valve body and the inlet side fitting block, and a fluid outlet side of the valve body and the outlet side fitting block are detachably and hermitically connected respectively so a flow passage for gases through the control valve is formed; and, a gasket type orifice for a pressure type flow rate control apparatus is removably inserted between a gasket type orifice insertion hole provided on the outlet side of the valve body and a gasket type orifice insertion hole of the outlet side fitting block.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: September 15, 2015
    Assignees: Fujikin Incorporated, National University Corporation Tohoku University
    Inventors: Tadahiro Ohmi, Kouji Nishino, Ryousuke Dohi, Nobukazu Ikeda, Masaaki Nagase, Kaoru Hirata, Katsuyuki Sugita, Tsutomu Shinohara, Takashi Hirose, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka