Patents by Inventor Tadamasa Toma

Tadamasa Toma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11889078
    Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: January 30, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240031586
    Abstract: A decoding method includes: decoding, from a bitstream, cropping information indicating an amount of cropping corresponding to an amount of padding of a first subpicture that is a subpicture (i) which is among a plurality of subpictures constituting a picture, (ii) in which at least one end of the subpicture is included in at least one end of the picture, (iii) to which at least one subpicture is adjacent on a side opposite to the at least one end of the subpicture, and (iv) which is padded so that a size of the subpicture reaches an integer multiple of a preconfigured coding unit size in at least one direction; decoding the first subpicture from the bitstream; and cropping the first subpicture according to the amount of cropping.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 25, 2024
    Inventors: Virginie DRUGEON, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240031591
    Abstract: An encoding method is provided for encoding a picture to generate a coded stream. The encoding method includes: generating a first prediction image of a current block included in a current picture by referring to a first region included in a reference picture different from the current picture; operating a bi-directional optical flow process to generate a second prediction image based on the first prediction image by referring to a second region included in the first region; and encoding the current block based on the second prediction image.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Inventors: Takashi HASHIMOTO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI, Ryuichi KANOH
  • Publication number: 20240031570
    Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
    Type: Application
    Filed: August 4, 2023
    Publication date: January 25, 2024
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240031581
    Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.
    Type: Application
    Filed: October 4, 2023
    Publication date: January 25, 2024
    Inventors: Masato OHKAWA, Hideo SAITOU, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20240031569
    Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
    Type: Application
    Filed: August 3, 2023
    Publication date: January 25, 2024
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11882283
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; splits the block into a plurality of sub blocks in a second direction parallel to the second shorter side of the block when the ternary split process is not allowed; and encodes the plurality of sub blocks.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: January 23, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Sughosh Pavan Shashidhar, Hai Wei Sun, Chong Soon Lim, Ru Ling Liao, Han Boon Teo, Jing Ya Li, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh, Tadamasa Toma
  • Patent number: 11882279
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: January 23, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11877009
    Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: January 16, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Che Wei Kuo, Chong Soon Lim, Chu Tong Wang, Han Boon Teo, Hai Wei Sun, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11876992
    Abstract: An image decoder parses an encoded bitstream to obtain a first parameter and a second parameter, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image decoder executes the first partition mode including; splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and decoding the plurality of sub blocks.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: January 16, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Ru Ling Liao, Han Boon Teo, Takahiro Nishi, Ryuichi Kanoh, Tadamasa Toma
  • Patent number: 11876959
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: January 16, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Chong Soon Lim, Han Boon Teo, Che Wei Kuo, Hai Wei Sun, Chu Tong Wang, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11876963
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: January 16, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11876991
    Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: January 16, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240015322
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Inventors: Jing Ya LI, Chong Soon LIM, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Publication number: 20240013442
    Abstract: An image encoding device encodes an image to generate a bitstream, adds, to the bitstream, one or more parameters that are not used for encoding the image, transmits, to an image decoding device, the bitstream to which the one or more parameters have been added, and outputs the image and the one or more parameters to a first processing device that executes predetermined task processing.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Han Boon TEO, Chong Soon LIM, Chu Tong WANG, Tadamasa TOMA
  • Patent number: 11870992
    Abstract: An encoder that encodes a video includes a processor and memory. Using the memory, the processor: derives a prediction error of an image included in the video, by subtracting a prediction image of the image from the image; determines a secondary transform basis based on a primary transform basis, the primary transform basis being a transform basis for a primary transform to be performed on the prediction error, the secondary transform basis being a transform basis for a secondary transform to be performed on a result of the primary transform; performs the primary transform on the prediction error using the primary transform basis; performs the secondary transform on a result of the primary transform using the secondary transform basis; performs quantization on a result of the secondary transform; and encodes a result of the quantization as data of the image.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: January 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • Patent number: 11871028
    Abstract: An encoder: generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and generates a final prediction image of the current block by applying an update process to the first prediction image. Candidates for the update process include a first process and a second process. The first process is a BDOF process. The second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block. In the applying of the update process, the first process and the second process are mutually exclusively applied.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: January 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11871077
    Abstract: A transmission method in the present disclosure includes; obtaining an image and image signal characteristics information indicating one of an opto-electrical transfer function (OETF) or an electro-optical transfer function (EOTF) as image signal characteristics of the image; and transmitting a signal including the image and the image signal characteristics information. According to the transmission method in the present disclosure, a receiving device that received a high dynamic range (HDR) image and a standard dynamic range (SDR) image transmitted through broadcasting or the like can display these images appropriately.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: January 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takahiro Nishi, Tadamasa Toma
  • Patent number: 11871016
    Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: January 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20240007661
    Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Yusuke KATO