Patents by Inventor Tadamasa Toma

Tadamasa Toma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941955
    Abstract: A method includes causing a computer of a communication terminal to perform a process including acquiring, in response to receipt of a beacon signal from a vending machine, identification information and type information and stock information of drinks from the vending machine by short-range wireless communication; acquiring preference information on drinks of a user of the communication terminal; acquiring current biological information of the user; generating, based on the identification information, the type information, the stock information, the preference information, and the biological information, a push notification screen that recommends at least one drink matching a preference of the user indicated by the preference information in relation to a current physical condition of the user indicated by the biological information from among the drinks stored in the vending machine indicated by the identification information; and displaying the push notification screen on a display of the communication term
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: March 26, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroshi Yahata, Takahiro Nishi, Tadamasa Toma, Toshiyasu Sugio
  • Publication number: 20240098287
    Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Inventors: Takahiro NISHI, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11936893
    Abstract: An encoder that includes memory and circuitry coupled to the memory. The circuitry encodes a slice into one or more data access regions in a variable length encoding process. The circuitry encodes one or more offsets into a slice header, based on a flag written into a sequence header and a total number of the one or more data access regions. The one or more offsets each specify a head position of a corresponding one of the one or more data access regions in a bitstream. When the flag indicates that the one or more offsets are to be encoded and the total number is at least two, the one or more offsets are encoded. The flag switches between encoding and not encoding the one or more offsets regardless of whether the total number is at least two.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11936887
    Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11936886
    Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry, for each of temporal sub-layers for temporal scalability different from spatial scalability, stores first parameters into buffering period supplemental enhancement information (SEI) and encodes the first parameters. The first parameters present initial delays in timing to extract data from a coded picture buffer (CPB). The circuitry stores a second parameter into the buffering period SEI and encodes the second parameter. The second parameter indicates a total number of the temporal sub-layers. A value of the second parameter is equal to a value of a third parameter that is encoded into a sequence parameter set and indicates a total number of the temporal sub-layers.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20240089431
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. Using the memory, the processing circuitry is configured to: change values of pixels in a first block and a second block to filter a boundary between the first block and the second block. The pixels include type one pixels and type two pixels different from the type one pixels. The first set of filter coefficients applied to the type one pixels in the first block and the second set of filter coefficients applied to the type one pixels in the second block are selected to be asymmetrical with respect to the boundary.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240089479
    Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20240089477
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs prediction on an image. A motion vector predictor list used in the prediction includes a spatially neighboring motion vector predictor obtained from a block spatially neighboring a current block, and a spatially broad motion vector predictor obtained from a block positioned at any of a plurality of predetermined positions in a second range that is broader than a first range that spatially neighbors the current block. The plurality of predetermined positions are defined by a regular interval using the top-left of a current picture as a reference point.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240089493
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Patent number: 11929102
    Abstract: A decoding system decodes a video stream, which is encoded video information. The decoding system includes a decoder that acquires the video steam and generates decoded video information, a maximum luminance information acquirer that acquires maximum luminance information indicating the maximum luminance of the video stream from the video stream, and an outputter that outputs the decoded video information along with the maximum luminance information. In in a case where the video stream includes a base video stream and an enhanced video stream, the decoder generates base video information by decoding the base video stream, an enhanced video information by decoding the enhanced video stream, and generates the decoded video information based on the base video information and the enhanced video information, and the outputter outputs the decoded video information, along with the maximum luminance information.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: March 12, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Hiroshi Yahata, Tadamasa Toma, Tomoki Ogawa
  • Patent number: 11930206
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: March 12, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20240080453
    Abstract: An image encoding method includes: determining respective decoding times of a plurality of pictures included in a motion picture such that decoding times of a plurality of lower layer picture which do not belong to a highest layer of a plurality of layers are spaced at regular intervals, and decoding timing for each of the plurality of lower layer pictures is identical between a case where the plurality of encoded pictures included in the motion picture are decoded and a case where only the plurality of lower layer pictures are decoded, encoding each of the plurality of pictures included in the motion picture in accordance with the encoding order according to the determined respective decoding times, and generating an encoded stream including the plurality of encoded pictures and the determined respective decoding times for the plurality of pictures.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: Tadamasa TOMA, Takahiro NISHI, Kengo TERADA
  • Patent number: 11924456
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 5, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11924423
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: March 5, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240070765
    Abstract: In a method for providing information, menu items included in menu information regarding a second restaurant indicated by a store identifier are arranged in order according to taste information regarding a user on the basis of the taste information and the menu information, the menu information being obtained, over a network before the store identifier is obtained from a terminal apparatus, from a server associated with the second restaurant indicated by the store identifier. Menu information regarding the menu items arranged in the order is transmitted to the terminal apparatus and displayed on a display screen of the terminal apparatus.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 29, 2024
    Inventors: HIROSHI YAHATA, TAKAHIRO NISHI, TADAMASA TOMA, TOSHIYASU SUGIO
  • Publication number: 20240073441
    Abstract: An encoder that encodes a video includes circuitry and memory connected to the circuitry. In operation, the circuitry: generates a prediction image on a per sub-block basis; and when a sub-block size is 4×4, applies a boundary smoothing process only to sub-block boundaries having boundary positions that are integer multiples of 8.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240073442
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.
    Type: Application
    Filed: October 30, 2023
    Publication date: February 29, 2024
    Inventors: Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Patent number: 11917150
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: February 27, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11917179
    Abstract: A decoder includes circuitry which, in operation, parses a first flag indicating whether a CCALF (cross component adaptive loop filtering) process is enabled for a first block located adjacent to a left side of a current block; parses a second flag indicating whether the CCALF process is enabled for a second block located adjacent to an upper side of the current block; determines a first index associated with a color component of the current block; and derives a second index indicating a context model, using the first flag, the second flag, and the first index. The circuitry, in operation, performs entropy decoding of a third flag indicating whether the CCALF process is enabled for the current block, using the context model indicated by the second index; and performs the CCALF process on the current block in response to the third flag indicating the CCALF process is enabled for the current block.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: February 27, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Che-Wei Kuo, Chong Soon Lim, Han Boon Teo, Jing Ya Li, Hai Wei Sun, Chu Tong Wang, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20240064359
    Abstract: A transmitting method according to one aspect of the present disclosure includes transmitting a first stream, the first stream including: timing update identification information id1 indicating whether or not a correspondence relationship between a first reference clock and a second reference clock has been updated, the first reference clock being used to transmit and receive the first stream, and the second reference clock being used to transmit and receive a second stream related to another content to be reproduced in synchronization with the content related to the first stream; a first time according to the first reference clock; and a second time according to the second reference clock, the second time being associated with the first time based on the updated correspondence relationship.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 22, 2024
    Inventors: Tadamasa TOMA, Noritaka IGUCHI, Hisaya KATOU