Patents by Inventor Tadamasa Toma

Tadamasa Toma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240007683
    Abstract: Provided is a video reception method performed by a video reception apparatus including a display. The video reception method includes: receiving a reception signal multiplexed from video data and audio data; outputting, as first transfer characteristics information, transfer characteristics obtained by demultiplexing the reception signal; outputting, as second transfer characteristics information, transfer characteristics obtained by decoding the video data, the second transfer characteristics information being information for specifying, at frame accuracy, a transfer function corresponding to a luminance dynamic range of the video data; and displaying the video data while controlling a luminance dynamic range of the display at frame accuracy according to the second transfer characteristics information.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240007644
    Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
    Type: Application
    Filed: September 14, 2023
    Publication date: January 4, 2024
    Inventors: Ru Ling LIAO, Chong Soon LIM, Hai Wei SUN, Han Boon TEO, Jing Ya LI, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240007686
    Abstract: A transmitting method stores data making up a coded stream into a predetermined data unit and transmits the stored data in the predetermined data unit. The transmitting method further generates presentation time information indicating a presentation time of the predetermined data unit, based on reference time information received from an external source; and transmits the predetermined data unit, first control information which includes the generated presentation time information, and second control information which includes leap second information indicating whether or not the presentation time information is a time that is before a leap second adjustment. A receiving method receives the predetermined data unit, first control information, and second control information; and reproduces the received predetermined data unit based on the first and second control information that are received.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 4, 2024
    Inventors: Noritaka IGUCHI, Tadamasa TOMA
  • Publication number: 20240007621
    Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: determines whether to use intra prediction for the current block; and when determining to use intra prediction, (i) performs a first transform on a residual signal of the current block using a first transform basis to generate first transform coefficients; and (ii-1) performs a second transform on the first transform coefficients using a second transform basis to generate second transform coefficients and quantizes the second transform coefficients, when an intra prediction mode of the current block is a predetermined mode or when the first transform basis is same as a predetermined transform basis; and (ii-2) quantizes the first transform coefficients without performing the second transform when the intra prediction mode is different from the predetermined mode and the first transform basis is different from the predetermined transform basis.
    Type: Application
    Filed: September 14, 2023
    Publication date: January 4, 2024
    Inventors: Masato OHKAWA, Hideo SAITOU, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 11863743
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: January 2, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Patent number: 11863741
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. Using the memory, the processing circuitry is configured to: change values of pixels in a first block and a second block to filter a boundary between the first block and the second block. The pixels include type one pixels and type two pixels different from the type one pixels. The first set of filter coefficients applied to the type one pixels in the first block and the second set of filter coefficients applied to the type one pixels in the second block are selected to be asymmetrical with respect to the boundary based on block sizes of the first block and the second block.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: January 2, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11863785
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: January 2, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi
  • Publication number: 20230421809
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Application
    Filed: September 6, 2023
    Publication date: December 28, 2023
    Inventors: Chong Soon LIM, Han Boon TEO, Takahiro NISHI, Tadamasa TOMA, Ru Ling LIAO, Sughosh Pavan SHASHIDHAR, Hai Wei SUN
  • Publication number: 20230421762
    Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
    Type: Application
    Filed: September 6, 2023
    Publication date: December 28, 2023
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Patent number: 11856192
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Patent number: 11856217
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11856200
    Abstract: A data output apparatus includes: a video decoder that decodes a video stream to generate a first video signal; an external metadata acquisition unit that acquires one or more pieces of metadata corresponding to one or more first conversion modes; an HDR metadata interpreter that interprets one of the one or more pieces of metadata to acquire characteristic data and conversion auxiliary data; a DR converter that supports one or more second conversion modes and performs conversion processing of a luminance range of the first video signal based on the conversion auxiliary data to generate a second video signal; and an HDMI output unit that outputs the second video signal to a display apparatus.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tadamasa Toma, Masayuki Kozuka, Takahiro Nishi, Kengo Terada
  • Patent number: 11856193
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: December 26, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Publication number: 20230412832
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. In operation, the circuitry: derives a base motion vector to be used in predicting a current block to be encoded; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; modifies the first motion vector when the motion vector difference is determined to be greater than the threshold, and does not modify the first motion vector when the motion vector difference is determined not to be greater than the threshold; and encodes the current block using the first motion vector modified or the first motion vector not modified.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Publication number: 20230412840
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Application
    Filed: September 6, 2023
    Publication date: December 21, 2023
    Inventors: Chong Soon LIM, Han Boon TEO, Takahiro NISHI, Tadamasa TOMA, Ru Ling LIAO, Sughosh Pavan SHASHIDHAR, Hai Wei SUN
  • Publication number: 20230412795
    Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH
  • Patent number: 11849139
    Abstract: An encoder that encodes a video includes circuitry and memory connected to the circuitry. In operation, the circuitry: generates a prediction image on a per sub-block basis; and when a sub-block size is 4×4, applies a boundary smoothing process only to sub-block boundaries having boundary positions that are integer multiples of 8.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: December 19, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11849147
    Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: December 19, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Jing Ya Li, Che Wei Kuo, Chong Soon Lim, Chu Tong Wang, Han Boon Teo, Hai Wei Sun, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11849166
    Abstract: A transmitting method according to one aspect of the present disclosure includes transmitting a first stream, the first stream including: timing update identification information id1 indicating whether or not a correspondence relationship between a first reference clock and a second reference clock has been updated, the first reference clock being used to transmit and receive the first stream, and the second reference clock being used to transmit and receive a second stream related to another content to be reproduced in synchronization with the content related to the first stream; a first time according to the first reference clock; and a second time according to the second reference clock, the second time being associated with the first time based on the updated correspondence relationship.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: December 19, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadamasa Toma, Noritaka Iguchi, Hisaya Katou
  • Publication number: 20230401957
    Abstract: A three-dimensional information processing method includes: obtaining, via a communication channel, map data that includes first three-dimensional position information; generating second three-dimensional position information from information detected by a sensor; judging whether one of the first three-dimensional position information and the second three-dimensional position information is abnormal by performing, on one of the first three-dimensional position information and the second three-dimensional position information, a process of judging whether an abnormality is present; determining a coping operation to cope with the abnormality when one of the first three-dimensional position information and the second three-dimensional position information is judged to be abnormal; and executing a control that is required to perform the coping operation.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 14, 2023
    Inventors: Tadamasa TOMA, Takahiro NISHI, Toshiyasu SUGIO, Toru MATSUNOBU, Satoshi YOSHIKAWA, Tatsuya KOYAMA