Patents by Inventor Tadashi Maeda

Tadashi Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8673685
    Abstract: Disclosed is an electronic component mounting line on which a substrate undergoes solder paste printing, electronic component placements, and then reflow, while being moved from upstream to downstream. The line includes: a substrate feeding machine; a printing machine for applying solder paste to a first placement area of the substrate; a first electronic component placement machine for placing a first electronic component on the first placement area; a second electronic component placement machine for dispensing a thermosetting resin onto a reinforcement position on a peripheral edge portion of a second placement area of the substrate, and for placing on the area the second electronic component having solder bumps; and a reflow machine for bonding the electronic components to the substrate, by heating and cooling the resultant. The second electronic component is placed after the resin is dispensed, such that a peripheral edge portion thereof comes in contact with the resin.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: March 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Tadashi Maeda, Hiroki Maruo, Tsubasa Saeki
  • Publication number: 20140073088
    Abstract: Disclosed is an electronic component mounting line on which a substrate undergoes solder paste printing, electronic component placements, and then reflow, while being moved from upstream to downstream. The line includes: a substrate feeding machine; a printing machine for applying solder paste to a first placement area of the substrate; a first electronic component placement machine for placing a first electronic component on the first placement area; a second electronic component placement machine for dispensing a thermosetting resin onto a reinforcement position on a peripheral edge portion of a second placement area of the substrate, and for placing on the area the second electronic component having solder bumps; and a reflow machine for bonding the electronic components to the substrate, by heating and cooling the resultant. The second electronic component is placed after the resin is dispensed, such that a peripheral edge portion thereof comes in contact with the resin.
    Type: Application
    Filed: October 19, 2012
    Publication date: March 13, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Tadashi Maeda, Hiroki Maruo, Tsubasa Saeki
  • Publication number: 20140053398
    Abstract: Disclosed is an electronic component mounting line on which a substrate undergoes solder paste printing, electronic component placements, and then reflow, while being moved from upstream to downstream.
    Type: Application
    Filed: October 19, 2012
    Publication date: February 27, 2014
    Inventors: Tadashi Maeda, Hiroki Maruo, Tsubasa Saeki
  • Patent number: 8446179
    Abstract: A non-linear effect of a rectifier element is enhanced, an input amplitude is increased by further taking advantage of a resonance circuit, and a rectification efficiency of a rectifier circuit for detection is improved, so that the gain of an amplifier circuit at a latter stage can be set low. RF input terminals 101, 102 are applied with signals at phases opposite to each other. A signal at terminal 102 is applied to a gate of transistor M1 through capacitor C3, and a signal at terminal 101 is applied to node N1 connected with a source of transistor M1 and a gate and a drain of transistor M2 through capacitor C1. 301, 302 designate terminals applied with DC biases, and L1, C15 and L2, C16 are series resonance circuits. Half-wave double voltage rectifier circuits comprised of M1, M2, C1-C3, R1 are connected in cascade at a plurality of stages.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: May 21, 2013
    Assignee: NEC Corporation
    Inventors: Tadashi Maeda, Tomoyuki Yamase
  • Publication number: 20130119795
    Abstract: The totally-enclosed fan-cooled motor includes the stator; the rotor; the drive side bracket; the counter drive side bracket; a pair of the bearings; the external fan that sends cooling air to the stator; the internal fan; the heat radiator that is arranged on an outer side of the drive side bracket and is mounted on the rotation shaft; the cover that contains a joint, which connects the rotation shaft extending to an outer side of the drive side bracket of the motor and a reduction gear, and is provided in parallel with the joint; and the ventilation path that is arranged between the drive side bracket and an end of the cover, and includes the outlet causes the cooling air induced by rotation of the heat radiator to flow to the heat radiator and discharges the cooling air outside the motor.
    Type: Application
    Filed: July 28, 2010
    Publication date: May 16, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Seiji Haga, Kazuto Minagawa, Tadashi Maeda
  • Patent number: 8248104
    Abstract: A phase comparator is provided that solves the problem that a VCO cannot be controlled with high precision. A frequency divider frequency-divides a VCO signal applied as input to an input terminal (10) in steps, and supplies the VCO signals of each step as output. A latch unit latches the VCO signal that is applied to the input terminal (10) and each VCO signal that was supplied from the frequency divider based on a reference signal that is applied to an input terminal (11). An output unit supplies the latch results realized by the latch unit as phase difference signals that indicate phase differences of the reference signal and the VCO signals.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: August 21, 2012
    Assignee: NEC Corporation
    Inventor: Tadashi Maeda
  • Patent number: 8083121
    Abstract: In the soldering method, metal-powder-contained flux is disposed between bumps and circuit electrodes when electronic parts are mounted by soldering, the metal powder comprising a core metal formed of metal such as tin and zinc and a surface metal covering surfaces of the core metal formed of noble metal such as gold and silver. Accordingly, metal powder will not remain as residue that is liable to cause migration after the reflow process, and it is possible to assure both soldering effect and insulation effect.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: December 27, 2011
    Assignee: Panasonic Corporation
    Inventors: Tadashi Maeda, Tadahiko Sakai
  • Patent number: 8015328
    Abstract: An information storage device includes a storage that stores transfer data from an information processing device, the information storage device being removably connected to the information processing device, a switch unit that switches a data transfer mode of the information processing device in accordance with manipulation by a user, and a controller that controls the information processing device to transfer data in a mode in which data temporarily stored in a data storing area is transferred to the storage or in a mode in which data is transferred to the storage without being temporarily stored in the data storing area in accordance with the selection of the data transfer mode by the switch unit.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: September 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Isao Sakakida, Yoshinori Horiguchi, Yuu Yamaguchi, Orie Tsuzuki, Noriaki Matsuno, Tomonobu Kurihara, Tadashi Maeda, Tomoyuki Yamase
  • Publication number: 20110121864
    Abstract: The nonlinearity effect of a rectifying element is enhanced, and further a resonant circuit is used to enlarge the input amplitude. Furthermore, the rectifying efficiency of a detection rectifier circuit is enhanced, thereby allowing the gain of an amplifier circuit in the following stage to be set to a low value. Signals having mutually opposite phases are inputted to RF input terminals (101,102). The signal at the terminal (102) is then inputted to the gate of a transistor (M1) via a capacitor (C3), while the signal at the terminal (101) is then inputted, via a capacitor (C1), to a node (N1) to which the source of the transistor (M1) and the gate and drain of a transistor (M2) are connected, whereby a capacitor (C2) is charged with a half-wave voltage-doubled rectified current. DC biases are inputted to terminals (301,302). There are formed series resonant circuits (L1,C15;L2,C16). A plurality of half-wave voltage-doubled rectifier circuits (M1,M2,C1-C3,R1) are connected in cascade.
    Type: Application
    Filed: April 5, 2007
    Publication date: May 26, 2011
    Applicant: NEC Corporation
    Inventors: Tadashi Maeda, Tomoyuki Yamase
  • Patent number: 7873139
    Abstract: A signal processing device includes a detecting part that detects intensity of an input signal, a timer part that includes a time constant circuit and measures time based on a time constant of the time constant circuit, and a determination circuit that counts the number of times of switching of the input signal detected by the detecting part within the time measured by the time constant circuit.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: January 18, 2011
    Assignees: NEC Corporation, Renesas Electronics Corporation
    Inventors: Noriaki Matsuno, Yoshinori Horiguchi, Yuu Yamaguchi, Orie Tsuzuki, Tomonobu Kurihara, Isao Sakakida, Tadashi Maeda, Tomoyuki Yamase
  • Patent number: 7828898
    Abstract: A CVD apparatus includes a vertical boat extending in a vertical direction and capable of holding plural substrates in a horizontal state such that the substrates are aligned in the vertical direction, an inner tube extending in the vertical direction and provided so as to surround the boat laterally, an outer tube surrounding the inner tube laterally from outside, the outer tube further covering a top part of the inner tube, a flange holding the inner tube and outer tube at respective bottom ends thereof, gas introducing nozzles provided on a flange sidewall at two locations thereof, the gas introducing nozzles introducing gases from outside to an interior of the inner tube at respective gas ejection ports, and a gas evacuation part evacuating a gas in the outer tube to outside thereof, wherein there is provided a guide part in the vicinity of the gas ejection ports of the gas introducing nozzles such that the gases ejected from the respective gas ejection ports are caused to flow generally parallel to a bot
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: November 9, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Tadashi Maeda, Keisuke Hichijoh
  • Patent number: 7821334
    Abstract: The present invention is aimed at realizing an amplifying circuit whose chip size is prevented from being significantly increased even if the number of compatible frequencies increases, and which has a wide dynamic range when it operates under a low voltage.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: October 26, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Tadashi Maeda, Tomoyuki Yamase
  • Patent number: 7816823
    Abstract: A cooling device of an electric motor for a vehicle for receiving cooling air into the electric motor through a suction port according to the rotation of a rotor shaft on which a rotor core, which is disposed opposite to a stator core, is installed. The cooling device includes an air volume regulating mechanism regulating a cooling air volume received therein through the suction port according to an ambient temperature. Since the cooling air volume received in the cooling device through the suction port is regulated according to the ambient temperature, the cooling of the electric motor can be optimized, and noise generated can be efficiently reduced according to the ambient temperature.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: October 19, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideyuki Yoshizawa, Kazushi Horie, Tadashi Maeda
  • Publication number: 20100171527
    Abstract: A phase comparator is provided that solves the problem that a VCO cannot be controlled with high precision. A frequency divider frequency-divides a VCO signal applied as input to an input terminal (10) in steps, and supplies the VCO signals of each step as output. A latch unit latches the VCO signal that is applied to the input terminal (10) and each VCO signal that was supplied from the frequency divider based on a reference signal that is applied to an input terminal (11). An output unit supplies the latch results realized by the latch unit as phase difference signals that indicate phase differences of the reference signal and the VCO signals.
    Type: Application
    Filed: September 2, 2008
    Publication date: July 8, 2010
    Inventor: Tadashi Maeda
  • Publication number: 20100060354
    Abstract: The present invention is aimed at realizing an amplifying circuit whose chip size is prevented from being significantly increased even if the number of compatible frequencies increases, and which has a wide dynamic range when it operates under a low voltage.
    Type: Application
    Filed: April 24, 2007
    Publication date: March 11, 2010
    Applicant: NEC Corporation
    Inventor: Tadashi Maeda
  • Patent number: 7663394
    Abstract: A variation of a threshold of diode-connected transistors is compensated for to maintain a constant rectification efficiency of a rectifier circuit, thereby enabling stable detection of a start signal. A constant voltage is applied to DC bias terminal 103 of cascaded half-wave voltage doubler rectifier circuits (including MOS transistors M1 to M4 and capacitors C1 to C4) forming a rectifier circuit, and a voltage equal to the sum of the constant voltage applied to DC bias terminal 103 and a variation ?Vt of a threshold voltage of the MOS transistors is applied to DC bias terminal 104 of cascaded half-wave voltage doubler rectifier circuits (including MOS transistors M5 to M8 and capacitors C5 to C8) forming a bias circuit.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: February 16, 2010
    Assignee: NEC Corporation
    Inventors: Tomoyuki Yamase, Tadashi Maeda
  • Patent number: 7632710
    Abstract: In soldering an electronic component, for the purpose of leading molten solder during re-flow, metallic powder 8 is mixed into flux employed so as to intervene between a bump and an electrode. The metallic powder 8 has a flake or dendrite shape including a core segment 8a of the metal molten at a higher temperature than the liquid phase temperature of solder constituting a solder bump and a surface segment 8b of the metal with good-wettability for the molten solder and to be solid-solved in the core segment 8a molten. In the heating by the re-flow, the metallic powder remaining in the flux without being taken in a solder portion is molten and solidified to become substantially spherical metallic particles 18. Thus, after the re-flow, the metallic powder does not remain in a flux residue in a state where migration is likely to occur, thereby combining both solder connectivity and insurance of insulation.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: December 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Tadahiko Sakai, Tadashi Maeda, Mitsuru Ozono
  • Publication number: 20090245454
    Abstract: A signal processing device includes a detecting part that detects intensity of an input signal, a timer part that includes a time constant circuit and measures time based on a time constant of the time constant circuit, and a determination circuit that counts the number of times of switching of the input signal detected by the detecting part within the time measured by the time constant circuit.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 1, 2009
    Applicants: NEC Electronics Corporation, NEC Corporation
    Inventors: Noriaki Matsuno, Yoshinori Horiguchi, Yuu Yamaguchi, Orie Tsuzuki, Tomonobu Kurihara, Isao Sakakida, Tadashi Maeda, Tomoyuki Yamase
  • Publication number: 20090233117
    Abstract: In soldering an electronic component, for the purpose of leading molten solder during re-flow, metallic powder 8 is mixed into flux employed so as to intervene between a bump and an electrode. The metallic powder 8 has a flake or dendrite shape including a core segment 8a of the metal molten at a higher temperature than the liquid phase temperature of solder constituting a solder bump and a surface segment 8b of the metal with good-wettability for the molten solder and to be solid-solved in the core segment 8a molten. In the heating by the re-flow, the metallic powder remaining in the flux without being taken in a solder portion is molten and solidified to become substantially spherical metallic particles 18. Thus, after the re-flow, the metallic powder does not remain in a flux residue in a state where migration is likely to occur, thereby combining both solder connectivity and insurance of insulation.
    Type: Application
    Filed: November 10, 2006
    Publication date: September 17, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tadahiko Sakai, Tadashi Maeda, Mitsuru Ozono
  • Patent number: 7568610
    Abstract: A method of soldering electronic component (6) having solder bumps (7) formed thereon to substrate (12), wherein bumps (7) are pressed against a flux transferring stage on which a thin film is formed of flux (10) containing metal powder (16) of good wettability to solder so as to cause metal powder (16) to penetrate oxide films (7a) and embed in the surfaces on the bottom parts of bumps (7), and bumps (7) in this state are positioned and mounted to electrodes (12a) on substrate (12). Substrate (12) is then heated to melt bumps (7) and allow the melted solder to flow and spread along the surfaces of metal powder (16) toward electrodes (12a). The method can thus provide solder bonding portions of high quality without any soldering defect and deterioration of the insulating property.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: August 4, 2009
    Assignee: Panasonic Corporation
    Inventors: Tadahiko Sakai, Tadashi Maeda