Patents by Inventor Tae-Hong Min

Tae-Hong Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120171814
    Abstract: Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
    Type: Application
    Filed: September 17, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Kyoung CHOI, SeYoung JEONG, Kwang-chul CHOI, Tae Hong MIN, Chungsun LEE, Jung-Hwan KIM
  • Publication number: 20120168792
    Abstract: In one embodiment, a heterojunction structure includes a first substrate; a second substrate comprising an electrode pad, the second substrate joined to the first substrate by an adhesive layer interposed between the first and second substrates, the first substrate and the adhesive layer having a via hole penetrating therethrough to expose a region of the electrode pad; a connection electrode disposed in the via hole and contacting the electrode pad; and an insulation layer electrically insulating the connection electrode from the first substrate. One of the first and second substrates has a thermal expansion coefficient different than a thermal expansion coefficient of the other of the first and second substrates, and at least one of the adhesive layer or the insulation layer comprises an organic material.
    Type: Application
    Filed: September 25, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Un-Byoung KANG, Kwang-chul CHOI, Jung-Hwan KIM, Tae Hong MIN
  • Publication number: 20120153498
    Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern.
    Type: Application
    Filed: September 22, 2011
    Publication date: June 21, 2012
    Inventors: Un-Byoung Kang, Kwang-chul Choi, Jung-Hwan Kim, Tae Hong Min, Hojin Lee, Minseung Yoon
  • Publication number: 20120156823
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Application
    Filed: October 26, 2011
    Publication date: June 21, 2012
    Inventors: Jong-Yun MYUNG, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Publication number: 20120139097
    Abstract: Provided are a semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package may include a circuit substrate, a semiconductor chip mounted on the circuit substrate, a chip package interaction disposed between the circuit substrate and the semiconductor chip, a first molding portion covering part of the semiconductor chip and part of the chip package interaction, a second molding portion formed on the first molding portion, and an adhesion portion adhering the first and second molding portions to each other, the adhesion portion being disposed between the first and second molding portions.
    Type: Application
    Filed: September 23, 2011
    Publication date: June 7, 2012
    Inventors: JEONGGI JIN, Yunhyeok Im, Chungsun Lee, Jung-Hwan Kim, Tae-Hong Min
  • Publication number: 20120085393
    Abstract: A solar cell module includes a circuit board, a plurality of solar cells disposed on a first surface of the circuit board, a plurality of metal terminals formed on the first surface of the circuit board, and a plurality of wires electrically connecting the plurality of solar cells and the metal terminals. The circuit board has a second surface opposite to the first surface, the rear surface comprising openings corresponding to the metal terminals, the openings exposing the metal terminals to an exterior of the solar cell module, thus forming contact terminals for the solar cell module.
    Type: Application
    Filed: June 7, 2011
    Publication date: April 12, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Sang Cho, So-Young Lim, Tae-Hong Min
  • Publication number: 20120085383
    Abstract: A solar cell module having a reduced thickness using a flip-chip approach includes a transparent substrate, a transparent electrode interconnection disposed on the transparent substrate, and a plurality of solar cells disposed on the transparent electrode interconnection, each solar cell having at least one protrusion formed on one surface of the solar cell, the protrusion being bonded to the transparent electrode interconnection.
    Type: Application
    Filed: June 14, 2011
    Publication date: April 12, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Sang Cho, So-Young Lim, Tae-Hong Min, Ki-Won Choi
  • Publication number: 20120083097
    Abstract: Provided is a method of forming a semiconductor package including providing a substrate having a first side and an opposite second side and providing a wafer having a plurality of semiconductor chips, each of the semiconductor chips having a conductive pad, wherein at least one of the substrate and the wafer includes a seed pattern. The first side of the substrate is bonded to the wafer with the conductive pad positioned adjacent to the first side of the substrate and the seed pattern positioned between the conductive pad and the first side of the substrate. A through hole is then formed penetrating the substrate from the second side of the substrate to expose the seed pattern. A through electrode is formed in the through hole using the seed pattern as a seed. Corresponding devices are also provided.
    Type: Application
    Filed: July 21, 2011
    Publication date: April 5, 2012
    Inventors: Ju-il Choi, Kyu-Ha Lee, Jae-Hyun Phee, Jung-Hwan Kim, Tae Hong Min
  • Publication number: 20120074584
    Abstract: Provided is a semiconductor device. The semiconductor device may include a substrate and a stacked insulation layer on a sidewall of an opening which penetrates the substrate. The stacked insulation layer can include at least one first insulation layer and at least one second insulation layer whose dielectric constant is different than that of the first insulation layer. One insulation layer may be a polymer and one insulation layer may be a silicon based insulation layer. The insulation layers may be uniform in thickness or may vary as a distance from the substrate changes.
    Type: Application
    Filed: March 16, 2011
    Publication date: March 29, 2012
    Inventors: Ho-Jin LEE, SeYoung Jeong, Jae-hyun Phee, Jung-Hwan Kim, Tae Hong Min
  • Publication number: 20120049352
    Abstract: A multi-chip package may include a package substrate, an interposer chip, a first semiconductor chip, a thermal dissipation structure and a second semiconductor chip. The interposer chip may be mounted on the package substrate. The first semiconductor chip may be mounted on the interposer chip. The first semiconductor chip may have a size smaller than that of the interposer chip. The thermal dissipation structure may be arranged on the interposer chip to surround the first semiconductor chip. The thermal dissipation structure may transfer heat in the first semiconductor chip to the interposer chip. The second semiconductor chip may be mounted on the first semiconductor chip. Thus, the heat in the first semiconductor chip may be effectively transferred to the interposer chip through the thermal dissipation line.
    Type: Application
    Filed: August 12, 2011
    Publication date: March 1, 2012
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Un-Byoung KANG, Jong-Joo Lee, Yong-Hoon Kim, Tae-Hong Min
  • Publication number: 20120038797
    Abstract: An image processing apparatus and an image processing method, the method including: providing one or more low dynamic range images having different exposure levels; classifying each of the one of more low dynamic range images as a saturation region, an under-saturation region, and a non-saturation region with respect to an intensity value; generating feature maps indicating a similarity between patterns of the non-saturation regions; generating final feature maps converting pixels included in the feature maps into moving pixels and non-moving pixels; defining moving regions and non-moving regions included in the one or more low dynamic range images; removing noise from the moving regions and the non-moving regions by using a first noise reduction filter for the moving regions and a second noise reduction filter for the non-moving regions; and generating a radiance map corresponding to the one or more low dynamic range images.
    Type: Application
    Filed: February 25, 2011
    Publication date: February 16, 2012
    Applicants: Industry-University Cooperation Foundation Sogang University, Samsung Electronics Co., Ltd.
    Inventors: Soon-geun Jang, Tae-hong Min, Rae-hong Park, Hwan-soon Sung
  • Publication number: 20120018885
    Abstract: A semiconductor apparatus includes a base substrate and a logic chip disposed on the base substrate. The logic chip includes a memory control circuit, a first through silicon via, and a second through silicon via. The memory control circuit is disposed on a first surface of a substrate of the logic chip, and a memory chip is disposed on a second surface of the substrate of the logic chip. The first through silicon via electrically connects the memory control circuit and the memory chip, the second through silicon via is electrically connected to the memory chip and is configured to transmit power for the memory chip, the second through silicon via is electrically insulated from the logic chip, and the first surface of the substrate of the logic chip faces the base substrate.
    Type: Application
    Filed: December 6, 2010
    Publication date: January 26, 2012
    Inventors: Go Eun Lee, Taeje Cho, Un-Byoung Kang, Seongmin Ryu, Jung-Hwan Kim, Tae Hong Min
  • Publication number: 20120018871
    Abstract: A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip.
    Type: Application
    Filed: July 15, 2011
    Publication date: January 26, 2012
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Chung-sun LEE, Jung-Hwan Kim, Yun-Hyeok Im, Ji-Hwan Hwang, Hyon-chol Kim, Kwang-chul Choi, Eun-Kyong Choi, Tae-hong Min
  • Publication number: 20100328482
    Abstract: A digital photographing apparatus capable of acquiring data about an image having a wide dynamic range and a high grayscale resolution, a method of controlling the digital photographing apparatus, and a recording medium storing a program to implement the method are provided. An embodiment includes an imaging device that acquires a reference image and additional images at different exposures and a multi-level threshold map generation unit that classifies the pixels of the images into levels according to brightness. The embodiment further includes a motion data acquiring unit that acquires motion data for each pixel based on its respective brightness level and a first weight data acquiring unit that acquires first weight data based on the motion data of each pixel. In addition, the embodiment includes a final image data acquiring unit that synthesizes the pixels of the reference image and the additional images based on first weight data.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 30, 2010
    Applicants: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Sogang University
    Inventors: Soon-keun Chang, Rae-hong Park, Tae-hong Min
  • Patent number: 7015313
    Abstract: The present invention relates to a lectin protein prepared from Korean marine crab Philyra pisum, process for preparing the same and the use thereof. This protein can be used as a diagnosing agent or a carrier protein that chemically binds to various anti-cancer drugs owing to its capability that specifically recognizes N-glycolylneuraminic acid, and, in addition, used as an anti-cancer drug in view of its anti-proliferation effect.
    Type: Grant
    Filed: May 4, 2002
    Date of Patent: March 21, 2006
    Inventors: Ha-Hyung Kim, Jai-Il Jun, Bum-Soo Kim, Due-Hyeon Cho, Tae-Hong Min, Yun-Jung Kim, Chang-Soo Ryu
  • Publication number: 20040185428
    Abstract: The present invention relates to a Lectin protein prepared from Korean marine crab Philyra pisum, process for preparing the same and the use thereof. This protein can be used as a diagnosing agent or a carrier protein that chemically binds to various anti-cancer drugs owing to its capability that specifically recognizes N-glycolylneuraminic acid, and, in addition, used as an anti-cancer drug in view of its anti-proliferation effect. cer drug in view of its anti-proliferation effect.
    Type: Application
    Filed: April 29, 2004
    Publication date: September 23, 2004
    Inventors: Ha-Hyung Kim, Jai-Il Jun, Bum-Soo Kim, Due-Hyeon Cho, Tae-Hong Min, Yun-Jung Kim, Chang-Soo Ryu