Abstract: There is provided a printed circuit board including: a core layer having a cavity formed therein; a heat radiation body included in the cavity; an insulating layer provided on an upper surface and a lower surface of the core layer; and a heat dissipating via penetrating through the insulating layer to be in contact with the heat radiation body and dissipating heat externally, wherein the heat radiation body includes an insulating plate, a first metal block formed on an upper surface of the insulating plate, and a second metal block formed on a lower surface of the insulating plate.

Abstract: The present invention relates to a chip embedded substrate, which includes a substrate formed by alternately stacking an insulation layer and a circuit layer and an embedded chip equipped with a connection terminal and mounted inside the substrate, wherein the connection terminal is protruded from the insulation layer placed on the outermost layer of the substrate, and a connection surface to be connected to an electronic component is exposed to the outside.

Abstract: A printed circuit board, according to one embodiment, includes: a core having a slope pattern formed on a side surface thereof; a first insulating layer laminated on the core; a second insulating layer laminated on the first insulating layer to cover the side surface of the core; an inner circuit layer and an outer circuit layer respectively formed on the first insulating layer and the second insulating layer; and a solder resist layer laminated on the second insulating layer.

Abstract: There are provided a substrate strip, a substrate panel, and a manufacturing method of a substrate strip. The substrate strip includes: a plurality of unit substrates including a glass core; and a glass core cover part disclosed on a side surface of the substrate strip on which the glass core is exposed.

Abstract: Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.

Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern.

Abstract: A printed circuit board and a manufacturing method thereof. According to one embodiment, a printed circuit board may include a core part; and a conductor pattern disposed on at least one surface of the core part, the core part includes a glass core having a side portion that is polished or thinner than a central portion of the core. According to another embodiment, a method of manufacturing the printed circuit board may include cutting a glass plate to form a glass core; and removing cracks from at least one side surface of the cut glass core.

Abstract: An embedded board, a printed circuit board, and a method of manufacturing the same. According to one embodiment of the present invention, an embedded board includes: a core insulating layer formed with a first cavity; a first circuit layer formed on one surface of the core insulating layer; a build-up insulating layer formed on one surface of the core insulating layer and formed with a second cavity extending from the first cavity; devices disposed in the first cavity and the second cavity and formed to protrude from one surface of the core insulating layer; a first insulating layer formed on the other surface of the core insulating layer and filling the first cavity and the second cavity; and a build-up circuit layer and a via formed in the build-up insulating layer.

Abstract: A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.

Abstract: Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.

Abstract: Disclosed herein is a method of manufacturing a glass core capable of continuously manufacturing the glass core by an automated process. The method includes: providing a glass sheet; laminating an insulating sheet on the glass sheet; laminating a copper clad sheet on the insulating sheet to manufacture the glass core; laminating a buffering sheet on the copper clad sheet; pressing and temporarily hardening the buffering sheet; delaminating the temporarily hardened buffering sheet; thermally hardening the glass core by a heater after the delaminating of the temporarily hardened buffering sheet; and cutting the glass core at a predetermined size after the thermal hardening of the glass core.

Abstract: Disclosed herein is a multilayer printed circuit board. The multilayer printed circuit board according to the present invention includes: a stack via stacked in an upper portion of a core layer; staggered vias formed at both sides of the stack via and stacked on the core layer; and a solder resist layer stacked in a lower portion of the core layer and stacked on an insulating film except for open regions of the stack via and the staggered vias, such that the plurality of vias formed in the staggered via may increase rigidity to prevent warpage of the multilayer printed circuit board from being generated.

Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes an insulating layer including a glass core and a tempering treatment layer formed on one surface of the glass core, such that a problem about warpage may be minimized and an effect capable of thinning the printed circuit board may be achieved.

Abstract: Provided are semiconductor devices and methods of manufacturing the same. The semiconductor package includes a substrate, a first semiconductor chip mounted on the circuit substrate and having a first width, a second semiconductor chip overlying the first semiconductor chip and having a second width greater than the first width, and a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip and having an inclined side surface.

Abstract: In one embodiment, a semiconductor package includes a circuit substrate, a plurality of semiconductor chips stacked on the circuit substrate, insulating adhesive patterns interposed between the semiconductor chips, a heat slug provided on an uppermost semiconductor chip and adhered to the uppermost semiconductor chip by a heat dissipative adhesive pattern, and a mold structure provided on the circuit substrate to cover sidewalls of the semiconductor chips, the insulating adhesive patterns, the heat dissipative adhesive pattern and the heat slug. A failure of the semiconductor package during a manufacturing process of the mold structure may be reduced. The semiconductor package may therefore have good operating characteristics and reliability.

Abstract: Disclosed herein are a glass core substrate and a method for manufacturing the same. According to an embodiment of the present invention, there is provided the glass core substrate including: a glass core laminate including a glass layer and insulating layers which are stacked on upper and lower portions of the glass layer; a through hole formed by penetrating through the glass core laminate and provided with at least one crack which is formed at a penetrating inner wall by penetrating into the glass layer; and a conductive material filled in the through hole and the crack. Further, the method for manufacturing a glass core substrate is provided.

Abstract: Disclosed herein is a printed circuit board capable of implementing slimness by decreasing the number of entire layers through an asymmetrical build-up structure in which an electric device is embedded, the printed circuit board including: a core layer including a cavity formed therein so that an electric device is embedded and a circuit pattern and a pad formed on upper and lower surfaces thereof; a through via formed in the core layer so as to connect the upper and the lower pads of the core layer to each other; a plurality of insulating layers built-up on the core layer and including a plurality of vias so as to be electrically connected to the through via; and a solder resist layer applied onto a lower portion of the core layer so that a lower surface of the through via is partially exposed.

Abstract: Disclosed herein is a core made of a glass material so as to be capable of preventing generation of warpage in a printed circuit board due to a difference in a coefficient of thermal expansion at the time of manufacturing the printed circuit board. The core includes: an organic cloth; and a glass having the organic cloth formed therein. The core is manufactured in a form in which rigidity thereof is increased by impregnating the organic cloth having a negative coefficient of thermal expansion is impregnated in a liquid-phase glass, thereby making it possible to effectively prevent generation of warpage in the printed circuit board due to the difference in a coefficient of thermal expansion.

Abstract: In one embodiment, a heterojunction structure includes a first substrate; a second substrate comprising an electrode pad, the second substrate joined to the first substrate by an adhesive layer interposed between the first and second substrates, the first substrate and the adhesive layer having a via hole penetrating therethrough to expose a region of the electrode pad; a connection electrode disposed in the via hole and contacting the electrode pad; and an insulation layer electrically insulating the connection electrode from the first substrate. One of the first and second substrates has a thermal expansion coefficient different than a thermal expansion coefficient of the other of the first and second substrates, and at least one of the adhesive layer or the insulation layer comprises an organic material.

Abstract: A multi-chip package may include a package substrate, an interposer chip, a first semiconductor chip, a thermal dissipation structure and a second semiconductor chip. The interposer chip may be mounted on the package substrate. The first semiconductor chip may be mounted on the interposer chip. The first semiconductor chip may have a size smaller than that of the interposer chip. The thermal dissipation structure may be arranged on the interposer chip to surround the first semiconductor chip. The thermal dissipation structure may transfer heat in the first semiconductor chip to the interposer chip. The second semiconductor chip may be mounted on the first semiconductor chip. Thus, the heat in the first semiconductor chip may be effectively transferred to the interposer chip through the thermal dissipation line.