Patents by Inventor Tae-Hoon Yang

Tae-Hoon Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7256080
    Abstract: A method of fabricating a thin film transistor includes preparing an insulating substrate; forming a first amorphous silicon layer on the substrate; forming a diffusion barrier layer pattern on the first amorphous silicon layer; forming a second amorphous silicon layer over the whole surface of the substrate; forming a metal silicide layer on the second amorphous silicide layer; and heat-treating the substrate to form first and second polysilicon layers.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: August 14, 2007
    Assignee: Samsung SDI Co., Ltd
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang
  • Patent number: 7247880
    Abstract: A thin film transistor includes a substrate, a semiconductor layer pattern on the substrate, a gate insulating layer on the semiconductor layer pattern, and a gate electrode on a gate insulating layer. Low angle grain boundaries of polysilicon formed in a channel layer in the semiconductor layer pattern are tilted ?15 to 15° with respect to a current flowing direction.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: July 24, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang
  • Publication number: 20070131933
    Abstract: A polycrystalline silicon layer, a flat panel display using the polycrystalline silicon layer, and methods of fabricating the same are provided. An amorphous silicon layer is formed on a substrate. A first pattern layer, a second pattern layer, and a metal catalyst layer are formed on the amorphous silicon layer. The first pattern layer and the second pattern layer are formed to define a region of at least 400 ?m2 within which a metal catalyst of the metal catalyst layer is diffused into the amorphous silicon layer. A seed region is crystallized by the diffused metal catalyst. After a crystallization region is grown from the seed region, a semiconductor layer is formed on the crystallization region, so as to fabricate a thin film transistor with excellent characteristics. Using this, a flat panel display is fabricated.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 14, 2007
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20070131934
    Abstract: A polycrystalline silicon layer, a flat panel display using the polycrystalline silicon layer, and a method of fabricating the same are provided. The polycrystalline silicon layer is formed by crystallizing a seed region of an amorphous silicon layer using a super grain silicon (SGS) crystallization technique. The crystallinity of the seed region spread into a crystallization region beyond the seed region. The crystallization region is formed into a semiconductor layer that can be incorporated to make a thin film transistor to drive flat panel displays. The semiconductor layer made by the method of the present invention provides uniform growth of grain boundaries, and characteristics of a thin film transistor made of the semiconductor layer are improved.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 14, 2007
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20070087490
    Abstract: A bottom gate thin film transistor and method of fabricating the same are disclosed, in which a channel region is crystallized by a super grain silicon (SGS) crystallization method, including: forming a gate electrode and a gate insulating layer on an insulating substrate; forming an amorphous silicon layer on the gate insulating layer followed by forming a capping layer and a metal catalyst layer; performing heat treatment to crystallize the amorphous silicon layer into a polysilicon layer; and forming an etch stopper, source and drain regions and source and drain electrodes. The thin film transistor includes: an insulating substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a polysilicon layer formed on the gate insulating layer and crystallized by an SGS crystallization method; and source and drain regions and source and drain electrodes formed in a predetermined region of the substrate.
    Type: Application
    Filed: December 15, 2006
    Publication date: April 19, 2007
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Jin-Wook SEO, Ki-Yong LEE, Tae-Hoon YANG, Byoung-Keon PARK
  • Patent number: 7205215
    Abstract: The present invention provides a fabrication method of thin film transistor including a step of forming an amorphous silicon layer on a substrate, a step of forming a capping layer on the amorphous silicon layer, a step of forming a metal catalyst layer on the capping layer, a step of diffusing metal catalyst by selectively irradiating a laser beam onto the metal catalyst layer, and a step of crystallizing the amorphous silicon layer. The present invention has an advantage that a fabrication method of thin film transistor is provided, wherein the fabrication method of thin film transistor improves characteristics of device and obtains uniformity of the device by uniformly controlling diffusion of low concentration of metal catalyst through selective irradiation of laser beam and controlling size of grains and crystal growing position and direction in crystallization of amorphous silicon layer using super grain silicon method.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: April 17, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Ki-Yong Lee
  • Publication number: 20070082433
    Abstract: A thin film transistor includes a semiconductor layer formed on a polycrystalline silicon layer crystallized by a super grain silicon (SGS) crystallization method. The thin film transistor is patterned such that the semiconductor layer does not include a seed or a grain boundary created when forming the semiconductor layer on the polycrystalline silicon layer.
    Type: Application
    Filed: September 6, 2006
    Publication date: April 12, 2007
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20070052023
    Abstract: A thin film transistor and a method of fabricating the same are disclosed. The method includes: sequentially depositing an amorphous silicon layer, a capping layer, and a metal catalyst layer; annealing the entire layer to crystallize the amorphous silicon layer into a polysilicon layer; removing the capping layer; and, when the capping layer is perfectly removed to make a contact angle of the polysilicon layer within a range of about 40 to about 80°, forming a semiconductor layer using the polysilicon layer.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 8, 2007
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20070049057
    Abstract: A heat treatment apparatus and a heat treatment method using the same are disclosed. In the method, a support plate on which a device substrate is mounted is loaded into the heat treatment apparatus using a transfer unit in an in-line manner, and the device substrate mounted on the support plate is heat-treated using the heat treatment apparatus.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 1, 2007
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20060263951
    Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor includes: a metal catalyst layer formed on a substrate, and a first capping layer and a second capping layer pattern sequentially formed on the metal catalyst layer. The method includes: forming a first capping layer on a metal catalyst layer; forming and patterning a second capping layer on the first capping layer; forming an amorphous silicon layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. The crystallization catalyst diffuses at a uniform low concentration to control a position of a seed formed of the catalyst such that a channel region in the polysilicon layer is close to a single crystal. Therefore, the characteristics of the thin film transistor device may be improved and uniformed.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 23, 2006
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Jin-Wook SEO, Ki-Yong LEE, Tae-Hoon YANG, Byoung-Keon PARK
  • Publication number: 20060263956
    Abstract: A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no grain boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 23, 2006
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20060243193
    Abstract: Provided are a thin film transistor and method of fabricating the same, in which an amorphous silicon layer is formed on a substrate, a capping layer containing a metal catalyst having a different concentration according to its thickness is formed on the amorphous silicon layer, the capping layer is patterned to form a capping layer pattern, and the amorphous silicon layer is crystallized, such that the density and position of seeds formed at an interface between the amorphous silicon layer and the capping layer pattern is controlled, thereby improving the size and uniformity of grains, and in which polycrystalline silicon of desired size and uniformity is selectively formed at a desired position by one crystallization process, resulting in a thin film transistor having excellent and desired properties.
    Type: Application
    Filed: July 14, 2006
    Publication date: November 2, 2006
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Ki-Yong Lee
  • Publication number: 20060183273
    Abstract: A thin film transistor and method of fabricating the same are provided. In the thin film transistor, a seed or a grain boundary exists in a semiconductor layer pattern but not in a junction region. The method includes forming a semiconductor layer pattern. Forming the semiconductor layer pattern includes: forming and patterning a first capping layer on an amorphous silicon layer; forming a second capping layer on the first capping layer pattern; forming a metal catalyst layer on the second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. Therefore, it is possible to prevent that a trap is generated in the junction region, thereby obtaining the improved and uniformed characteristics of the device.
    Type: Application
    Filed: April 14, 2006
    Publication date: August 17, 2006
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Jin-Wook SEO, Ki-Yong LEE, Tae-Hoon YANG, Byoung-Keon PARK
  • Publication number: 20060121651
    Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor is characterized in that low angle grain boundaries formed in a channel layer in a semiconductor layer pattern is tilted ?15 to 15° with respect to a current flowing direction. The method includes: forming an amorphous silicon layer on a substrate; forming a first capping layer on the amorphous silicon layer; forming a second capping layer on the first capping layer, and patterning the second capping layer such that seeds are formed in a line shape; forming a metal catalyst layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing and patterning the amorphous silicon layer to form a semiconductor layer pattern. Thus, a channel layer having an angle nearly parallel to the current flowing direction may be formed in a low angle grain boundary by forming and crystallizing the line-shaped seeds.
    Type: Application
    Filed: January 11, 2006
    Publication date: June 8, 2006
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang
  • Publication number: 20060073648
    Abstract: Provided are a thin film transistor and method of fabricating the same, in which an amorphous silicon layer is formed on a substrate, a capping layer containing a metal catalyst having a different concentration according to its thickness is formed on the amorphous silicon layer, the capping layer is patterned to form a capping layer pattern, and the amorphous silicon layer is crystallized, such that the density and position of seeds formed at an interface between the amorphous silicon layer and the capping layer pattern is controlled, thereby improving the size and uniformity of grains, and in which polycrystalline silicon of desired size and uniformity is selectively formed at a desired position by one crystallization process, resulting in a thin film transistor having excellent and desired properties.
    Type: Application
    Filed: December 22, 2004
    Publication date: April 6, 2006
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Ki-Yong Lee
  • Publication number: 20060046357
    Abstract: The present invention relates to a method for fabricating thin film transistor, more particularly, to a method for fabricating thin film transistor which not only manufactures a polycrystalline silicon layer having large grain size and containing a trace of residual metal catalyst by heat treating thereby crystallizing the metal catalyst layer after forming an amorphous silicon layer on a substrate, forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer and forming a metal catalyst layer on the capping layer, but also controls characteristics of the polycrystalline silicon layer by controlling the refraction index of the capping layer. The present invention provides a method for fabricating thin film transistor comprising the steps of preparing an insulation substrate; forming an amorphous silicon layer on the substrate; forming a capping layer having 1.78 to 1.
    Type: Application
    Filed: December 15, 2004
    Publication date: March 2, 2006
    Inventors: Sang-Woong Lee, Jae-Young Oh, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Cheol-Ho Yu
  • Publication number: 20060040434
    Abstract: A method of fabricating a thin film transistor includes preparing an insulating substrate; forming a first amorphous silicon layer on the substrate; forming a diffusion barrier layer pattern on the first amorphous silicon layer; forming a second amorphous silicon layer over the whole surface of the substrate; forming a metal silicide layer on the second amorphous silicide layer; and heat-treating the substrate to form first and second polysilicon layers.
    Type: Application
    Filed: December 17, 2004
    Publication date: February 23, 2006
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang
  • Publication number: 20060040429
    Abstract: The present invention provides a fabrication method of thin film transistor comprising a step of forming an amorphous silicon layer on a substrate, a step of forming a capping layer on the amorphous silicon layer, a step of forming a metal catalyst layer on the capping layer, a step of diffusing metal catalyst by selectively irradiating a laser beam onto the metal catalyst layer, and a step of crystallizing the amorphous silicon layer. The present invention has an advantage that a fabrication method of thin film transistor is provided, wherein the fabrication method of thin film transistor improves characteristics of device and obtains uniformity of the device by uniformly controlling diffusion of low concentration of metal catalyst through selective irradiation of laser beam and controlling size of grains and crystal growing position and direction in crystallization of amorphous silicon layer using super grain silicon method.
    Type: Application
    Filed: December 15, 2004
    Publication date: February 23, 2006
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Ki-Yong Lee
  • Publication number: 20060033106
    Abstract: A bottom gate thin film transistor and method of fabricating the same are disclosed, in which a channel region is crystallized by a super grain silicon (SGS) crystallization method, including: forming a gate electrode and a gate insulating layer on an insulating substrate; forming an amorphous silicon layer on the gate insulating layer followed by forming a capping layer and a metal catalyst layer; performing heat treatment to crystallize the amorphous silicon layer into a polysilicon layer; and forming an etch stopper, source and drain regions and source and drain electrodes. The thin film transistor includes: an insulating substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a polysilicon layer formed on the gate insulating layer and crystallized by an SGS crystallization method; and source and drain regions and source and drain electrodes formed in a predetermined region of the substrate.
    Type: Application
    Filed: December 15, 2004
    Publication date: February 16, 2006
    Inventors: Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang, Byoung-Keon Park
  • Publication number: 20060006465
    Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor is characterized in that low angle grain boundaries formed in a channel layer in a semiconductor layer pattern is tilted ?15 to 15° with respect to a current flowing direction. The method includes: forming an amorphous silicon layer on a substrate; forming a first capping layer on the amorphous silicon layer; forming a second capping layer on the first capping layer, and patterning the second capping layer such that seeds are formed in a line shape; forming a metal catalyst layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing and patterning the amorphous silicon layer to form a semiconductor layer pattern. Thus, a channel layer having an angle nearly parallel to the current flowing direction may be formed in a low angle grain boundary by forming and crystallizing the line-shaped seeds.
    Type: Application
    Filed: December 22, 2004
    Publication date: January 12, 2006
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang