Patents by Inventor Tae-Hoon Yang

Tae-Hoon Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060003503
    Abstract: A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no grain boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film.
    Type: Application
    Filed: December 20, 2004
    Publication date: January 5, 2006
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Publication number: 20060001025
    Abstract: A semiconductor device in which a semiconductor layer of a thin film transistor and a first electrode of a capacitor are formed of amorphous silicon and the whole or a part of source/drain regions of the semiconductor layer and the first electrode of the capacitor are crystallized by a metal induced crystallization method, and a channel region of the semiconductor layer is crystallized by a metal induced lateral crystallization method.
    Type: Application
    Filed: June 10, 2005
    Publication date: January 5, 2006
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Ki-Yong Lee
  • Publication number: 20050285110
    Abstract: A thin film transistor and method of fabricating the same are provided. In the thin film transistor, a seed or a grain boundary exists in a semiconductor layer pattern but not in a junction region. The method includes forming a semiconductor layer pattern. Forming the semiconductor layer pattern includes: forming and patterning a first capping layer on an amorphous silicon layer; forming a second capping layer on the first capping layer pattern; forming a metal catalyst layer on the second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. Therefore, it is possible to prevent that a trap is generated in the junction region, thereby obtaining the improved and uniformed characteristics of the device.
    Type: Application
    Filed: December 22, 2004
    Publication date: December 29, 2005
    Inventors: Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang, Byoung-Keon Park
  • Publication number: 20050275019
    Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor includes: a metal catalyst layer formed on a substrate, and a first capping layer and a second capping layer pattern sequentially formed on the metal catalyst layer. The method includes: forming a first capping layer on a metal catalyst layer; forming and patterning a second capping layer on the first capping layer; forming an amorphous silicon layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. The crystallization catalyst diffuses at a uniform low concentration to control a position of a seed formed of the catalyst such that a channel region in the polysilicon layer is close to a single crystal. Therefore, the characteristics of the thin film transistor device may be improved and uniformed.
    Type: Application
    Filed: December 23, 2004
    Publication date: December 15, 2005
    Inventors: Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang, Byoung-Keon Park
  • Publication number: 20050191782
    Abstract: A PMOS thin film transistor including an LDD region may be fabricated by implanting an ion dose at a specific concentration in order to form the LDD region with a certain range of sheet resistance at both ends of a gate electrode of the PMOS thin film transistor. A buffer layer, an active layer, the gate insulating layer and a gate electrode may be sequentially formed on the substrate of the transistor.
    Type: Application
    Filed: February 17, 2005
    Publication date: September 1, 2005
    Inventors: Tae-Hoon Yang, Kyu-Hwan Choi, Sung-Sik Bae