Patents by Inventor Tae-sung Jeong
Tae-sung Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110290546Abstract: Disclosed herein are a printed circuit board having an electronic component and a manufacturing method thereof. The printed circuit board having an electronic component may include: an electronic component having a plating electrode pad having a predetermined thickness; an insulating resin layer that exposes a lower surface of the electrode pad, receives the electronic component, and embodies the electronic component so that the center of the base body forming the electronic component is positioned at the center of the insulating resin layer; and circuit layers that include a circuit pattern disposed on the electrode pad, form inter-layer connection, and are disposed on both surfaces of the insulating resin layer, respectively.Type: ApplicationFiled: October 5, 2010Publication date: December 1, 2011Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan Lee, Tae Sung Jeong
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Patent number: 8067831Abstract: An integrated circuit package system is provided including forming a first substrate, mounting a first integrated circuit to the first substrate, and forming first planar interconnects in contact with the first integrated circuit and electrically connecting the first integrated circuit to the first substrate.Type: GrantFiled: September 16, 2005Date of Patent: November 29, 2011Assignee: Stats Chippac Ltd.Inventors: Hyeog Chan Kwon, Tae Sung Jeong, Jae Han Chung, Taeg Ki Lim, Jong Wook Ju
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Patent number: 8017437Abstract: A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.Type: GrantFiled: December 1, 2009Date of Patent: September 13, 2011Assignee: Samsung Electro—Mechanics Co., Ltd.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Publication number: 20110164391Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a metal substrate including an anodic oxide film formed over the entire surface thereof; two electronic components disposed in a cavity formed in the metal substrate in two stages; an insulation layer formed on both sides of the metal substrate to bury the electronic components disposed in the cavity; and circuit layers including vias connected with connecting terminals of the electronic components and formed on the exposed surfaces of the insulation layer. The electronic component-embedded printed circuit board is advantageous in that its radiation performance of radiating the heat generated from an electronic component can be improved, and its production cost can be reduced, because a metal substrate is used instead of a conventional insulating material.Type: ApplicationFiled: May 6, 2010Publication date: July 7, 2011Inventors: Yee Na SHIN, Tae Sung JEONG, Young Ki LEE, Seung Eun LEE
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Publication number: 20110127076Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a base plate having a cavity formed therein in a thickness direction thereof; an electronic component which is disposed in the cavity such that an active surface of the electronic component is flush with one side of the base plate; an insulating material layer which is formed on the other side of the base plate to bury the electronic component; and a first circuit layer which is formed on one side of the base plate and includes connection patterns coming into contact with connecting terminals of the electronic component, and a method of manufacturing the same.Type: ApplicationFiled: January 22, 2010Publication date: June 2, 2011Inventors: Hong Won KIM, Tae Sung JEONG
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Publication number: 20110108976Abstract: A method for manufacturing a stacked integrated circuit and package system includes: attaching a high temperature resistant layer on a top substrate; mounting a first top integrated circuit on the high temperature resistant layer; mounting a second top integrated circuit on the first top integrated circuit; molding an encapsulant over the first top integrated circuit, the second top integrated circuit and the top substrate; mounting a third top integrated circuit over the first top integrated circuit on a surface opposite the second top integrated circuit; mounting a fourth top integrated circuit on the third top integrated circuit; molding an encapsulant over the third top integrated circuit, the fourth top integrated circuit and the top substrate; forming top electrical connectors on a lower surface of the top substrate; and mounting a bottom package to the top electrical connectors.Type: ApplicationFiled: January 13, 2011Publication date: May 12, 2011Inventors: Tae Sung Jeong, Hyeog Chan Kwon, Youngcheol Kim
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Publication number: 20110083891Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a flexible film; an insulation layer formed on one side of the flexible film; an electronic component mounted on the one side of the flexible film in a face-down manner such that the electronic component is buried in the insulation layer; and a circuit layer including a connecting pattern which is formed on the one side of the flexible film and is connected with a connecting terminal of the electronic component by a connecting member. The electronic component-embedded printed circuit board is advantageous in that the position alignment between the connecting patterns and the connecting terminals is easy and the connection reliability therebetween is high because the connecting patterns formed on a flexible film are directly connected to the connecting terminals of an electronic component using connecting members, and in that the production cost thereof can be reduced because additional rewiring is not required.Type: ApplicationFiled: December 4, 2009Publication date: April 14, 2011Inventors: Hong Bok WE, Tae Sung JEONG, Dae Jun KIM
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Publication number: 20110083892Abstract: Disclosed is an electronic component-embedded printed circuit board, which includes an insulating base, an insulating layer formed on one surface of the insulating base, an electronic component embedded in the insulating layer so that an active surface of the electronic component having a connection terminal faces the insulating base, a trench formed in the insulating base to expose the connection terminal, and a connection pattern formed and embedded in the trench, and in which the embedded connection pattern is finely formed by an imprinting process and is connected to the connection terminal of the electronic to component, thus obviating a need for an additional redistribution layer and reducing the manufacturing cost. A method of manufacturing such a printed circuit board is also provided.Type: ApplicationFiled: December 4, 2009Publication date: April 14, 2011Inventors: Hong Bok WE, Tae Sung Jeong, Dae Jun Kim
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Patent number: 7875966Abstract: A stacked integrated circuit and package system including attaching a first top integrated circuit over an upper surface of a top substrate, attaching a second top integrated circuit over a lower surface of the top substrate, forming top electrical connectors on the lower surface of the top substrate, and connecting a bottom package to the top electrical connectors.Type: GrantFiled: October 21, 2005Date of Patent: January 25, 2011Assignee: Stats Chippac Ltd.Inventors: Tae Sung Jeong, Hyeog Chan Kwon, Youngcheol Kim
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Patent number: 7875983Abstract: A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof placed on the support, such that the interposer covers the first substrate and forms a cavity between the interposer and the first substrate, and having a pre-designed pattern formed respectively on both sides thereof; a via penetrating the support and the interposer; a second chip mounted on one side of the interposer facing the first substrate; a second substrate placed on the other side of the interposer with at least one conductive ball positioned in-between; and a third chip mounted on the second substrate.Type: GrantFiled: December 1, 2009Date of Patent: January 25, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Patent number: 7875497Abstract: A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming a cavity by etching a center portion of a metal oxide layer; mounting a second chip inside the cavity; forming at least one via such that the via penetrates an edge of the metal oxide layer; placing the metal oxide layer on the first substrate such that the second chip and the first chip face each other; and placing a second substrate on the metal oxide layer, the second substrate having a third chip mounted thereon.Type: GrantFiled: December 1, 2009Date of Patent: January 25, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Publication number: 20100142170Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.Type: ApplicationFiled: January 27, 2009Publication date: June 10, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hong Won Kim, Sung Yi, Tae Sung Jeong, Joon Seok Kang
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Publication number: 20100134991Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The prevent invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.Type: ApplicationFiled: January 28, 2009Publication date: June 3, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hong Won Kim, Sung Yi, Tae Sung Jeong, Joon Seok Kang
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Publication number: 20100087034Abstract: A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming a cavity by etching a center portion of a metal oxide layer; mounting a second chip inside the cavity; forming at least one via such that the via penetrates an edge of the metal oxide layer; placing the metal oxide layer on the first substrate such that the second chip and the first chip face each other; and placing a second substrate on the metal oxide layer, the second substrate having a third chip mounted thereon.Type: ApplicationFiled: December 1, 2009Publication date: April 8, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Publication number: 20100087035Abstract: A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.Type: ApplicationFiled: December 1, 2009Publication date: April 8, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Publication number: 20100084754Abstract: A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof placed on the support, such that the interposer covers the first substrate and forms a cavity between the interposer and the first substrate, and having a pre-designed pattern formed respectively on both sides thereof; a via penetrating the support and the interposer; a second chip mounted on one side of the interposer facing the first substrate; a second substrate placed on the other side of the interposer with at least one conductive ball positioned in-between; and a third chip mounted on the second substrate.Type: ApplicationFiled: December 1, 2009Publication date: April 8, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTDInventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Bum-Sik Jang, Tae-Sung Jeong
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Publication number: 20100078204Abstract: Disclosed herein is a printed circuit board including an electronic component embedded therein and a method of manufacturing the printed circuit board. The electronic component is disposed in a cavity of a resin layer including circuit layers formed on both sides thereof. The resin layer, the electronic component and the circuit layers are attached to each other via adhesive layers disposed therebetween. The printed circuit board is manufactured by a compression process, thus shortening a production time and simplifying a manufacturing process.Type: ApplicationFiled: January 14, 2009Publication date: April 1, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hong Bok We, Tae Sung Jeong
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Patent number: 7642656Abstract: A semiconductor package, which includes: a first substrate, on which a pre-designed pattern is formed; a first chip, mounted by a flip chip method on one side of the first substrate; a first molding, covering the first substrate and the first chip; a first via, which penetrates the first molding, and which is electrically connected with the pattern formed on the first substrate; an interposer, which is placed on the first molding, and on both sides of which a pre-designed pattern is formed respectively; a second via, penetrating the interposer and electrically connecting both sides of the interposer; a second substrate, placed on the interposer with at least one conductive ball positioned in-between, such that the second substrate is electrically connected with the pattern formed on the interposer; and a second chip mounted on the second substrate, can be used to improve heat release and increase the degree of integration.Type: GrantFiled: February 12, 2008Date of Patent: January 5, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Do-Jae Yoo, Young-Do Kweon, Seog-Moon Choi, Burn-Sik Jang, Tae-Sung Jeong
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Publication number: 20080308950Abstract: A semiconductor package, which includes: a first substrate, on which a pre-designed pattern is formed; a first chip, mounted by a flip chip method on one side of the first substrate; a first molding, covering the first substrate and the first chip; a first via, which penetrates the first molding, and which is electrically connected with the pattern formed on the first substrate; an interposer, which is placed on the first molding, and on both sides of which a pre-designed pattern is formed respectively; a second via, penetrating the interposer and electrically connecting both sides of the interposer; a second substrate, placed on the interposer with at least one conductive ball positioned in-between, such that the second substrate is electrically connected with the pattern formed on the interposer; and a second chip mounted on the second substrate, can be used to improve heat release and increase the degree of integration.Type: ApplicationFiled: February 12, 2008Publication date: December 18, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Do Jae Yoo, Young Do Kweon, Seog-Moon Choi, Burn-Sik Jang, Tae-Sung Jeong
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Publication number: 20070241441Abstract: A multichip package system is provided forming a first substrate having a first side, a second side, and a first opening, connecting a first integrated circuit die to the first substrate through the first opening, connecting a second integrated circuit die on the first substrate, and encapsulating the first integrated die and second integrated circuit die on the first substrate.Type: ApplicationFiled: April 17, 2006Publication date: October 18, 2007Applicant: STATS ChipPAC Ltd.Inventors: Sungwon Choi, Tae Sung Jeong