Abstract: A semiconductor device includes: a first well provided in a semiconductor substrate; a second well provided in the semiconductor substrate, so as to be isolated from the first well; a Schottky barrier diode formed in the first well; and a PN junction diode formed in the second well, with an impurity concentration of the PN junction thereof set higher than an impurity concentration of the Schottky junction of the Schottky barrier diode, and being connected antiparallel with the Schottky barrier diode.

Abstract: A semiconductor device includes: a first well provided in a semiconductor substrate; a second well provided in the semiconductor substrate, so as to be isolated from the first well; a Schottky barrier diode formed in the first well; and a PN junction diode formed in the second well, with an impurity concentration of the PN junction thereof set higher than an impurity concentration of the Schottky junction of the Schottky barrier diode, and being connected antiparallel with the Schottky barrier diode.

Abstract: A semiconductor device manufacturing method includes forming a silicon layer by epitaxial growth over a semiconductor substrate having a first area and a second area; forming a first gate oxide film by oxidizing the silicon layer; removing the first gate oxide film from the second area, while maintaining the first gate oxide film in the first area; thereafter, increasing a thickness of the first gate oxide film in the first area and simultaneously forming a second gate oxide film by oxidizing the silicon layer in the second area; and forming a first gate electrode and a second gate electrode over the first gate oxide film and the second gate oxide film, respectively, wherein after the formation of the first and second gate electrodes, the silicon layer in the first area is thicker than the silicon layer in the second area.

Abstract: A manufacturing method of a semiconductor device according to a disclosed embodiment includes: implanting a first impurity into a first region of a semiconductor substrate, forming a semiconductor layer on the semiconductor substrate, forming a trench in the semiconductor layer and the semiconductor substrate, forming an isolation insulating film in the trench, implanting a second impurity into a second region of the semiconductor layer, forming a first gate insulating film and a first gate electrode in the first region, forming a second gate insulating film and a second gate electrode in the second region, forming a first source region and a first drain region at both sides of the first gate electrode, and forming a second source region and a second drain region at both sides of the second gate electrode.

Abstract: A manufacturing method of a semiconductor device according to a disclosed embodiment includes: implanting a first impurity into a first region of a semiconductor substrate, forming a semiconductor layer on the semiconductor substrate, forming a trench in the semiconductor layer and the semiconductor substrate, forming an isolation insulating film in the trench, implanting a second impurity into a second region of the semiconductor layer, forming a first gate insulating film and a first gate electrode in the first region, forming a second gate insulating film and a second gate electrode in the second region, forming a first source region and a first drain region at both sides of the first gate electrode, and forming a second source region and a second drain region at both sides of the second gate electrode.

Abstract: The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions.

Abstract: A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.

Abstract: An impurity layer is formed in a first region of a semiconductor substrate, a silicon layer is grown on the semiconductor substrate, a tunnel gate insulating film is formed on a first silicon layer of a second region, a first conductor layer is formed on the tunnel gate insulating film, a first silicon oxide film and a silicon nitride film are formed on a second silicon layer, in a reduced pressure state, oxygen and hydrogen are independently introduced into an oxidation furnace to expose the silicon nitride film to active species of the oxygen and active species of the hydrogen to thereby oxidize the silicon nitride film to form a second silicon oxide film, a gate insulating film is formed on the silicon layer of the first region, a second conductor layer is formed on the second silicon oxide film and on the gate insulating film, the second conductor layer and the first conductor layer of the second region are patterned to form a stack gate of a nonvolatile memory transistor, and the second conductor layer a

Abstract: A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.

Abstract: A semiconductor device includes: a first well provided in a semiconductor substrate; a second well provided in the semiconductor substrate, so as to be isolated from the first well; a Schottky barrier diode formed in the first well; and a PN junction diode formed in the second well, with an impurity concentration of the PN junction thereof set higher than an impurity concentration of the Schottky junction of the Schottky barrier diode, and being connected antiparallel with the Schottky barrier diode.

Abstract: A semiconductor device includes: a substrate; a first active region formed in the substrate and that includes a first region that has a first width and a second region including a second width larger than the first width and extended in a first direction; a second active region formed in the substrate and extended in parallel to the second region of the first active region; and an element isolation insulating film formed in the substrate and that partitions the first active region and the second active region, respectively, wherein the second region of the first active region or the second active region includes a depressed part depressed in a second direction that is perpendicular to the first direction in a plan view.

Abstract: A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.

Abstract: An impurity layer is formed in a first region of a semiconductor substrate, a silicon layer is grown on the semiconductor substrate, a tunnel gate insulating film is formed on a first silicon layer of a second region, a first conductor layer is formed on the tunnel gate insulating film, a first silicon oxide film and a silicon nitride film are formed on a second silicon layer, in a reduced pressure state, oxygen and hydrogen are independently introduced into an oxidation furnace to expose the silicon nitride film to active species of the oxygen and active species of the hydrogen to thereby oxidize the silicon nitride film to form a second silicon oxide film, a gate insulating film is formed on the silicon layer of the first region, a second conductor layer is formed on the second silicon oxide film and on the gate insulating film, the second conductor layer and the first conductor layer of the second region are patterned to form a stack gate of a nonvolatile memory transistor, and the second conductor layer a

Abstract: The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and a first gate electrode formed above the first gate insulating film, and a second transistor including a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and having a thickness different from that of the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer and having a film thickness equal to that of the first gate insulating film and a second gate electrode formed above the second gate insulating film.

Abstract: A semiconductor device includes: a semiconductor substrate having first and second areas; an STI isolation region being made of an isolation trench formed in the semiconductor substrate and an insulating film burying the isolation trench and defining a plurality of active regions in the first and second areas; a first structure formed on an area from the active region in the first area to a nearby STI isolation region and having a first height; and a second structure formed on an area from the active region in the second area to a nearby STI isolation region and having a second height, wherein the surface of the said STI isolation region in the first area is lower than the surface of said STI isolation region in the second area.

Abstract: A semiconductor device includes a memory transistor including a first side wall insulating film and a second side wall insulating film disposed on the outside; a high-voltage transistor including a third side wall insulating film having the same composition as that of the first side wall insulating film, and a fourth side wall insulating film having the same composition as that of the second side wall insulating film, the fourth side wall insulating film being disposed on the outside; and a low-voltage transistor including a fifth side wall insulating film having the same composition as that of the second and fourth side wall insulating films. The memory transistor, the high-voltage transistor, and the low-voltage transistor are disposed on the same substrate. A total side wall spacer width of the low-voltage transistor is smaller than that of the high-voltage transistor by a thickness corresponding to the third side wall insulating film.

Abstract: A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region.

Abstract: A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region.

Abstract: A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region.

Abstract: A semiconductor wafer includes: a first semiconductor chip area formed with a semiconductor element; a second semiconductor chip area formed with a semiconductor element; and a scribe area sandwiched between said first and second semiconductor chip areas; wherein: the first semiconductor chip area includes a first metal ring surrounding the semiconductor element formed in the first semiconductor chip area; and the metal ring is constituted of a plurality of metal layers including an lower metal layer and an upper metal layer superposed upon the lower metal layer, and the upper metal layer is superposed upon the lower metal layer in such a manner that an outer side wall of the upper metal layer is flush with the outer side wall of the lower metal layer or is at an inner position of said first semiconductor chip area relative to said outer side wall of the lower metal layer.