Patents by Inventor Takafumi Nakamura

Takafumi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020098665
    Abstract: An object of the present invention is to provide with a method for manufacturing a semiconductor circuit by which a TFT including particles having a different threshold value is prevented from being operated even if such a TFT is locally formed.
    Type: Application
    Filed: March 1, 2002
    Publication date: July 25, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Takafumi Nakamura, Masanori Harada
  • Patent number: 6372612
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor circuit by which a TFT including particles having a different threshold value is prevented from being operated even if such a TFT is locally formed. According to the present invention, after forming an amorphous silicon layer on a glass substrate, heat treatment and the like is performed to convert the amorphous silicon layer into a polycrystalline silicon layer. At this time, a particle having an abnormal grain diameter is generated in a polycrystalline silicon layer under the influence of foreign particles in a glass substrate, and a TFT having a different threshold value may be formed.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Takafumi Nakamura, Masanori Harada
  • Patent number: 6229834
    Abstract: A semiconductor light emitting device has a double heterostructure. The device is composed of an active layer and clad layers that sandwich the active layer. At least one of the clad layers has a multilayer structure having at least two element layers. The Al mole fraction of an element layer, which is proximal to the active layer, of the multilayer structure is smaller than that of the other element layer thereof distal from the active layer. This arrangement improves the crystal quality of an interface between the active layer and the clad layer of multilayer structure and effectively confines carriers in the active layer.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: May 8, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiko Nisitani, Kazumi Unno, Masayuki Ishikawa, Ryo Saeki, Takafumi Nakamura, Masanobu Iwamoto
  • Patent number: 6204895
    Abstract: A display panel is to be fixed to a light collecting plate having a plurality of lenses and includes a matrix array of pixel electrodes opposed to the lenses of the light collecting plate, a plurality of electrode wiring lines formed along rows and columns of the pixel electrodes, and a driver circuit formed outside a display area corresponding to the matrix array of the pixel electrodes, for driving the pixel electrodes via the electrode wirings. Particularly, in the display panel, a plurality of alignment marks for positional adjustment of aligning the focal spots of the lenses with the pixel electrodes are arranged to be opposed to the lenses and separated from the display area by a distance corresponding to an integer number of times of a pitch of the pixel electrodes in at least one of row and column directions of the pixel electrodes.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: March 20, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroki Nakamura, Yoshihiro Watanabe, Takafumi Nakamura
  • Patent number: 5990497
    Abstract: A semiconductor light emitting element exhibiting a characteristic of deflected luminous intensity distribution, a semiconductor light emitting device capable of making, even when the element is off the center, a luminous center close to the center, and an element scribing method having a high element separation rate without causing a crack and chipping of pellet edges. The semiconductor light emitting element involves the use of a scribed pellet 10 into which a wafer including a semiconductor layer such as a luminous layer that is stacked on a compound semiconductor substrate inclined at 5.degree. through 20.degree. to a surface (100) in a orientation [011], is subjected to an element separation process by a scribing method.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanobu Kamakura, Takafumi Nakamura, Makoto Yamamura, Yoshio Ariizumi, Kazuhiro Tamura, Shinichi Sanda, Takumi Komoto, Yukio Watanabe
  • Patent number: 5732098
    Abstract: A semiconductor light emitting device has a double heterostructure. The device is composed of an active layer and clad layers that sandwich the active layer. At least one of the clad layers has a multilayer structure having at least two element layers. The Al mole fraction of an element layer, which is proximal to the active layer, of the multilayer structure is smaller than that of the other element layer thereof distal from the active layer. This arrangement improves the crystal quality of an interface between the active layer and the clad layer of multilayer structure and effectively confines carriers in the active layer.
    Type: Grant
    Filed: April 11, 1996
    Date of Patent: March 24, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiko Nisitani, Kazumi Unno, Masayuki Ishikawa, Ryo Saeki, Takafumi Nakamura, Masanobu Iwamoto
  • Patent number: 5636042
    Abstract: A liquid crystal display apparatus for controlling light transmittance corresponding to various defective pixel modes such as luminance point defects and a fabrication method thereof are disclosed. The orientation film corresponding to a defective display pixel has protrusion portions that are larger than the orientation film corresponding to each of the normal display pixels. The height and pitches of the protrusion portions are preferably 0.1 .mu.m or more and 10 .mu.m or less, respectively.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: June 3, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takafumi Nakamura, Takeru Hojo, Tomohiro Miura
  • Patent number: 5083282
    Abstract: A transition state detecting device of the invention is a device which is applied to the output stage of a detecting circuit such as a spectrum analyzer so as to display the waveform of an input signal in the form of a parameter and evaluate its characteristics. In order to perform real-time, quantitative measurement, the device includes a differentiating means (1) for differentiating an input signal and outputting a differential signal representing a transition state of the input signal, and a detecting means (2) for detecting the peak value of the differential signal output from the differentiating means and outputting a parameter corresponding to the transition state of the input signal.
    Type: Grant
    Filed: November 27, 1989
    Date of Patent: January 21, 1992
    Assignee: Anritsu Corporation
    Inventors: Aiichi Katayama, Kenji Nakatsugawa, Hitoshi Sekiya, Takafumi Nakamura