Patents by Inventor Takahiro Arakida
Takahiro Arakida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8582615Abstract: There is provided a semiconductor light-emitting device including a temperature detecting section which is allowed to accurately estimate an element temperature. The semiconductor light-emitting device includes: one or a plurality of surface-emitting semiconductor light-emitting sections and one or a plurality of semiconductor temperature detecting sections on a semiconductor substrate, the surface-emitting semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light to outside. The semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate.Type: GrantFiled: March 24, 2011Date of Patent: November 12, 2013Assignee: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Susumu Sato, Takahiro Arakida, Shiro Uchida
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Patent number: 8514905Abstract: A laser diode with which separation of a current narrowing layer is able to be prevented is provided. The laser diode includes a mesa that has a first multilayer film reflector, an active layer, and a second multilayer film reflector in this order, and has a current narrowing layer for narrowing a current injected into the active layer and a buffer layer adjacent to the current narrowing layer. The current narrowing layer is formed by oxidizing a first oxidized layer containing Al. The buffer layer is formed by oxidizing a second oxidized layer whose material and a thickness are selected so that an oxidation rate is higher than that of the first multilayer film reflector and the second multilayer film reflector and is lower than that of the first oxidized layer. A thickness of the buffer layer is 10 nm or more.Type: GrantFiled: August 23, 2010Date of Patent: August 20, 2013Assignee: Sony CorporationInventors: Yuji Masui, Rintaro Koda, Tomoyuki Oki, Takahiro Arakida, Naoki Jogan, Yoshinori Yamauchi
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Patent number: 8497141Abstract: A method of manufacturing a semiconductor device capable of largely increasing the yield and a semiconductor device manufactured by using the method is provided. After a semiconductor layer is formed on a substrate, as one group, a plurality of functional portions with at least one parameter value different from each other is formed in the semiconductor layer for every unit chip area. Then, a subject that is changed depending on the parameter value is measured and evaluated and after that, the substrate is divided for every chip area so that a functional portion corresponding with a given criterion as a result of the evaluation is not broken. Thereby, at least one functional portion corresponding with a given criterion can be formed by every chip area by appropriately adjusting each parameter value.Type: GrantFiled: August 8, 2011Date of Patent: July 30, 2013Assignee: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Kayoko Kikuchi, Rintaro Koda, Norihiko Yamaguchi
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Patent number: 8488647Abstract: The present invention provides a semiconductor light emitting device realizing increased light detection precision by a simple manufacture process. One or more second oxidation layers are provided between an active layer and a semiconductor light detecting element in addition to a first oxidation layer for narrowing current. Since natural emission light includes many divergence components, the natural emission light is reflected and scattered by the second oxidation layer, and propagation of the natural emission light to the semiconductor light detecting element side is suppressed. The detection level of the natural emission light by the semiconductor light detecting element decreases, and light detection precision increases. The first and second oxidation layers are formed by a single oxidizing process so that the manufacturing process is simplified.Type: GrantFiled: September 30, 2010Date of Patent: July 16, 2013Assignee: Sony CorporationInventors: Takahiro Arakida, Shiro Uchida, Masaki Shiozaki, Osamu Maeda
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Patent number: 8450752Abstract: The present invention provides a semiconductor device realizing reduced occurrence of a defect such as a crack at the time of adhering elements to each other. The semiconductor device includes a first element and a second element adhered to each other. At least one of the first and second elements has a pressure relaxation layer on the side facing the other of the first and second elements, and the pressure relaxation layer includes a semiconductor part having a projection/recess part including a projection projected toward the other element, and a resin part filled in a recess in the projection/recess part.Type: GrantFiled: January 31, 2011Date of Patent: May 28, 2013Assignee: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki
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Patent number: 8435815Abstract: A manufacturing method of a surface-emitting semiconductor laser includes the steps of: forming a stacked structure having a lower-multilayer film reflector including a lower oxidizable layer having at least one layer, an active layer having a light emitting region, an upper-multilayer film reflector including an upper oxidizable layer and an upper layer on a substrate in this order; providing a first groove in the upper layer; and providing a second groove including a portion overlapping the first groove in a planar shape and a portion not overlapping the first groove in the stacked structure.Type: GrantFiled: December 17, 2010Date of Patent: May 7, 2013Assignee: Sony CorporationInventors: Masaki Shiozaki, Osamu Maeda, Takahiro Arakida, Susumu Sato
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Patent number: 8372670Abstract: A method for making a light-emitting element assembly including a support substrate having a first surface, a second surface facing the first surface, a recessed portion, and a conductive material layer formed over the first surface and the inner surface of the recessed portion, and a light-emitting element. The light-emitting element has a laminated structure including a first compound semiconductor layer, a light-emitting portion, and a second compound semiconductor layer, at least the second compound semiconductor layer and the light-emitting portion constituting a mesa structure. The light-emitting element further includes an insulating layer formed, a second electrode, and a first electrode. The mesa structure is placed in the recessed portion so that the conductive material layer and the second electrode are in at least partial contact with each other, and light emitted from the light-emitting portion is emitted from the second surface side of the first compound semiconductor layer.Type: GrantFiled: July 22, 2010Date of Patent: February 12, 2013Assignee: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Satoshi Taniguchi, Yuji Masui, Nobuhiro Suzuki, Tomoyuki Oki, Chiyomi Uchiyama, Kayoko Kikuchi
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Patent number: 8363689Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.Type: GrantFiled: March 11, 2011Date of Patent: January 29, 2013Assignee: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
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Patent number: 8363687Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) capable of providing high output of fundamental transverse mode while preventing oscillation of high-order transverse mode is provided. The VCSEL includes a semiconductor layer including an active layer and a current confinement layer, and a transverse mode adjustment section formed on the semiconductor layer. The current confinement layer has a current injection region and a current confinement region. The transverse mode adjustment section has a high reflectance area and a low reflectance area. The high reflectance area is formed in a region including a first opposed region opposing to a center point of the current injection region. A center point of the high reflectance area is arranged in a region different from the first opposed region. The low reflectance area is formed in a region where the high reflectance area is not formed, in an opposed region opposing to the current injection region.Type: GrantFiled: April 15, 2011Date of Patent: January 29, 2013Assignee: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
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Patent number: 8290009Abstract: A vertical cavity surface emitting laser includes a layer-stack structure including, on a substrate, a transverse-mode adjustment layer, a first multilayer reflecting mirror, an active layer having a light emission region, and a second multilayer reflecting mirror in order from the substrate side, and including a current confinement layer in which a current injection region is formed in a region corresponding to the light emission region in the first multilayer reflecting mirror, between the first multilayer reflecting mirror and the active layer, between the active layer and the second multilayer reflecting mirror, or in the second multilayer reflecting mirror. In the transverse-mode adjustment layer, reflectance at an oscillation wavelength in the region opposite to a center of the light emission region is higher than that at an oscillation wavelength in the region opposite to an outer edge of the light emission region.Type: GrantFiled: July 28, 2009Date of Patent: October 16, 2012Assignee: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Osamu Maeda, Tomoyuki Oki, Naoki Jogan
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Publication number: 20120175670Abstract: A method for manufacturing a light emitting element including the steps of (A) sequentially forming on a substrate a first compound semiconductor layer having a first conduction type, an active layer, and a second compound semiconductor layer having a second conduction type; (B) forming a plurality of point-like hole portions in a thickness direction in at least a region of the second compound semiconductor layer located outside a region to be provided with a current confinement region; and (C) forming an insulating region by subjecting a part of the second compound semiconductor layer to an insulation treatment from side walls of the hole portions so as to produce the current confinement region surrounded by the insulating region in the second compound semiconductor layer.Type: ApplicationFiled: March 20, 2012Publication date: July 12, 2012Applicant: SONY CORPORATIONInventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Tomoyuki Oki
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Patent number: 8218596Abstract: A Vertical Cavity Surface Emitting Laser capable of decreasing the lowering of the yield due to displacement and separation of a pedestal without enormous increase of the threshold value and more difficult manufacturing process is provided. A base of a mesa spreads over the top face of a lower DBR layer. The base is a non-flat face in which end faces of a plurality of layers are exposed. The non-flat face is generated due to etching unevenness in forming the mesa, and is in a state of a step in which end faces of a low-refractive index layer and a high-refractive index layer included in the lower DBR layer are alternatively exposed. At least one of the layers exposed in the non-flat face in the plurality of low-refractive index layers included in the lower DBR layer is an oxidation inhibition layer.Type: GrantFiled: October 12, 2011Date of Patent: July 10, 2012Assignee: Sony CorporationInventors: Tomoyuki Oki, Rintaro Koda, Naoki Jogan, Yuji Masui, Takahiro Arakida
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Patent number: 8218594Abstract: The present invention provides a Vertical Cavity Surface Emitting Laser including: a first multilayer film reflector; an active layer having a light emission region; a second multilayer film reflector; and a reflectance adjustment layer in this order on a substrate side. The first multilayer film reflector and the second multilayer film reflector have a laminated structure in which reflectance of oscillation wavelength ?x is almost constant without depending on temperature change. The active layer is made of a material with which a maximum gain is obtained at temperature higher than ambient temperature. The reflectance adjustment layer has a laminated structure in which difference ?R(=Rx?Ry) between reflectance Rx of a region opposed to a central region of the light emission region and reflectance Ry of a region opposed to an outer edge region of the light emission region is increased associated with temperature increase from ambient temperature to high temperature.Type: GrantFiled: July 22, 2009Date of Patent: July 10, 2012Assignee: Sony CorporationInventors: Osamu Maeda, Yuji Masui, Masaki Shiozaki, Takahiro Arakida, Takayuki Kawasumi
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Patent number: 8183074Abstract: A method for manufacturing a light emitting element includes the steps of (A) forming sequentially a first compound semiconductor layer having a first conduction type, an active layer, and a second compound semiconductor layer having a second conduction type on a substrate, (B) forming a plurality of point-like hole portions in a thickness direction in at least a region of the second compound semiconductor layer located outside a region to be provided with a current confinement region, and (C) forming an insulating region by subjecting a part of the second compound semiconductor layer to an insulation treatment from side walls of the hole portions so as to produce the current confinement region surrounded by the insulating region in the second compound semiconductor layer.Type: GrantFiled: January 14, 2008Date of Patent: May 22, 2012Assignee: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Tomoyuki Oki
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Patent number: 8180189Abstract: An optical module includes an optical waveguide including a plurality of waveguide cores through which light propagates, a clad configured to trap the light in the waveguide cores, a plurality of fiber guide grooves in which optical fibers are inserted, the fiber guide grooves being arranged in parallel, and an adhesive spread groove configured to connect the fiber guide grooves and provided at leading ends of the fiber guide grooves with which the optical fibers contact; and a fixing member fixed to the optical waveguide with an adhesive while covering the fiber guide grooves. The fiber guide grooves have side walls including support projections configured to support, align, and optical couple the optical fibers to the waveguide cores, and adhesive recesses configured to define gaps between outer peripheral surfaces of the optical fibers and the fiber guide grooves so that the adhesive spreads in the gaps.Type: GrantFiled: January 29, 2009Date of Patent: May 15, 2012Assignee: Sony CorporationInventors: Miwa Okubo, Takahiro Arakida, Hidehiko Nakata, Terukazu Naruse
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Patent number: 8121445Abstract: An optical device includes: a multilayer structure substrate on which plural insulating layers are stacked and a wiring pattern is formed between layers; a recessed part for exposing the wiring pattern between the layers by cutting off a part of the multilayer structure substrate; an optical element mounted within the recessed part in electric conduction to the wiring pattern exposed by the recessed part; and an optical waveguide member forming an optical path for the optical element and guiding light along a surface of the multilayer structure substrate.Type: GrantFiled: June 9, 2009Date of Patent: February 21, 2012Assignee: Sony CorporationInventors: Terukazu Naruse, Takahiro Arakida
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Publication number: 20120034720Abstract: A Vertical Cavity Surface Emitting Laser capable of decreasing the lowering of the yield due to displacement and separation of a pedestal without enormous increase of the threshold value and more difficult manufacturing process is provided. A base of a mesa spreads over the top face of a lower DBR layer. The base is a non-flat face in which end faces of a plurality of layers are exposed. The non-flat face is generated due to etching unevenness in forming the mesa, and is in a state of a step in which end faces of a low-refractive index layer and a high-refractive index layer included in the lower DBR layer are alternatively exposed. At least one of the layers exposed in the non-flat face in the plurality of low-refractive index layers included in the lower DBR layer is an oxidation inhibition layer.Type: ApplicationFiled: October 12, 2011Publication date: February 9, 2012Applicant: Sony CorporationInventors: Tomoyuki Oki, Rintaro Koda, Naoki Jogan, Yuji Masui, Takahiro Arakida
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Patent number: 8102890Abstract: A semiconductor light emitting device includes a first-conductivity-type first multilayer film reflecting mirror, and a second-conductivity-type second multilayer film reflecting mirror; a cavity layer; and a first conductive section, a second conductive section, and a third conductive section. The cavity layer has a stacked configuration including a first-conductivity-type or undoped first cladding layer, an undoped first active layer, a second-conductivity-type or undoped second cladding layer, a second-conductivity-type first contact layer, a first-conductivity-type second contact layer, a first-conductivity-type or undoped third cladding layer, an undoped second active layer, and a second-conductivity-type or undoped fourth cladding layer.Type: GrantFiled: March 21, 2011Date of Patent: January 24, 2012Assignee: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Rintaro Koda, Tomoyuki Oki, Naoki Jogan
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Patent number: 8100589Abstract: An optical module includes an optical waveguide including a waveguide core through which light propagates and a clad configured to trap the light in the waveguide core, and a circuit board on which a surface-type optical element is mounted. The optical waveguide further includes a reflective surface from which an end face of the waveguide core is exposed, the reflective surface being provided on an inclined face at one end face of the optical waveguide core in an extending direction of the waveguide core, and an element mount opening provided in the clad such as to be opposite from the reflective surface, the element mount opening having a size such as to contain the optical element. The optical waveguide is mounted on the circuit board while the optical element is contained in the element mount opening and is aligned with the reflective surface of the optical waveguide.Type: GrantFiled: January 29, 2009Date of Patent: January 24, 2012Assignee: Sony CorporationInventors: Miwa Okubo, Takahiro Arakida, Hidehiko Nakata, Terukazu Naruse
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Patent number: 8098703Abstract: A laser diode allowed to stabilize the polarization direction of laser light in one direction is provided. The laser diode includes a laminate configuration including a lower multilayer reflecting mirror, an active layer and an upper multilayer reflecting mirror in order from a substrate side, in which the laminate configuration includes a columnar mesa section including an upper part of the lower multilayer reflecting mirror, the active layer and the upper multilayer reflecting mirror, and the lower multilayer reflecting mirror includes a plurality of pairs of a low refractive index layer and a high refractive index layer, and a plurality of oxidation layers nonuniformly distributed in a direction rotating around a central axis of the mesa section in a region except for a central region of one or more of the low refractive index layers.Type: GrantFiled: January 29, 2010Date of Patent: January 17, 2012Assignee: Sony CorporationInventors: Osamu Maeda, Yuji Masui, Masaki Shiozaki, Susumu Sato, Takahiro Arakida