Patents by Inventor Takahiro Arakida
Takahiro Arakida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100040104Abstract: The present invention provides a Vertical Cavity Surface Emitting Laser including: a first multilayer film reflector; an active layer having a light emission region; a second multilayer film reflector; and a reflectance adjustment layer in this order on a substrate side. The first multilayer film reflector and the second multilayer film reflector have a laminated structure in which reflectance of oscillation wavelength ?x is almost constant without depending on temperature change. The active layer is made of a material with which a maximum gain is obtained at temperature higher than ambient temperature. The reflectance adjustment layer has a laminated structure in which difference ?R(=Rx?Ry) between reflectance Rx of a region opposed to a central region of the light emission region and reflectance Ry of a region opposed to an outer edge region of the light emission region is increased associated with temperature increase from ambient temperature to high temperature.Type: ApplicationFiled: July 22, 2009Publication date: February 18, 2010Applicant: Sony CorporationInventors: Osamu Maeda, Yuji Masui, Masaki Shiozaki, Takahiro Arakida, Takayuki Kawasumi
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Publication number: 20100021107Abstract: An optical device includes: a multilayer structure substrate on which plural insulating layers are stacked and a wiring pattern is formed between layers; a recessed part for exposing the wiring pattern between the layers by cutting off a part of the multilayer structure substrate; an optical element mounted within the recessed part in electric conduction to the wiring pattern exposed by the recessed part; and an optical waveguide member forming an optical path for the optical element and guiding light along a surface of the multilayer structure substrate.Type: ApplicationFiled: June 9, 2009Publication date: January 28, 2010Applicant: Sony CorporationInventors: Terukazu Naruse, Takahiro Arakida
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Publication number: 20090285253Abstract: A semiconductor light emitting device includes a first-conductivity-type first multilayer film reflecting mirror, and a second-conductivity-type second multilayer film reflecting mirror; a cavity layer; and a first conductive section, a second conductive section, and a third conductive section. The cavity layer has a stacked configuration including a first-conductivity-type or undoped first cladding layer, an undoped first active layer, a second-conductivity-type or undoped second cladding layer, a second-conductivity-type first contact layer, a first-conductivity-type second contact layer, a first-conductivity-type or undoped third cladding layer, an undoped second active layer, and a second-conductivity-type or undoped fourth cladding layer.Type: ApplicationFiled: April 21, 2009Publication date: November 19, 2009Applicant: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Rintaro Koda, Tomoyuki Oki, Naoki Jogan
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Publication number: 20090268774Abstract: A Vertical Cavity Surface Emitting Laser capable of decreasing the lowering of the yield due to displacement and separation of a pedestal without enormous increase of the threshold value and more difficult manufacturing process is provided. A base of a mesa spreads over the top face of a lower DBR layer. The base is a non-flat face in which end faces of a plurality of layers are exposed. The non-flat face is generated due to etching unevenness in forming the mesa, and is in a state of a step in which end faces of a low-refractive index layer and a high-refractive index layer included in the lower DBR layer are alternatively exposed. At least one of the layers exposed in the non-flat face in the plurality of low-refractive index layers included in the lower DBR layer is an oxidation inhibition layer.Type: ApplicationFiled: March 3, 2009Publication date: October 29, 2009Applicant: Sony CorporationInventors: Tomoyuki Oki, Rintaro Koda, Naoki Jogan, Yuji Masui, Takahiro Arakida
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Patent number: 7601987Abstract: The present invention provides a semiconductor light emitting device realizing a lower detection level of spontaneous emission light by a semiconductor photodetector and an improvement in light detection precision by selectively reflecting spontaneous emission light. The semiconductor light emitting device includes a semiconductor light emitting element for generating light including stimulated emission light having a wavelength ?o and spontaneous emission light having a wavelength band including the wavelength ?o, a multilayer filter having a stack structure in which a low-refractive-index layer having a thickness of ?1/(4×na) (?1<?o and na denote refractive index) and a high-refractive-index layer having a thickness of ?1/(4×nb) (nb>na and nb denote refractive index) are alternately stacked, and a semiconductor photodetector having a light absorption layer that absorbs part of the light passed through the multilayer filter.Type: GrantFiled: March 31, 2008Date of Patent: October 13, 2009Assignee: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki
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Patent number: 7590315Abstract: An optical waveguide contains a core layer in which light is transferred, and a cladding layer that clads the core layer. The core layer has an inclined end surface across a direction where the core layer extends. The inclined end surface reflects light from the core layer to outside or light from the outside to the core layer. The cladding layer has an end portion that extends to the inclined surface of the core layer. The cladding layer includes a system that prevents an adhesive agent from flowing out.Type: GrantFiled: November 27, 2007Date of Patent: September 15, 2009Assignee: Sony CorporationInventors: Miwa Okubo, Takahiro Arakida, Hidehiko Nakata, Terukazu Naruse, Momoko Eguchi
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Publication number: 20090214156Abstract: An optical module includes an optical waveguide including a waveguide core through which light propagates and a clad configured to trap the light in the waveguide core, and a circuit board on which a surface-type optical element is mounted. The optical waveguide further includes a reflective surface from which an end face of the waveguide core is exposed, the reflective surface being provided on an inclined face at one end face of the optical waveguide core in an extending direction of the waveguide core, and an element mount opening provided in the clad such as to be opposite from the reflective surface, the element mount opening having a size such as to contain the optical element. The optical waveguide is mounted on the circuit board while the optical element is contained in the element mount opening and is aligned with the reflective surface of the optical waveguide.Type: ApplicationFiled: January 29, 2009Publication date: August 27, 2009Applicant: Sony CorporationInventors: Miwa Okubo, Takahiro Arakida, Hidehiko Nakata, Terukazu Naruse
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Publication number: 20090214157Abstract: An optical module includes an optical waveguide including a plurality of waveguide cores through which light propagates, a clad configured to trap the light in the waveguide cores, a plurality of fiber guide grooves in which optical fibers are inserted, the fiber guide grooves being arranged in parallel, and an adhesive spread groove configured to connect the fiber guide grooves and provided at leading ends of the fiber guide grooves with which the optical fibers contact; and a fixing member fixed to the optical waveguide with an adhesive while covering the fiber guide grooves. The fiber guide grooves have side walls including support projections configured to support, align, and optical couple the optical fibers to the waveguide cores, and adhesive recesses configured to define gaps between outer peripheral surfaces of the optical fibers and the fiber guide grooves so that the adhesive spreads in the gaps.Type: ApplicationFiled: January 29, 2009Publication date: August 27, 2009Applicant: Sony CorporationInventors: Miwa Okubo, Takahiro Arakida, Hidehiko Nakata, Terukazu Naruse
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Publication number: 20090194837Abstract: The present invention provides a semiconductor light receiving element capable of reducing capacity while minimizing increase in travel time of carriers. The semiconductor light receiving element includes a semiconductor stacked structure including a first conductivity type layer, a light absorbing layer, and a second conductivity type layer having a light incidence plane in order. The semiconductor light receiving element has an oxidation layer including a non-oxidation region and an oxidation region in a stacking in-plane direction in the light absorbing layer or between the first conductivity type layer and the light absorbing layer.Type: ApplicationFiled: January 29, 2009Publication date: August 6, 2009Applicant: Sony CorporationInventors: Yoshinori Yamauchi, Takahiro Arakida, Rintaro Koda, Norihiko Yamaguchi, Yuji Masui, Tomoyuki Oki
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Publication number: 20090180506Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) capable of providing high output of fundamental transverse mode while preventing oscillation of high-order transverse mode is provided. The VCSEL includes a semiconductor layer including an active layer and a current confinement layer, and a transverse mode adjustment section formed on the semiconductor layer. The current confinement layer has a current injection region and a current confinement region. The transverse mode adjustment section has a high reflectance area and a low reflectance area. The high reflectance area is formed in a region including a first opposed region opposing to a center point of the current injection region. A center point of the high reflectance area is arranged in a region different from the first opposed region. The low reflectance area is formed in a region where the high reflectance area is not formed, in an opposed region opposing to the current injection region.Type: ApplicationFiled: December 29, 2008Publication date: July 16, 2009Applicant: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
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Publication number: 20090168825Abstract: A light-emitting element assembly includes a support substrate having a first surface, a second surface facing the first surface, a recessed portion, and a conductive material layer formed over the first surface and the inner surface of the recessed portion, and a light-emitting element. The light-emitting element has a laminated structure including a first compound semiconductor layer, a light-emitting portion, and a second compound semiconductor layer, at least the second compound semiconductor layer and the light-emitting portion constituting a mesa structure. The light-emitting element further includes an insulating layer formed, a second electrode, and a first electrode. The mesa structure is placed in the recessed portion so that the conductive material layer and the second electrode are in at least partial contact with each other, and light emitted from the light-emitting portion is emitted from the second surface side of the first compound semiconductor layer.Type: ApplicationFiled: December 12, 2008Publication date: July 2, 2009Applicant: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Satoshi Taniguchi, Yuji Masui, Nobuhiro Suzuki, Tomoyuki Oki, Chiyomi Uchiyama, Kayoko Kikuchi
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Publication number: 20090098675Abstract: A method of manufacturing a semiconductor light-emitting device includes steps of forming a vertical cavity structure including a layer to be oxidized on a semiconductor substrate, and then forming a circular groove having a depth which penetrates at least the layer to be oxidized from an upper surface of the vertical cavity structure, thereby forming a columnar mesa whose side face is surrounded by the groove, oxidizing the layer to be oxidized from the side face of the mesa, thereby forming a current confinement layer, and forming a mask layer covering at least a central region of the upper surface of the mesa and exposing at least an edge of the upper surface and the side face of the mesa to an external, and then etching at least the edge of the upper surface and the side face of the mesa by using the mask layer as a mask.Type: ApplicationFiled: October 1, 2008Publication date: April 16, 2009Applicant: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Rintaro Koda, Tomoyuki Oki
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Publication number: 20090052490Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.Type: ApplicationFiled: July 23, 2008Publication date: February 26, 2009Applicant: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
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Publication number: 20090032908Abstract: A method of manufacturing a semiconductor device capable of largely increasing the yield and a semiconductor device manufactured by using the method is provided. After a semiconductor layer is formed on a substrate, as one group, a plurality of functional portions with at least one parameter value different from each other is formed in the semiconductor layer for every unit chip area. Then, a subject that is changed depending on the parameter value is measured and evaluated and after that, the substrate is divided for every chip area so that a functional portion corresponding with a given criterion as a result of the evaluation is not broken. Thereby, at least one functional portion corresponding with a given criterion can be formed by every chip area by appropriately adjusting each parameter value.Type: ApplicationFiled: June 5, 2007Publication date: February 5, 2009Applicant: Sony CorporationInventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Kayoko Kikuchi, Rintaro Koda, Norihiko Yamaguchi
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Publication number: 20090001386Abstract: The present invention provides a semiconductor device realizing reduced occurrence of a defect such as a crack at the time of adhering elements to each other. The semiconductor device includes a first element and a second element adhered to each other. At least one of the first and second elements has a pressure relaxation layer on the side facing the other of the first and second elements, and the pressure relaxation layer includes a semiconductor part having a projection/recess part including a projection projected toward the other element, and a resin part filled in a recess in the projection/recess part.Type: ApplicationFiled: April 15, 2008Publication date: January 1, 2009Applicant: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki
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Patent number: 7454104Abstract: An optical module has at least two optical elements mounted in parallel with each other. The module also has a first electrode pad which is formed between the paralleled optical elements and grounded to a ground potential and a second electrode pad which is arranged along a line that is intersected with a direction in which the optical elements are arranged, which faces the first electrode pad and is grounded to the ground potential. The module further has a conductive shield member which is connected to the first electrode pad and the second electrode pad and placed between electrical signal transmission paths each connected to the optical elements.Type: GrantFiled: July 11, 2006Date of Patent: November 18, 2008Assignee: Sony CorporationInventors: Hidehiko Nakata, Takahiro Arakida, Terukazu Naruse, Miwa Okubo, Kazuyoshi Yamada, Momoko Eguchi
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Publication number: 20080279241Abstract: A light-emitting element includes a mesa structure in which a first compound semiconductor layer of a first conductivity type, an active layer, and a second compound semiconductor layer of a second conductivity type are disposed in that order, wherein at least one of the first compound semiconductor layer and the second compound semiconductor layer has a current constriction region surrounded by an insulation region extending inward from a sidewall portion of the mesa structure; a wall structure disposed so as to surround the mesa structure; at least one bridge structure connecting the mesa structure and the wall structure, the wall structure and the bridge structure each having the same layer structure as the portion of the mesa structure in which the insulation region is provided; a first electrode; and a second electrode disposed on a top face of the wall structure.Type: ApplicationFiled: April 3, 2008Publication date: November 13, 2008Applicant: Sony CorporationInventors: Tomoyuki Oki, Yuji Masui, Yoshinori Yamauchi, Rintaro Koda, Takahiro Arakida
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Publication number: 20080251794Abstract: The present invention provides a semiconductor light emitting device realizing lower detection level of spontaneous emission light by a semiconductor photodetector and improvement in light detection precision by selectively reflecting spontaneous emission light. The semiconductor light emitting device includes a semiconductor light emitting element for generating light including stimulated emission light having a wavelength ?o and spontaneous emission light having a wavelength band including the wavelength ?o, a multilayer filter having a stack structure in which a low-refractive-index layer having a thickness of ?1/(4×na) (?1<?o and na denotes refractive index) and a high-refractive-index layer having a thickness of ?1/(4×nb) (nb>na and nb denotes refractive index) are alternately stacked, and a semiconductor photodetector having a light absorption layer that absorbs a part of light passed through the multilayer filter.Type: ApplicationFiled: March 31, 2008Publication date: October 16, 2008Applicant: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki
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Publication number: 20080240194Abstract: A VSCEL capable of being easily and inexpensively manufactured and of stabilizing the polarization direction of laser light in one direction is provided. The Vertical Cavity Surface Emitting Laser includes a semiconductor lamination structure including a first multilayer film reflector, an active layer having a light emitting region, and a second multilayer film reflector in this order over a substrate from the substrate side. The semiconductor lamination structure has a pair of grooves provided with a region opposed to the light emitting region in between, and one or a plurality of first oxidation layers including a first non-oxidation region provided at least in a region opposed to the light emitting region and a first oxidation region provided on each side face of the pair of grooves.Type: ApplicationFiled: March 24, 2008Publication date: October 2, 2008Applicant: Sony CorporationInventors: Osamu Maeda, Masaki Shiozaki, Norihiko Yamaguchi, Yoshinori Yamauchi, Takahiro Arakida
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Publication number: 20080232414Abstract: A method for manufacturing a light emitting element includes the steps of (A) forming sequentially a first compound semiconductor layer having a first conduction type, an active layer, and a second compound semiconductor layer having a second conduction type on a substrate, (B) forming a plurality of point-like hole portions in a thickness direction in at least a region of the second compound semiconductor layer located outside a region to be provided with a current confinement region, and (C) forming an insulating region by subjecting a part of the second compound semiconductor layer to an insulation treatment from side walls of the hole portions so as to produce the current confinement region surrounded by the insulating region in the second compound semiconductor layer.Type: ApplicationFiled: January 14, 2008Publication date: September 25, 2008Applicant: SONY CORPORATIONInventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Tomoyuki Oki