Patents by Inventor Takao Kuroda

Takao Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5324669
    Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer ( 6 ) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9 ) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate ( 5). The thick, low-density p-layer ( 33 ) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: June 28, 1994
    Assignee: Matsushita Electronics Corporation
    Inventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
  • Patent number: 5315137
    Abstract: The present invention relates to a charge transfer device having high transfer efficiency without leaving over signal charges, a charge transfer device substantially shortened in the gate length so as to enhance the transfer speed, and a method of manufacturing and a method of driving such device. In the charge transfer device of the invention, the n.sup.- diffusion layer is formed on the semiconductor substrate. In the surface region of the n.sup.- diffusion layer, a plurality of n diffusion layers are formed at equal intervals. The interval of the adjacent n diffusion layers is about 5 to 10 .mu.m. On the n.sup.- diffusion layer, an insulation film is formed. On the insulation film, transfer electrodes having two different shapes are formed. The transfer electrodes of these two types are alternately arranged. These transfer electrodes differ in length. The length of the longer transfer electrodes is about twice the length of the shorter transfer electrodes.
    Type: Grant
    Filed: November 12, 1991
    Date of Patent: May 24, 1994
    Assignee: Matsushita Electronics Corporation
    Inventors: Masaji Asaumi, Takao Kuroda
  • Patent number: 5262661
    Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer (6) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate (5). The thick, low-density p-layer (33) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: November 16, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
  • Patent number: 5041392
    Abstract: In a solid state image sensing device of p-conductivity type well, photo-electro converting region (1) are configurated to have larger area as depth increases, so that excessive electric charges generated in the p-conductivity type well are easily transferred from expanded peripheral parts (7) at the bottom (1b) to channel (3), without being undesirably transferred downward through thin p-conductivity type region 6 to substrate (4), and smear electric charges which has been generated in a thin p-conductivity type well under the photo-electro converting region in the conventional device is suppressed, to effectively decrease the smear phenomenon.
    Type: Grant
    Filed: June 27, 1990
    Date of Patent: August 20, 1991
    Assignee: Matsushita Electronics Corporation
    Inventors: Takao Kuroda, Toshihiro Kuriyama, Kenju Horii, Hiroyuki Mizuno
  • Patent number: 4947224
    Abstract: In a solid state image sensing device of P-conductivity type well, photo-electro converting region (1) are configured to have a larger area as the depth increases, so that excessive electric charges generated in the p-conductivity type well are easily transferred from expanded peripheral parts (7) at the bottom (1b) to channel (3), without being undesirably transferred downward through thin p-conductivity type region 6 to substrate (4), and smear electric charges which has been generated in a thin p-conductivity type well under the photo-electro converting region in the conventional device is suppressed, to effectively decrease the smear phenomenon.
    Type: Grant
    Filed: September 26, 1988
    Date of Patent: August 7, 1990
    Assignee: Matsushita Electronics Corporation
    Inventors: Takao Kuroda, Toshihiro Kuriyama, Kenju Horii, Hiroyuki Mizuno
  • Patent number: 4905057
    Abstract: A semiconductor device such as a semiconductor laser device or a transistor which is small in both threshold current and leakage current and exhibits no increase with time in the threshold current and leakage current can be obtained by incorporating pnp or npn junctions in a buried layer which coats an active region containing InGaAsP, forming the mid layer of the junctions with InGaAsP, adjusting the conductivity type of the mid layer with an implanted ion and specifying the energy band width of a semiconductor constituting the mid layer.
    Type: Grant
    Filed: March 17, 1989
    Date of Patent: February 27, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Akio Ohishi, Takao Kuroda, Shinji Tsuji, Motohisa Hirao, Hiroyoshi Matsumura
  • Patent number: 4835581
    Abstract: Disclosed is a semiconductor device comprising a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer which is formed between the first semiconductor layer and the second semiconductor layer and a band gap of which is narrower than that of each of the first and second layers, so that band discontinuities in conduction bands and valence bands of the three layers form a barrier to the third semiconductor layer, and that a tunneling current can flow through the third semmiconductor layer owing to an internal electric field of the third semiconductor layer.
    Type: Grant
    Filed: July 23, 1987
    Date of Patent: May 30, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kuroda, Akiyoshi Watanabe, Takao Miyazaki, Hiroyoshi Matsumura
  • Patent number: 4819036
    Abstract: A novel method which enables a quaternary III-V group crystal to be readily formed on a III-V group crystal so that the former crystal lattice-matches with the latter crystal. More specifically, it is easy to produce a superlattice structure on a III-V group crystal substrate, the superlattice structure consisting of a first III-V group (hereinafter referred to as "III.sup.1 -V.sup.1 ") binary crystal layer which lattice-matches with the substrate, and a III-V group (III.sup.1 -III.sup.2 -V.sup.2) ternary crystal layer which similarly lattice-matches with the substrate. It is possible to obtain an even more stable superlattice layer by selecting the ratio between the film thickness of the (III.sup.1 -V.sup.1) crystal and the film thickness of the (III.sup.1 -III.sup.2 -V.sup.2) crystal so that, when the superlattice structure is mixed-crystallized spontaneously or by means of impurity doping, the mixed-crystallized composition lattice-matches with the previous crystal.
    Type: Grant
    Filed: May 4, 1987
    Date of Patent: April 4, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kuroda, Akiyoshi Watanabe, Shinji Tsuji, Akio Ohishi, Hiroyoshi Matsumura
  • Patent number: 4814838
    Abstract: A semiconductor device in which two sorts of compound semiconductors having unequal lattice constants are joined, is disclosed.Defects such as dislocations attributed to lattice mismatching are avoided by subjecting one of the compound semiconductors to atomic layer doping with an impurity. Owing to this construction, it is permitted to combine the optimum materials as the compound semiconductors, and the semiconductor device has its performance improved and its design versatility expanded.
    Type: Grant
    Filed: June 2, 1987
    Date of Patent: March 21, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kuroda, Akiyoshi Watanabe, Takao Miyazaki, Hiroyoshi Matsumura
  • Patent number: 4783702
    Abstract: A solid state image sensing device which transfers unnecessary signal charges accumulated at photoelectric conversion devices by a first charge pulse in a vertical blanking period to vertical transferring means and throws out the unnecessary signal charges using throw-away means. The necessary signal charges accumulated in the photoelectric conversion devices in such period after the first charge pulse are transferred by a second charge pulse to the vertical transferring means, a horizontal transferring means and a signal detecting means, thereby to issue a video signal.
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: November 8, 1988
    Assignee: Matsushita Electronics Corporation
    Inventors: Yoshiaki Sone, Takao Kuroda
  • Patent number: 4766092
    Abstract: When a semiconductor device is produced by growing epitaxially a compound semiconductor layer on a Si or Ge substrate, lattice matching between the substrate crystal and the compound semiconductor layer to be formed on the substrate can be improved by ion-implanting an ion species element, which increases the lattice constant of Si or Ge as the substrate, into the Si or Ge substrate in order to increase its lattice constant. In comparison with conventional semiconductor devices using Si or Ge into which ion implantation is not made, the semiconductor device produced by the method described above can improve remarkably its characteristics. In the case of a semiconductor laser device, for example, its threshold value drops drastically and its service life can be prolonged remarkably.
    Type: Grant
    Filed: December 2, 1986
    Date of Patent: August 23, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kuroda, Kenji Hiruma, Hiroyoshi Matsumura
  • Patent number: 4673959
    Abstract: There is disclosed a semiconductor device comprising at least first and second semiconductor layers positioned to form a hetero-junction therebetween, such a hetero-junction being adapted to form a channel, means for controlling carriers, and source and drain areas on opposite edges of the channel, wherein the first and second semiconductor layers formed between the source and drain regions have an area containing only 10.sup.16 cm.sup.-3 or less of an impurity; the first semiconductor layer has a wider forbidden band than that of the second semiconductor layer; and further including at least one semiconductor layer having a higher activation efficiency of impurities than that of the first semiconductor layer, with such at least one semiconductor layer being located on the side of the first semiconductor layer not in contact with the second semiconductor layer. A multi-quantum well structure may be used as the higher impurity activation efficiency semiconductor layer.
    Type: Grant
    Filed: December 27, 1984
    Date of Patent: June 16, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Shiraki, Yoshifumi Katayama, Yoshimasa Murayama, Makoto Morioka, Yasushi Sawada, Tomoyoshi Mishima, Takao Kuroda, Eiichi Maruyama
  • Patent number: 4672406
    Abstract: A semiconductor member has a structure wherein a first semiconductor layer is held between second and third semiconductor layers which have forbidden band widths greater than a forbidden band width of the first semiconductor layer, and wherein only the second semiconductor layer which is formed on a side of the first semiconductor layer close to a substrate is doped with impurities. The semiconductor member constructs the depletion type with the first and second semiconductor layers, and the enhancement type with the first and third semiconductor layers. A semiconductor device can be properly formed in the enhancement or depletion type by selectively connecting the semiconductor layers.
    Type: Grant
    Filed: December 21, 1984
    Date of Patent: June 9, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Sawada, Kiichi Ueyanagi, Yoshifumi Katayama, Yasuhiro Shiraki, Makoto Morioka, Takao Kuroda, Tomoyoshi Mishima
  • Patent number: 4630091
    Abstract: Photoelectric transducing elements are formed in a first impurity-doped region (14), and signal charge reading-out circuits (2, 3) are formed in a second impurity-doped region which is deeper than the first impurity-doped region, so that fixed pattern noise is drastically reduced, improving picture quality.
    Type: Grant
    Filed: April 19, 1984
    Date of Patent: December 16, 1986
    Assignees: Matsushita Electronics Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Takao Kuroda, Shigenori Matsumoto, Kenju Horii, Takahiro Yamada
  • Patent number: 4630279
    Abstract: Disclosed herein is a semiconductor laser device including at least an optical confinement region having at least first, second and third semiconductor layers disposed on a semiconductor substrate, wherein the first and third semiconductor layers have refractive indices greater than the refractive index of the second semiconductor layer but have forebidden band gap smaller than that of the second semiconductor layer and the conductivity types of the first and third semiconductor layers are opposite to each other; the second semiconductor layer has a smooth change of its thickness in two directions parallel to a junction surface of the optical confinement region; and a difference exists in the refractive indices of the first and third semiconductor layers.
    Type: Grant
    Filed: February 1, 1983
    Date of Patent: December 16, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Kajimura, Takao Kuroda, Yasutoshi Kashiwada, Naoki Chinone, Kunio Aiki
  • Patent number: 4586050
    Abstract: An automatic tracking system for an antenna device for satellite communications and using step tracking principles is disclosed which repeatedly effects tracking at predetermined intervals so that the receive electric field from the satellite becomes maximum. When a platform loaded with an antenna device for satellite communications is caused to sway to an inclined position during an interval between sequential tracking operations, sensors senses a pitching angle and a rolling angle of the platform. The outputs of the sensors are compared with an angle previously stored as an inclination angle of the platform which existed just before interval between sequential tracking operations. If the difference is larger than a predetermined value, step tracking is resumed to track the satellite even in a suspension period of step tracking.
    Type: Grant
    Filed: September 15, 1983
    Date of Patent: April 29, 1986
    Assignee: NEC Corporation
    Inventors: Takao Kuroda, Ryuji Shimizu
  • Patent number: 4580522
    Abstract: A rotary substrate holder of a molecular beam epitaxy apparatus including leads-cum-posts serving both as leads for passing a current to a heater for heating a substrate and as posts for supporting the heater. By this arrangement, heat transferred from the heater to a bearing disposed in the vicinity of the heater is minimized in amount, thereby prolonging the service life of the holder and minimizing a heat loss thereof.
    Type: Grant
    Filed: February 27, 1985
    Date of Patent: April 8, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Kazumasa Fujioka, Sumio Okuno, Muneo Mizumoto, Hideaki Kamohara, Shinjiro Ueda, Takao Kuroda, Sumio Yamaguchi, Naoyuki Tamura
  • Patent number: 4564766
    Abstract: A method for driving a solid state image pickup device is provided in which charges stored in a group of photoelectric conversion elements of odd rows are first discharged or read out, and then charges stored in a group of photoelectric conversion elements of even rows are read out or discharged, thereafter, the charges stored in the group of photoelectric conversion elements of even rows are first discharged or read out and then charges stored in the group of photoelectric conversion elements of odd rows and read out or discharged.
    Type: Grant
    Filed: February 14, 1985
    Date of Patent: January 14, 1986
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takao Kuroda, Kenju Horii
  • Patent number: 4563764
    Abstract: Disclosed is a semiconductor laser device having at least an optical confinement region which includes a first semiconductor layer, and second and third semiconductor layers holding the first semiconductor layer therebetween and having a greater band gap and a lower refractive index than those of the first semiconductor layer, the second and third semiconductor layers having conductivity types opposite to each other; characterized in that the relationship between a donor density (N.sub.D .times.10.sup.17 cm.sup.-3) of the n-conductivity type semiconductor layer in the second and third semiconductor layers and a proportion (.GAMMA..sub.n %) of an optical output existing in the n-conductivity type semiconductor layer relative to a total optical output of the laser is set at N.sub.D .times..GAMMA..sub.n .gtoreq.500. Noise characteristics are sharply improved.
    Type: Grant
    Filed: September 13, 1983
    Date of Patent: January 7, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kuroda, Takashi Kajimura, Yasutoshi Kashiwada, Naoki Chinone, Hirobumi Ouchi, Tsukuru Ohtoshi
  • Patent number: 4509173
    Abstract: A semiconductor laser device is provided with a semiconductor substrate and at least a semiconductor assembly for optical confinement formed on the substrate which includes an active layer and cladding layers. A first electrode is disposed on the semiconductor assembly and a second electrode is disposed on the semiconductor substrate. To provide a phase-locked semiconductor laser device of high quality, a plurality of regions are provided in the semiconductor assembly which, in effect, cause a variation of a complex refractive index for a laser beam in a direction intersecting with a traveling direction of the laser beam. These regions can be discretely disposed over or under the active layer and give rise to a nonlinear interaction between adjacent laser emission regions formed by the plurality of regions.
    Type: Grant
    Filed: April 7, 1982
    Date of Patent: April 2, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Jun-ichi Umeda, Hisao Nakashima, Takashi Kajimura, Takao Kuroda