Patents by Inventor Takao Nakamura

Takao Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100078648
    Abstract: A gallium nitride-based epitaxial wafer for a nitride light-emitting device comprises a gallium nitride substrate having a primary surface, a gallium nitride-based semiconductor film provided on the primary surface of the gallium nitride substrate, and, an active layer provided on the gallium nitride-based semiconductor film, the active layer having a quantum well structure. The active layer includes a well layer of a gallium nitride-based semiconductor. The gallium nitride-based semiconductor contains indium as a Group III element. A normal line of the primary surface and a C-axis of the gallium nitride substrate form an off angle with each other. The off angle is distributed on the primary surface, and the off angle monotonically increases on the line that extends from one point to another point through a center point of the primary surface of the gallium nitride substrate.
    Type: Application
    Filed: September 23, 2009
    Publication date: April 1, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke YOSHIZUMI, Masaki UENO, Takao NAKAMURA
  • Patent number: 7687822
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: March 30, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Publication number: 20100055820
    Abstract: In step S106, an InXGa1-XN well layer is grown on a semipolar main surface between times t4 and t5 while a temperature in a growth furnace is maintained at temperature TW. In step S107, immediately after completion of the growth of the well layer, the growth of a protective layer covering the main surface of the well layer is initiated at temperature TW. The protective layer is composed of a gallium nitride-based semiconductor with a band gap energy that is higher than that of the well layer and equal to or less than that of a barrier layer. In step S108, the temperature in the furnace is changed from temperatures TW to TB before the barrier layer growth. The barrier layer composed of the gallium nitride-based semiconductor is grown on the protective layer between times t8 and t9 while the temperature in the furnace is maintained at temperature TB.
    Type: Application
    Filed: August 12, 2009
    Publication date: March 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
  • Patent number: 7672474
    Abstract: A digital watermark embedding apparatus of the present invention includes: a block dividing unit for dividing an input image into plural pixel blocks; a digital watermark information spreading unit for obtaining an embedding series having a length corresponding to a number of divided pixel blocks; a block-by-block embedding unit for selecting at least a frequency from predetermined plural frequencies according to a term value of the embedding series corresponding to a position of a pixel block in the image, amplifying amplitude of a waveform pattern corresponding to the selected frequency with an embedding strength value, and superimposing the waveform pattern in which the amplitude is amplified on the pixel block; and an image outputting unit for outputting an image on which a corresponding waveform pattern is superimposed on each pixel block by the block-by-block embedding unit.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: March 2, 2010
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takao Nakamura, Atushi Katayama, Masashi Yamamuro
  • Publication number: 20100047933
    Abstract: A substrate inspection method allowing inspection of all a plurality of substrates each provided at its surface with a plurality of layers by determining quality of the plurality of layers as well as methods of manufacturing the substrate and an element using the substrate inspection method are provided. The substrate inspection method includes a step of preparing the substrate provided at its main surface with the plurality of layers, a film forming step, a local etching step, and an inspection step or a composition analysis step. In the step, a concavity is formed in a region provided with an epitaxial layer of the main surface of the substrate by removing at least partially the epitaxial layer. In the inspection step, the inspection is performed on the layer exposed in the concavity.
    Type: Application
    Filed: October 29, 2009
    Publication date: February 25, 2010
    Inventors: Takao NAKAMURA, Toshio Ueda, Takashi Kyono
  • Patent number: 7640431
    Abstract: A method for embedding digital watermark data in digital data contents includes the steps of obtaining a frequency coefficient of block data of digital data contents, obtaining a complexity of the block data, obtaining an amount of transformation of the frequency coefficient from the complexity and the digital watermark data, and embedding the digital watermark data by transforming the frequency coefficient. In addition, a method for reading digital watermark data includes the steps of calculating a probability of reading ‘1’ or ‘0’ in a read bit sequence by using a test method on the basis of binary distribution, determining the presence or absence of digital watermark data according to the probability, and reconstituting digital watermark data. Another method includes the steps of performing soft decision in code theory by assigning weights to the digital watermark sequence with a weighting function, and reconstituting digital watermark data.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: December 29, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroshi Ogawa, Takao Nakamura, Atsuki Tomioka, Youichi Takashima
  • Publication number: 20090197399
    Abstract: Provided are a method of growing a group III-V compound semiconductor, and method of manufacturing a light-emitting device and an electron device, in which risks are reduced and nitrogen can be efficiently supplied at low temperatures. The method of growing a group III-V compound semiconductor includes the following processes. First, gas containing at least one selected from the group consisting of monomethylamine and monoethylamine is prepared as a nitrogen raw material. Then, the group III-V compound semiconductor is grown using the gas by vapor phase growth.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takao Nakamura, Masaki Ueno, Toshio Ueda, Eiryo Takasuka, Yasuhiko Senda
  • Patent number: 7555195
    Abstract: Content data and metadata are obtained and reproduced, and combination interface information defining information necessary for executing combination operation on the contents is generated. The combination operation on the contents is controlled by following combination data definition based on the combination interface information and, as necessary, by using external input information entered from an external unit. The combination feedback information for controlling the reproduction operation of the contents and metadata is generated, and the reproduction operation on the contents is controlled based on the combination feedback information.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: June 30, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroyuki Yamashita, Hiroshi Fujii, Hideki Sakamoto, Takao Nakamura
  • Publication number: 20090080447
    Abstract: An IP address and a MAC address of each of communication devices connected to a plurality of communication ports provided in a switching hub device are associated in an ARP table. Also, priority information representing the communication priority of each communication device is received, and the received priority information is associated with the MAC address of the communication device. When no IP address of a transmission source included in a data packet received at each communication port exists in the ARP table, the IP address and the MAC address of the transmission source are added to the ARP table and priority information is attached to the ARP table.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Inventors: Seigo SAWADA, Takumi Iwai, Yoshinari Oshio, Takao Nakamura, Tsuneyuki Takai
  • Patent number: 7508011
    Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGAN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: March 24, 2009
    Assignees: Sumitomo Electric Industries, Ltd., Riken
    Inventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama
  • Publication number: 20090074242
    Abstract: A digital watermark embedding apparatus for embedding embedding information, as digital watermark, into an input signal having dimensions equal to or greater than N (N is an integer equal to or greater than 2) and a digital watermark detection apparatus for detecting the digital watermark are disclosed. The digital watermark embedding apparatus generates an embedding sequence based on embedding information, generates a N?1-dimensional pattern based on the embedding sequence, generates N-dimensional embedding pattern by modulating a periodic signal according to a value on the N?1-dimensional pattern, and superimposing the embedding pattern in the input signal and outputs it.
    Type: Application
    Filed: March 1, 2007
    Publication date: March 19, 2009
    Applicant: Nippon Telegraph and Telephone Corp.
    Inventors: Susumu Yamamoto, Takao Nakamura
  • Patent number: 7489796
    Abstract: A digital watermark embedding apparatus for embedding digital watermark information by superimposing macroblock patterns on an image is disclosed. The digital watermark embedding apparatus: spreads input digital watermark information to obtain an embedding series having a length corresponding to a number of pixel blocks of a macroblock pattern; selects at least a frequency from among predetermined plural frequencies according to a term value of the embedding series corresponding to a position of a pixel block in the macroblock pattern, and sets a waveform pattern corresponding to the selected frequency as a pixel of the pixel block; and amplifies, with an embedding strength value, the macroblock pattern on which a waveform pattern is superimposed on each pixel block by the waveform pattern setting unit, and superimposes the macroblock pattern on an input image like a tile.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: February 10, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takao Nakamura, Atushi Katayama, Masashi Yamamuro
  • Patent number: 7482934
    Abstract: A communication device includes a radio frequency identification tag that performs a radio communication with a predetermined device. A first metal body has an electrical conductivity. A space adjustment unit is configured to adjust a space between the first metal body and the radio frequency identification tag. The first metal body is configured to be replaced with a second metal body, and when the first metal body is replaced with the second metal body, the space adjustment unit is configured to adjust a space between the second metal body and the radio frequency identification tag.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: January 27, 2009
    Assignee: Fujitsu Limited
    Inventors: Norihiro Nakamura, Hirotaka Nishida, Naohiro Hirota, Haruo Obana, Ichirou Ono, Takeshi Miki, Takao Nakamura, Hideshi Numata
  • Publication number: 20090017468
    Abstract: The present invention provides a therapeutic agent for diabetes comprising a compound directly activating glycogen synthase as an active ingredient. The present invention further provides a method for screening compounds directly activating glycogen synthase.
    Type: Application
    Filed: June 21, 2005
    Publication date: January 15, 2009
    Inventors: Akito Kadontani, Yasufumi Nagata, Takao Nakamura, Maho Suzuki, Junichi Eiki
  • Publication number: 20080210959
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Application
    Filed: March 27, 2007
    Publication date: September 4, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Patent number: 7388228
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: June 17, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Publication number: 20080137903
    Abstract: A digital watermark embedding apparatus of the present invention includes: a block dividing unit for dividing an input image into plural pixel blocks; a digital watermark information spreading unit for obtaining an embedding series having a length corresponding to a number of divided pixel blocks; a block-by-block embedding unit for selecting at least a frequency from predetermined plural frequencies according to a term value of the embedding series corresponding to a position of a pixel block in the image, amplifying amplitude of a waveform pattern corresponding to the selected frequency with an embedding strength value, and superimposing the waveform pattern in which the amplitude is amplified on the pixel block; and an image outputting unit for outputting an image on which a corresponding waveform pattern is superimposed on each pixel block by the block-by-block embedding unit.
    Type: Application
    Filed: January 31, 2005
    Publication date: June 12, 2008
    Applicant: Kyowa Hakko Kogyo Co., Ltd.
    Inventors: Takao Nakamura, Atushi Katayama, Masashi Yamamuro
  • Patent number: 7374895
    Abstract: A full-length cDNA encoding a human-derived G protein-coupled receptor protein is isolated by screening a human hippocampus library. Also, a rat-derived cDNA corresponding to the human-derived cDNA is isolated. Proteins encoded by these cDNAs have an activity of lowering intracellular cAMP concentration under stimulation with histamine. These proteins are usable as tools in screening ligands thereof or in screening candidate compounds for drugs capable of regulating signal transduction from the above proteins.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: May 20, 2008
    Assignee: Banyu Pharmaceutical Co., Ltd.
    Inventors: Hiraku Itadani, Tetsuo Takimura, Takao Nakamura, Masahiko Kobayashi, Ken-Ichi Tanaka, Yusuke Hidaka, Masataka Ohta
  • Publication number: 20080089552
    Abstract: A digital watermark embedding method of the present invention includes: a step of sequentially obtaining each frame image of the moving image data and frame display time; a step of generating a watermark pattern using watermark information, the frame display time and watermark pattern switching information; a step of superimposing the watermark pattern onto the frame image, and combining watermark embedded frame images obtained by sequentially repeating the processes to generate watermark embedded moving image data. A digital watermark detection method includes a step of sequentially obtaining a frame image; a step of generating a difference image between the currently obtained frame image and a previously obtained frame image; and a step of performing digital watermark detection from the difference image to output digital watermark detection status, and when digital watermark detection process is continued, obtaining a new frame again to repeat the above processes.
    Type: Application
    Filed: July 31, 2006
    Publication date: April 17, 2008
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takao Nakamura, Susumu Yamamoto, Ryo Kitahara, Takashi Miyatake, Atushi Katayama, Hisato Miyachi
  • Publication number: 20080076199
    Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGAN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.
    Type: Application
    Filed: November 9, 2007
    Publication date: March 27, 2008
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., RIKEN
    Inventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama