Patents by Inventor Takashi Inoue

Takashi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8524339
    Abstract: A container-enclosed fullerene, a method of manufacturing the same, and a method of storing fullerene are provided, that make it possible to inhibit alteration of fullerene, especially that make it possible to prevent degradation of the solubility to solvent. A container-enclosed fullerene includes fullerene hermetically enclosed in a container with a high degree of vacuum. The internal pressure of the container is preferably 10 Pa or lower. The fullerene is preferably a metal encapsulated fullerene. The container-enclosed fullerene is manufactured by filling fullerene in a container, evacuating the container, and thereafter sealing the container.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: September 3, 2013
    Assignee: Toyo Tanso Co., Ltd.
    Inventors: Takashi Inoue, Yuji Takimoto
  • Publication number: 20130222607
    Abstract: An object of the present invention is to simplify a calibration operation of a camera and to shorten a time necessary for calibration. A camera calibration device 10 is mounted on a predetermined position of a movable object 100 and includes a camera 11 configured to take an image including an index 41 provided outside the movable object 100, an image superimposing unit 122 configured to generate a superimposed image by superimposing a calibration object 42 having a position adjustment part and a rotation adjustment part on the image taken by the camera 11, and a calculation unit 124 configured to calculate, based on a position of the calibration object 42 after being shifted in the superimposed image such that an end or a center of the index 41 meets the position adjustment part and a part of the index other than the end or the center overlaps the rotation adjustment part, parameters relative to a pan angle, a tilt angle and a roll angle for calibration of the camera mounting position.
    Type: Application
    Filed: July 6, 2012
    Publication date: August 29, 2013
    Applicant: KYOCERA CORPORATION
    Inventors: Takeo OSHIMA, Takashi MAEKAWA, Ryuuichi SAWADA, Haruo YANAGISAWA, Chinatsu SAKURAI, Akinori IWABUCHI, Shinya TAMIZU, Takashi INOUE
  • Publication number: 20130201706
    Abstract: A circuit module includes: a lighting control circuit that controls lighting of a semiconductor light emitting element; a first heat radiating member on which the lighting control circuit is mounted; a second heat radiating member that is separated from the first heat radiating member and has a surface on which the semiconductor light emitting element is mounted; and a connecting mechanism having both a housing that connects the first heat radiating member and the second heat radiating member together and a conductive portion that transmits a signal from the lighting control circuit to the semiconductor light emitting element. The housing is formed of a material having a coefficient of thermal conductivity lower than those of the first heat radiating member and the second heat radiating member.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 8, 2013
    Applicant: Koito Manufacturing Co., Ltd.
    Inventors: Tetsuya SUZUKI, Akihiro MATSUMOTO, Tomoyuki NAKAGAWA, Naoki SONE, Takashi INOUE
  • Publication number: 20130193457
    Abstract: According to one embodiment, a light-emitting circuit includes: a plurality of substrates in which wiring pattern layers are formed, the substrates including light-emitting elements connected to and mounted on the wiring pattern layers; and a linear conductor having electric conductivity, the linear conductor including linear joining sections at both ends electrically connected to the wiring pattern layers of the substrates and a convex section formed to be bent in a convex shape in an intermediate section between the joining sections, and the joining sections being respectively joined to the wiring pattern layers among the plurality of substrates adjacent to one another.
    Type: Application
    Filed: September 11, 2012
    Publication date: August 1, 2013
    Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION
    Inventors: Susumu SHIMASAKI, Takashi OKU, Junichi ISHIGURO, Kenichi ASAMI, Takashi INOUE
  • Patent number: 8482829
    Abstract: A laser processing apparatus 1 includes a laser light source 10, a phase modulation type spatial light modulator 20, a driving unit 21, a control unit 22, and an imaging optical system 30. The imaging optical system 30 may be a telecentric optical system. A storage unit 21A included in the driving unit stores a plurality of basic holograms corresponding to a plurality of basic processing patterns and a focusing hologram corresponding to a Fresnel lens pattern. The control unit 22 arranges in parallel two or more basic holograms selected from the plurality of basic holograms stored in the storage unit 21A, overlaps the focusing hologram with each of the basic holograms arranged in parallel to form the whole hologram, and presents the formed whole hologram to the spatial light modulator 20.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: July 9, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Yuu Takiguchi, Naoya Matsumoto, Norihiro Fukuchi, Takashi Inoue, Tamiki Takemori, Naohisa Mukozaka
  • Publication number: 20130171018
    Abstract: A screw compressor includes a casing having low and high pressure spaces, a screw rotor inserted in a cylinder part of the casing, and a slide valve disclosed in the cylinder part. The screw rotor has a plurality of helical grooves forming a compression chamber. The slide valve is moveable along an axis of the screw rotor and faces an outer periphery of the screw rotor to form a discharge port to communicating the compression chamber with the high pressure space. Fluid in the low pressure space is sucked into the compression chamber, compressed, and then discharged to the high-pressure space when the screw rotor rotates. The slide valve includes a sealing projection located on a back surface of the slide valve opposite to the screw rotor, and separating the low and high pressure spaces from each other when the sealing projection is in slidable contact with the casing.
    Type: Application
    Filed: September 29, 2011
    Publication date: July 4, 2013
    Inventors: Takashi Inoue, Masanori Masuda, Hiromichi Ueno, Mohammod Anwar Hossain, Akira Matsuoka
  • Patent number: 8465189
    Abstract: A vehicular headlamp, wherein a light source unit for light distribution formation is accommodated inside a lamp chamber defined by a lamp body and a front cover, includes a metal heat transfer member that serves as a light source unit structural member; a light-emitting element that serves as a light source; a fan for cooling the light-emitting element provided inside the lamp chamber; and a lighting circuit that controls lighting of the light-emitting element. The light-emitting element, the fan, and the lighting circuit are each attached to the metal heat transfer member.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: June 18, 2013
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Takashi Inoue, Takanori Namba
  • Patent number: 8466495
    Abstract: Disclosed is an HJFET 110 which comprises: a channel layer 12 composed of InyGa1-yN (0?y?1); a carrier supply layer 13 composed of AlxGa1-xN (0?x?1), the carrier supply layer 13 being provided over the channel layer 12 and including at least one p-type layer; and a source electrode 15S, a drain electrode 15D and a gate electrode 17 which are disposed facing the channel layer 12 through the p-type layer, and provided over the carrier supply layer 13. The following relational expression is satisfied: 5.6×1011x<NA×?×t [cm?2]<5.6×1013x, where x denotes an Al compositional ratio of said carrier supply layer, t denotes a thickness of said p-type layer, NA denotes an impurity concentration, and ? denotes an activation ratio.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: June 18, 2013
    Assignee: NEC Corporation
    Inventors: Yuji Ando, Hironobu Miyamoto, Tatsuo Nakayama, Yasuhiro Okamoto, Takashi Inoue, Yasuhiro Murase, Kazuki Ota, Akio Wakejima, Naotaka Kuroda
  • Publication number: 20130145507
    Abstract: In a near-field scanning microscope using an aperture probe, the upper limit of the aperture formation is at most several ten nm in practice. In a near-field scanning microscope using a scatter probe, the resolution ability is limited to at most several ten nm because of the external illuminating light serving as background noise. Moreover, measurement reproducibility is seriously lowered by a damage or abrasion of a probe. Optical data and unevenness data of the surface of a sample can be measured at a nm-order resolution ability and a high reproducibility while damaging neither the probe nor the sample by fabricating a plasmon-enhanced near-field probe having a nm-order optical resolution ability by combining a nm-order cylindrical structure with nm-order microparticles and repeatedly moving the probe toward the sample and away therefrom at a low contact force at individual measurement points on the sample.
    Type: Application
    Filed: August 15, 2012
    Publication date: June 6, 2013
    Inventors: Toshihiko NAKATA, Masahiro WATANABE, Takashi INOUE, Kishio HIDAKA, Motoyuki HIROOKA
  • Publication number: 20130140859
    Abstract: A vehicle seat includes: a seat back frame that is provided with a pair of side frame portions that are located on both left and right sides in the seat transverse direction; an outer-side load transmitting block that is located further to an outer side in the transverse direction of the seat back frame than the side frame portion of the seat back frame, and that transmits an impact load that is input from a side of the vehicle body to the seat back frame; a protruding portion that protrudes from a side surface of the side frame portion on the outer side in the transverse direction of the seat back frame towards the outer side in the transverse direction of the seat back frame; a side airbag apparatus that is located on a front surface of the protruding portion; and an engaging portion that is formed in the outer-side load transmitting block, and that receives the protruding portion.
    Type: Application
    Filed: June 3, 2011
    Publication date: June 6, 2013
    Applicants: TACHI-S CO., LTD., HONDA MOTOR CO., LTD.
    Inventors: Jogen Yamaki, Hisato Oku, Takashi Inoue, Takuya Hori, Masato Miyaguchi, Kazuyoshi Arata
  • Patent number: 8458644
    Abstract: An RF circuit on a circuit simulator to be used in a microwave or millimeter wave range or a high-frequency range includes a function for being inserted by a first port and a second port thereof in a circuit to be observed, at an arbitrary cross-sectional point of the circuit, and evaluating a reflection coefficient (or a characteristic impedance) in the cross-section. The insertion loss between the first port and the second port is zero or approximately zero and is ignorable also for any finite system impedance other than zero.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: June 4, 2013
    Assignee: NEC Corporation
    Inventor: Takashi Inoue
  • Publication number: 20130134892
    Abstract: An insulated power supply device includes: an electric power conversion unit, a rectifier, a filter, a detection unit, a control circuit, and a signal transmission unit. The control circuit generates and outputs a control signal for a switching element that controls a current to be flown through a primary side of the electric power conversion unit. The signal transmission unit transmits, to the control circuit, a detection signal by the detection unit for detecting an output current or an output voltage. An output control pulse signal having control information in a duty ratio can be supplied as an outputted control signal individually to both of the control circuit and a secondary side of the electric power conversion unit. The output current or the output voltage can be thereby controlled.
    Type: Application
    Filed: July 26, 2011
    Publication date: May 30, 2013
    Inventors: Minoru Kado, Satoshi Arima, Takashi Inoue
  • Patent number: 8444936
    Abstract: There is provided a highly reliable autoanalyzer less liable to sample and reagent carry-over and capable of preventing contamination and precisely pipetting samples and reagents. Using a sample pipetting nozzle 27 having water-repellent surfaces, a sample is pipetted from a sample cell 25 to a reaction cell 4 having a hydrophilic bottom face.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: May 21, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Shinichi Taniguchi, Akihiro Nojima, Takashi Inoue, Hiroaki Ishizawa
  • Patent number: 8441709
    Abstract: A light control device 1 includes a light source 10, a prism 20, a spatial light modulator 30, a drive unit 31, a control unit 32, a lens 41, an aperture 42, and a lens 43. The spatial light modulator 30 is a phase modulating spatial light modulator, includes a plurality of two-dimensionally arrayed pixels, is capable of phase modulation in each of these pixels in a range of 4? or more, and presents a phase pattern to modulate the phase of light in each of the pixels. This phase pattern is produced by superimposing a blazed grating pattern for light diffraction and a phase pattern having a predetermined phase modulation distribution, and with a phase modulation range of 2? or more.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: May 14, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Naoya Matsumoto, Taro Ando, Takashi Inoue, Yoshiyuki Ohtake
  • Publication number: 20130113028
    Abstract: A semiconductor device comprises a substrate 1, a first n-type semiconductor layer 21?, a second n-type semiconductor layer 23, a p-type semiconductor layer 24, and a third n-type semiconductor layer 25?, wherein the first n-type semiconductor layer 21?, the second n-type semiconductor layer 23, the p-type semiconductor layer 24, and the third n-type semiconductor layer 25? are laminated at the upper side of the substrate 1 in this order. The drain electrode 13 is in ohmic-contact with the first n-type semiconductor layer 21? and the source electrode 12 is in ohmic-contact with the third n-type semiconductor layer 25?.
    Type: Application
    Filed: June 23, 2010
    Publication date: May 9, 2013
    Applicant: NEC CORPORATION
    Inventors: Hironobu MIYAMOTO, Yasuhiro OKAMOTO, Yuji ANDO, Tatsuo NAKAYAMA, Takashi INOUE, Kazuki OTA, Kazuomi ENDO
  • Publication number: 20130105811
    Abstract: The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer 112, a channel layer 113, a barrier layer 114, and a spacer layer 115 is formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer 112, the channel layer 113 having a compressive strain, and the barrier layer 114 having a tensile strain, and the spacer layer 115 having a compressive strain are laminated on a substrate 100 in this order. The gate insulating film 14 is arranged on the spacer layer 115. The gate electrode 15 is arranged on the gate insulating film 14. The source electrode 161 and the drain electrode 162 are electrically connected to the channel layer 113 directly or via another component.
    Type: Application
    Filed: December 15, 2010
    Publication date: May 2, 2013
    Applicant: NEC CORPORATION
    Inventors: Yuji Ando, Takashi Inoue, Kazuki Ota, Yasuhiro Okamoto, Tatsuo Nakayama, Kazuomi Endo
  • Publication number: 20130099245
    Abstract: The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer 112, a channel layer 113, a barrier layer 114, and a spacer layer 115 is formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer 112, the lattice-relaxed channel layer 113, and the barrier layer 114 having a tensile strain, and the spacer layer 115 are laminated on a substrate 100 in this order. The gate insulating film 14 is arranged on the spacer layer 115. The gate electrode 15 is arranged on the gate insulating film 14. The source electrode 161 and the drain electrode 162 are electrically connected to the channel layer 113 directly or via another component.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 25, 2013
    Applicant: NEC CORPORATION
    Inventors: Yuji Ando, Takashi Inoue, Kazuki Ota, Yasuhiro Okamoto, Tatsuo Nakayama, Kazuomi Endo
  • Publication number: 20130098280
    Abstract: A sewing machine auxiliary storage compartment is provided that can be attached to or detached from a sewing machine body part and that allows small articles such as accessories to be taken out therefrom or put thereinto even during sewing. Upper and lower parts are attached slidably with respect to each other. The upper part 11 is provided with an attachment part 116 that can be attached to the sewing machine body part by its one end. The lower part 12 is attached to the upper part 11 slidably in a direction crossing a workpiece feeding direction when the upper part 11 and the sewing machine body part are attached together. A storage part 122 for storing accessories is provided in the lower part 12, which is located on the opposite side to the one end.
    Type: Application
    Filed: August 13, 2012
    Publication date: April 25, 2013
    Applicant: JAGUAR INTERNATIONAL CORPORATION
    Inventor: Takashi Inoue
  • Patent number: 8426895
    Abstract: A semiconductor device capable of suppressing the occurrence of a punch-through phenomenon is provided. A first n-type conductive layer (2?) is formed on a substrate (1?). A p-type conductive layer (3?) is formed thereon. A second n-type conductive layer (4?) is formed thereon. On the under surface of the substrate (1?), there is a drain electrode (13?) connected to the first n-type conductive layer (2?). On the upper surface of the substrate (1?), there is a source electrode (11?) in ohmic contact with the second n-type conductive layer (4?), and a gate electrode (12?) in contact with the first n-type conductive layer (2?), p-type conductive layer (3?), the second n-type conductive layer (4?) through an insulation film (21?). The gate electrode (12?) and the source electrode (11?) are alternately arranged. The p-type conductive layer (3?) includes In.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: April 23, 2013
    Assignee: NEC Corporation
    Inventors: Yasuhiro Okamoto, Kazuki Ota, Takashi Inoue, Hironobu Miyamoto, Tatsuo Nakayama, Yuji Ando
  • Patent number: D685792
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Masayuki Nakajima, Takashi Inoue