Patents by Inventor Takashi Inoue

Takashi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8963207
    Abstract: A semiconductor device includes a buffer layer, a channel layer and a barrier layer formed over a substrate, a trench penetrating through the barrier layer to reach the middle of the channel layer, and a gate electrode disposed inside the trench via a gate insulating film. The channel layer contains n-type impurities, and a region of the channel layer positioned on a buffer layer side has an n-type impurity concentration larger than a region of the channel layer positioned on a barrier layer side, and the buffer layer is made of nitride semiconductor having a band gap wider than that of the channel layer. The channel layer is made of GaN and the buffer layer is made of AlGaN. The channel layer has a channel lower layer containing n-type impurities at an intermediate concentration and a main channel layer formed thereon and containing n-type impurities at a low concentration.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: February 24, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Tohru Kawai, Takashi Inoue, Tatsuo Nakayama, Yasuhiro Okamoto, Hironobu Miyamoto
  • Publication number: 20150048419
    Abstract: A semiconductor device has a channel layer formed above a substrate, a barrier layer formed over the channel layer and having a band gap larger than that of the channel layer, a trench passing through the barrier layer as far as a midway of the channel layer, and a gate electrode disposed byway of a gate insulation film in the inside of the trench. Then, the end of the bottom of the trench is in a rounded shape and the gate insulation film in contact with the end of the bottom of the trench is in a rounded shape. By providing the end of the bottom of the trench with a roundness as described above, a thickness of the gate insulation film situated between the end of the bottom of the gate electrode and the end of the bottom of the trench can be decreased. Thus, the channel is formed also at the end of the bottom of the trench to reduce the resistance of the channel.
    Type: Application
    Filed: July 16, 2014
    Publication date: February 19, 2015
    Inventors: Yasuhiro Okamoto, Tatsuo Nakayama, Takashi Inoue
  • Publication number: 20150049376
    Abstract: A beam shaping device includes a first phase modulation unit including a phase-modulation type SLM, and displaying a first phase pattern for modulating a phase of input light, a second phase modulation unit including a phase-modulation type SLM, being optically coupled to the first phase modulation unit, and displaying a second phase pattern for further modulating a phase of light phase-modulated by the first phase modulation unit, and a control unit providing the first and second phase patterns to the first and second phase modulation units, respectively. The first and second phase patterns are phase patterns for approximating an intensity distribution and a phase distribution of light output from the second phase modulation unit, to predetermined distributions.
    Type: Application
    Filed: April 18, 2013
    Publication date: February 19, 2015
    Inventors: Naoya Matsumoto, Takashi Inoue, Yuu Takiguchi
  • Patent number: 8957349
    Abstract: A laser machining device is provided with a laser light source, a spatial light modulator, a driving unit, a control unit, and a condensing optical system. The control unit selects a basic hologram corresponding to each basic machining pattern included in a whole machining pattern in a workpiece from a plurality of basic holograms stored by the storage unit, and determines a display region of the basic hologram in the spatial light modulator so that the deviation of the value of “I?/n” becomes small for the selected respective basic hologram when the intensity of a laser beam input to a display region of the basic hologram in the spatial light modulator is defined as I, the diffraction efficiency of the laser beam in the basic hologram is defined as ?, and the number of condensing points in a basic machining pattern corresponding to the basic hologram is defined as n.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: February 17, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Naoya Matsumoto, Norihiro Fukuchi, Naohisa Mukozaka, Takashi Inoue, Yuu Takiguchi
  • Publication number: 20150041821
    Abstract: An electrode comes in ohmic contact with an AlGaN layer. A semiconductor device SD has a nitride semiconductor layer GN2, and an AlxGa(1?x)N layer AGN (hereinafter referred to as “AlGaN layer AGN), and Al electrodes DE, SE. in the AlGaN layer AGN, 0<X?0.2 is satisfied. Also, both of a concentration of a p-type impurity and a concentration of an n-type impurity in the AlGaN layer AGN are 1×1016 cm?3 or lower. In this example, the p-type impurity is exemplified by, for example, Be, C, and Mg, and the n-type impurity is exemplified by Si, S, and Se. Also, the Al electrodes DE and SE are connected to the AlGaN layer AGN. Because a composition ratio of Al is limited to the above-mentioned range, the Al electrodes DE and SE are brought into ohmic contact with the AlGaN layer AGN.
    Type: Application
    Filed: July 14, 2014
    Publication date: February 12, 2015
    Inventors: Tatsuo Nakayama, Masaaki Kanazawa, Yasuhiro Okamoto, Takashi Inoue, Hironobu Miyamoto, Ryohei Nega
  • Patent number: 8941903
    Abstract: A laser processing apparatus including a laser light source, a phase modulation type spatial light modulator, a driving unit, a control unit, and an imaging optical system. A storage unit that is included in the driving unit stores a plurality of basic holograms corresponding to a plurality of basic processing patterns and a focusing hologram corresponding to a Fresnel lens pattern. The control unit arranges in parallel two or more basic holograms selected from the plurality of basic holograms stored in the storage unit, overlaps the focusing hologram with each of the basic holograms arranged in parallel to form the whole hologram, and presents the formed whole hologram to the spatial light modulator.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: January 27, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Yuu Takiguchi, Naoya Matsumoto, Norihiro Fukuchi, Takashi Inoue, Tamiki Takemori, Naohisa Mukozaka
  • Patent number: 8928038
    Abstract: A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1-zAlzN (0?z?1), a channel layer having a composition of: AlxGa1-xN (0?x?1) or InyGa1-yN (0?y?1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: January 6, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuhiro Okamoto, Yuji Ando, Tatsuo Nakayama, Takashi Inoue, Kazuki Ota
  • Patent number: 8921894
    Abstract: The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer 112, a channel layer 113, a barrier layer 114, and a spacer layer 115 is formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer 112, the channel layer 113 having a compressive strain, and the barrier layer 114 having a tensile strain, and the spacer layer 115 having a compressive strain are laminated on a substrate 100 in this order. The gate insulating film 14 is arranged on the spacer layer 115. The gate electrode 15 is arranged on the gate insulating film 14. The source electrode 161 and the drain electrode 162 are electrically connected to the channel layer 113 directly or via another component.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: December 30, 2014
    Assignee: NEC Corporation
    Inventors: Yuji Ando, Takashi Inoue, Kazuki Ota, Yasuhiro Okamoto, Tatsuo Nakayama, Kazuomi Endo
  • Patent number: 8915120
    Abstract: A vial feed device is equipped with a feed arm, which is positioned between a vial tray and an oven and below either of them and having a feeding housing unit and a cooling housing unit, and a vial up-and-down moving mechanism for placing and removing vials in and from vial tray and oven. Feed arm is rotationally driven by a drive motor to move a feeding housing unit, a cooling housing unit and up-and-down moving mechanism toward vial tray or oven. High-temperature vials in oven are housed in cooling housing unit until cooling time T elapses. After cooling time T elapses, cooling housing unit is moved to a lower part of vial tray by feed arm, to be returned to vial tray by up-and-down moving mechanism.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: December 23, 2014
    Assignee: Shimadzu Corporation
    Inventors: Takashi Inoue, Takeshi Maji, Hirotaka Naganuma, Shinichi Mitsuhashi, Yoshitaka Noda
  • Publication number: 20140367743
    Abstract: In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer).
    Type: Application
    Filed: August 27, 2014
    Publication date: December 18, 2014
    Inventors: Takashi Inoue, Tatsuo Nakayama, Yuji Ando, Yasuhiro Murase, Kazuki Ota, Hironobu Miyamoto, Katsumi Yamanoguchi, Naotaka Kuroda, Akio Wakejima, Yasuhiro Okamoto
  • Patent number: 8911125
    Abstract: A circuit module includes: a lighting control circuit that controls lighting of a semiconductor light emitting element; a first heat radiating member on which the lighting control circuit is mounted; a second heat radiating member that is separated from the first heat radiating member and has a surface on which the semiconductor light emitting element is mounted; and a connecting mechanism having both a housing that connects the first heat radiating member and the second heat radiating member together and a conductive portion that transmits a signal from the lighting control circuit to the semiconductor light emitting element. The housing is formed of a material having a coefficient of thermal conductivity lower than those of the first heat radiating member and the second heat radiating member.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 16, 2014
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Tetsuya Suzuki, Akihiro Matsumoto, Takashi Inoue, Tomoyuki Nakagawa, Naoki Sone
  • Publication number: 20140353720
    Abstract: To provide a semiconductor device having improved characteristics. The semiconductor device has a substrate and thereon a buffer layer, a channel layer, a barrier layer, a trench penetrating therethrough and reaching the inside of the channel layer, a gate electrode placed in the trench via a gate insulating film, and drain and source electrodes on the barrier layer on both sides of the gate electrode. The gate insulating film has a first portion made of a first insulating film and extending from the end portion of the trench to the side of the drain electrode and a second portion made of first and second insulating films and placed on the side of the drain electrode relative to the first portion. The on resistance can be reduced by decreasing the thickness of the first portion at the end portion of the trench on the side of the drain electrode.
    Type: Application
    Filed: May 6, 2014
    Publication date: December 4, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Takashi Inoue, Tatsuo Nakayama, Yasuhiro Okamoto, Hiroshi Kawaguchi, Toshiyuki Takewaki, Nobuhiro Nagura, Takayuki Nagai, Yoshinao Miura, Hironobu Miyamoto
  • Publication number: 20140355075
    Abstract: An image reading device includes an image reading section, an image processing section, and a density reference member. Based on a location of a defect in the image reading section or in the density reference member, the image processing section determines whether or not to at least partially restrict either a read range of the image reading section when the image reading section reads an original document or usage of a result obtained by reading the original document by the image reading section. The image processing section determines whether or not to apply a smoothing process to each density value detected by reading the original document by the image reading section. The determination is made based on a comparison between a normal-value determining threshold and each density value detected by reading the density reference member by the image reading section.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 4, 2014
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventor: Takashi INOUE
  • Publication number: 20140318275
    Abstract: The present invention is an auto-sampler having a casing whose inner space can be hermetically closed, including an opening provided in a wall of the casing and a gas discharger for discharging gas inside the casing through the opening to the outside of the casing.
    Type: Application
    Filed: August 8, 2012
    Publication date: October 30, 2014
    Applicant: SHIMADZU CORPORATION
    Inventors: Takaaki Fujita, Takashi Inoue
  • Patent number: 8867113
    Abstract: A laser processing device includes a laser light source, a spatial light modulator, a control section, and a condensing optical system. The spatial light modulator, presents a hologram for modulating the phase of the laser light in each of a plurality of two-dimensionally arrayed pixels, and outputs the phase-modulated laser light. The control section causes a part of the phase-modulated laser light (incident light) to be condensed at a condensing position in a processing region as a laser light (contribution light) having a constant energy not less than a predetermined threshold X. The control section causes a laser light (unnecessary light) other than the contribution light condensed to the condensing position existing in the processing region to be dispersed and condensed at a condensing position existing in a non-processing region as a plurality of laser lights (non-contribution lights) having an energy less than the predetermined threshold.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: October 21, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Naoya Matsumoto, Takashi Inoue, Norihiro Fukuchi, Haruyasu Ito
  • Patent number: 8864225
    Abstract: Container for accommodating small article(s) comprises: a container body including flange portion wherein connecting slits are formed; and a container lid element including lateral wall region having projected connecting pieces. A trim cover assembly of the seat includes: a peripheral end area or margin defined in a container mounting hole formed in the trim cover assembly; and connecting slits formed in that margin. In assembly, the connecting pieces are inserted through those flanged portion, while simultaneously the margin of trim cover assembly is sandwiched between the flanged portion and lateral wall region. Those free ends are flattened to connecting slits, respectively, so that free ends of the connecting pieces project from the connect together all the container body, container lid element and trim cover assembly. Finally, the trim cover assembly is attached upon a foam padding, with the container body inserted in a recession of the foam padding.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 21, 2014
    Assignee: Tachi-S Co., Ltd.
    Inventors: Takahiko Nagasawa, Takashi Inoue, Atsushi Ishii, Naoyuki Makita
  • Publication number: 20140307299
    Abstract: In the control of light condensing irradiation of laser light using a spatial light modulator, the number of wavelengths, a value of each wavelength, and incident conditions of the laser light are acquired, the number of light condensing points, and a light condensing position, a wavelength, and a light condensing intensity on each light condensing point are set, and a light condensing control pattern is set for each light condensing point. Then, a modulation pattern presented in the spatial light modulator is designed in consideration of the light condensing control pattern. Further, in the design of a modulation pattern, a design method focusing on an effect by a phase value of one pixel is used, and when evaluating a light condensing state, a propagation function to which a phase pattern opposite to the light condensing control pattern is added is used.
    Type: Application
    Filed: October 23, 2012
    Publication date: October 16, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Naoya Matsumoto, Yuu Takiguchi, Taro Ando, Yoshiyuki Ohtake, Takashi Inoue, Tomoko Otsu, Haruyoshi Toyoda
  • Patent number: 8853666
    Abstract: In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer).
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: October 7, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Inoue, Tatsuo Nakayama, Yuji Ando, Yasuhiro Murase, Kazuki Ota, Hironobu Miyamoto, Katsumi Yamanoguchi, Naotaka Kuroda, Akio Wakejima, Yasuhiro Okamoto
  • Publication number: 20140298118
    Abstract: An information processing apparatus according to one aspect of the present disclosure includes a communication control portion, an error code storage portion, an acquiring portion, and a determination portion. Communication control portion communicates with storage device based on interface communication standard, to perform data transfer therewith. Error code storage portion stores one or a plurality of selected error codes selected from a plurality of error codes defined by interface communication standard. Acquiring portion acquires error information outputted from storage device. Determination portion determines whether or not error code indicated by error information coincides with selected error code. When determination portion determines that error code coincides with selected error code, communication control portion communicates again with storage device to perform data transfer therewith.
    Type: Application
    Filed: March 24, 2014
    Publication date: October 2, 2014
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Naruyuki Miyamoto, Tomoyuki Kikuta, Takashi Inoue, Tetsuya Matsusaka
  • Publication number: 20140293388
    Abstract: In the control of light condensing irradiation of laser light using a spatial light modulator, the number of wavelengths, a value of each wavelength, and incident conditions of the laser light are acquired, the number of light condensing points, and a light condensing position, a wavelength, and a light condensing intensity on each light condensing point are set, and a distortion phase pattern provided in an optical system including the spatial light modulator to the laser light is derived. Then, a modulation pattern presented in the spatial light modulator is designed in consideration of the distortion phase pattern. Further, in the design of a modulation pattern, a design method focusing on an effect by a phase value of one pixel is used, and when evaluating a light condensing state, a propagation function to which a distortion phase pattern is added is used.
    Type: Application
    Filed: October 23, 2012
    Publication date: October 2, 2014
    Inventors: Naoya Matsumoto, Yuu Takiguchi, Taro Ando, Yoshiyuki Ohtake, Takashi Inoue, Tomoko Otsu, Haruyoshi Toyoda