Patents by Inventor Takashi Miyoshi

Takashi Miyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8924624
    Abstract: An information processing device includes: a data transferring unit configured to directly transfer data to a first memory area allocated to a virtual machine from an input/output device for controlling a data input/output to/from an external device by mutually translating between an address of the first memory area allocated to the virtual machine and an address of a second memory area that is a real memory of the first memory area; a detecting unit configured to detect the data directly transferred from the input/output device to the first memory area allocated to the virtual machine; a registering unit configured to generate update information about the first memory area changed using the detected data and to store the update information in a first storing unit when the detected data satisfies a predetermined condition; and an outputting unit configured to output the update information.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: December 30, 2014
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Publication number: 20140334246
    Abstract: This gas mixing device includes a main gas flow path, an additive gas flow path, a mixing section, and a flow rate control unit. A pilot type pressure regulating unit configured to regulate pressure of a main gas based on a pressure in the additive gas flow path and a mass flow meter configured to detect the flow rate of the main gas flow path are provided on the main gas flow path. An additive gas flow rate regulator configured to regulate a flow rate of an additive gas is provided on the additive gas flow path. The flow rate control unit controls the flow rate of the additive gas using the additive gas flow rate regulator based on a flow rate of the main gas detected by the mass flow meter.
    Type: Application
    Filed: November 20, 2012
    Publication date: November 13, 2014
    Inventors: Kazuhiko Takamisawa, Takashi Miyoshi
  • Patent number: 8811443
    Abstract: A nitride semiconductor laser diode comprises a substrate; an n-side nitride semiconductor layer containing an n-type impurity and disposed on the substrate; an active layer having a light emitting layer including InxAlyGa1-x-yN (0<x<1, 0?y<1, and 0<x+y<1) and disposed on the n-side nitride semiconductor layer; and a p-side nitride semiconductor layer containing a p-type impurity and disposed on the active layer. The lasing wavelength of the nitride semiconductor laser diode is 500 nm or greater.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: August 19, 2014
    Assignee: Nichia Corporation
    Inventor: Takashi Miyoshi
  • Publication number: 20140218565
    Abstract: An image processing apparatus is configured comprising a necessary/unnecessary determination data generating unit configured to generate necessary/unnecessary determination data; an image encoding unit assigning identification information respectively to, and recording, in a recording unit, each piece of data after division of each moving image of a moving image after encoding, a necessary/unnecessary determining unit configured to determine an unnecessary moving image frame based on necessary/unnecessary determination data; and a moving image file managing unit configured to rewrite information indicating a state of data at a recording unit in the recording unit corresponding to a moving image frame determined as unnecessary moving image frame by the necessary/unnecessary determining unit into information that there is no data.
    Type: Application
    Filed: March 14, 2014
    Publication date: August 7, 2014
    Inventors: Takashi MIYOSHI, Akio KOSAKA, Hidekazu IWAKI, Arata SHINOZAKI, Mitsunori KUBO, Takayuki NAKATOMI, Nobuyuki WATANABE
  • Publication number: 20140215200
    Abstract: A data processing device 1 comprises: first processors (2-i (i=1, 2, . . . , n)) that initialize the data processing device based on boot programs; a chip set (4) that includes first memories (4a-j (j=1, 2, . . . , m)) that store the first boot program (Pj (j=1, 2, . . . , m)) respectively and a memory controller (4b) that reads out the first boot program (Pj (j=1, 2, . . . , m)); second buses (5-i (i=1, 2, . . . , n)) that are arranged between the memory controller (4b) and the first processors (2-i (i=1, 2, . . . , n)) respectively, and do not require initialization based on boot programs before use; and first buses (3-i (i=1, 2, . . . , n)) that are connected with the first processors (2-i (i=1, 2, . . . , n)) and require initialization based on boot programs before use.
    Type: Application
    Filed: January 30, 2014
    Publication date: July 31, 2014
    Applicant: FANUC CORPORATION
    Inventors: Minoru NAKAMURA, Takashi MIYOSHI
  • Patent number: 8793424
    Abstract: A switch apparatus capable of being coupled to a computer and a plurality of devices, the switch apparatus includes: a first bridge coupled to the computer; a second-bridge group coupled to the devices; and a controller for controlling the connection relationship between the first bridge and the second-bridge group, wherein the controller assigns physical identifiers having different bus identifiers to the plurality of devices, assigns logical identifiers to the devices in accordance with an identifier assigned to the first bridge in response to an instruction for reading connection states of the devices received from the computer when the computer is coupled to the first bridge, and converts a physical identifier and a logical identifier of a packet transmitted between the first bridge and the second-bridge group in accordance with the correspondence relationships between the physical identifiers and the logical identifiers.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 29, 2014
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Publication number: 20140161145
    Abstract: A semiconductor laser element includes: a light emitting layer of a nitride semiconductor that is placed above a substrate of GaN and has a refractive index higher than the substrate, wherein the semiconductor laser element further includes the following layers between the substrate and the light emitting layer in an order from the substrate: a first nitride semiconductor layer of AlGaN; a second nitride semiconductor layer of AlGaN having an Al ratio higher than the first nitride semiconductor layer; a third nitride semiconductor layer of an InGaN; and a fourth nitride semiconductor layer of AlGaN having an Al ratio higher than the first nitride semiconductor layer and having a thickness greater than the second nitride semiconductor layer.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 12, 2014
    Applicant: NICHIA CORPORATION
    Inventor: Takashi MIYOSHI
  • Patent number: 8719361
    Abstract: A relay device includes: memories, each memory being operable to store at least a data pair formed of a MAC address and a port number; a search unit to search only amongst ones of the memories having valid data pairs when searching for a port number based upon a MAC address; a data moving unit to move valid data pairs to different locations within the plurality of memories in order to reduce a total number of memories, amongst the plurality thereof, having valid data pairs; and a power supply controller to selectively stop supplying power to ones of the memories storing only invalid data.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: May 6, 2014
    Assignee: Fujitsu Limited
    Inventors: Yasushi Umezawa, Takeshi Shimizu, Takashi Miyoshi
  • Patent number: 8584533
    Abstract: A magnetostrictive torque sensor device which detects a torque applied to a rotary shaft is provided. The magnetostrictive torque sensor device includes a magnetostrictive portion provided on a surface of the rotary shaft, a coil and a cylindrical back-yoke disposed in outer periphery of the coil. The coil includes a bobbin arranged in outer periphery of the magnetostrictive portion, and a wire wound around the bobbin. A slit is provided on the back-yoke.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: November 19, 2013
    Assignee: Honda Motor Co., Ltd.
    Inventors: Takashi Miyoshi, Yoshihiro Oniwa, Yasuo Shimizu, Atsuhiko Yoneda, Yutaka Arimura, Katsuji Watanabe
  • Patent number: 8583848
    Abstract: A switching circuit connected to an I/O device having a plurality of functions, the switching circuit comprising: a processing unit that includes tables, each of which corresponds to one of the function of the I/O device, when the processing unit receives a packet that instructs to add a function to the I/O device, configured to select the table that contains a bus number of a destination of the received packet, and configured to notify a number of the selected table; and a filter configured to change a function number of the destination of the received packet to the number of the table notified from the processing unit.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: November 12, 2013
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Publication number: 20130287055
    Abstract: A nitride semiconductor laser diode comprises a substrate; an n-side nitride semiconductor layer containing an n-type impurity and disposed on the substrate; an active layer having a light emitting layer including InxAlyGa1?x?yN (0<x<1, 0?y<1, and 0<x+y<1) and disposed on the n-side nitride semiconductor layer; and a p-side nitride semiconductor layer containing a p-type impurity and disposed on the active layer. The lasing wavelength of the nitride semiconductor laser diode is 500 nm or greater.
    Type: Application
    Filed: June 25, 2013
    Publication date: October 31, 2013
    Inventor: Takashi MIYOSHI
  • Patent number: 8559430
    Abstract: A network connection device includes a processor and a switch unit. The processor learns an address. The switch unit outputs a packet received from a first port out of a plurality of ports to a second port. The switch unit manages a table including an entry which includes an address, status data, and an identifier of a port. The switch unit generates a first entry including a first address included in a first packet received via a first port, status data indicating “learning”, and an identifier of the first port, in the absence of the first address in the table, and requests the processor to learn the first address. The switch unit withholds requesting the processor to learn a second address included in a second packet received via the first port, when the second address is included in a second entry along with status data indicating “learning”.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: October 15, 2013
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Publication number: 20130246679
    Abstract: An accelerator management device includes an accelerator link DB that stores an accelerator identifier in association with an application identifier. The accelerator management device includes the accelerator mounting information DB that stores the accelerator identifier of an accelerator mounted in a slot in association with each slot identifier used to identify each slot of an expansion I/O box. The accelerator management device specifies an accelerator identifier corresponding to an application by referring to the accelerator link DB when an execution request of an application is received from a host. The accelerator management device specifies a slot identifier corresponding to the specified accelerator identifier by referring to the accelerator mounting information DB. The accelerator management device assigns the slot that is identified through the slot identifier which is specified by the second specifying unit to the host.
    Type: Application
    Filed: December 14, 2012
    Publication date: September 19, 2013
    Inventor: Takashi MIYOSHI
  • Patent number: 8514904
    Abstract: A nitride semiconductor laser diode includes a substrate, an n-side nitride semiconductor layer formed on the substrate, an active layer formed on the n-side nitride semiconductor layer and having a light emitting layer including InxAlyGa1-x-yN (0<x<1, 0 y<1, 0<x+y<1), and a p-side nitride semiconductor layer formed on the active layer.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 20, 2013
    Assignee: Nichia Corporation
    Inventor: Takashi Miyoshi
  • Patent number: 8503442
    Abstract: A transmission information transfer apparatus for realizing the MAC VLAN function with low latency includes: a VLAN table memory that manages a VID and a VLAN membership; a VLAN cache which is a cache memory that manages a VLAN Cache Index and VLAN membership in association with one another; an FDB that manages the VID, DA, and output port information in association with one another and further manages the VID, SA, and VLAN Cache Index in association with one another; an extraction section that extracts the VID, DA, and SA included in an input packet; an FDB search section that acquires output port information associated with the VID and DA, as well as the VLAN Cache Index associated with the VID and SA; a table controller that acquires the VLAN membership associated with the VLAN Cache Index; and an output port determination section that determines an output port of a packet.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: August 6, 2013
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Patent number: 8432910
    Abstract: A transmission information transfer apparatus includes: an FDB that manages IP addresses in association with a plurality of respective input/output sections; an IP packet recognition section that determines whether input transmission information includes an IP address indicating the destination of the input transmission information; an FDB reference section and output port determination section that determine, in the case where the input transmission information includes an IP address, whether the IP address included in the input transmission information and predetermined IP address associated with any one of the plurality of input/output sections different from an input/output section coincides with one another; and an output port determination section that sets, in the case where it has been determined that the IP address included in the input transmission information as the destination of the input transmission information and the predetermined IP address coincides with one another, any one of the pluralit
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: April 30, 2013
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Patent number: 8396067
    Abstract: A switch operating in a multistage switch network is provided. The switch includes a plurality of ports, a first processor for processing a source address and a destination address of a packet received by the plurality of ports, and a second processor for including a memory storing data of the packet, and for outputting, under the control of the first processor, the data of the packet stored on the memory, wherein the first processor calculates a hash value of the source addresses of the packet in accordance with a specific hash function, identifies a output port connected to a switch that corresponds to the hash value and is to learn the source address, and causes the second processor to output the data of the packet to the output port.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: March 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Takashi Miyoshi, Takeshi Shimizu
  • Patent number: 8392645
    Abstract: A switch system has a master sub-switch and a slave sub-switch, the master sub-switch having a first bridge for transmitting the received packet via the first bus, a second bridge for transmitting the packet when the address information of the second bridge matches with the address information included in the packet, and a third bridge for receiving the packet from the first bridge and transmitting the packet to the slave sub-switch, the slave sub-switch having a fourth bridge for receiving the packet from the third bridge and transmitting the packet, and a fifth bridge for receiving the packet from the fourth bridge, and transmitting the packet when the address information of the fifth bridge matches with the address information included in the packet, wherein the master sub-switch has a table including address information of the fifth bridge, and transmits the packet to the fifth bridge in reference to the table.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: March 5, 2013
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Patent number: 8358674
    Abstract: A semiconductor laser element having; a substrate, a semiconductor layer laminated a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer in that order on the substrate, a stripe-like ridge formed on the upper face of the second conductivity type semiconductor layer, a conductive oxide layer formed on the upper face of the ridge, a dielectric layer, with a refractive index that is lower than the refractive index of the semiconductor layer, formed on the side faces of the ridge, and a metal layer formed so as to cover the conductive oxide layer and the dielectric layer, the surface of the conductive oxide layer is exposed from the dielectric layer, and the side faces of the conductive oxide layer are sloped with respect to the upper face of the ridge, and the inclination angle of the side faces of the conductive oxide layer with respect to the normal direction is greater than the inclination angle of the side faces of the ridge with respect to the norm
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: January 22, 2013
    Assignee: Nichia Corporation
    Inventors: Shinya Sonobe, Shingo Masui, Takashi Miyoshi
  • Publication number: 20120320224
    Abstract: An information processing device (first processing device) includes a captured image acquisition section that acquires a captured image from an imaging section (imaging device), a trimming range setting section that sets a trimming range to the captured image acquired by the captured image acquisition section, the trimming range corresponding to an image processing target area that is processed by a server system (second processing device), and a communication section that transmits image information to the server system via a network, the image information being information about an area of the captured image that has been set as the trimming range by the trimming range setting section.
    Type: Application
    Filed: June 7, 2012
    Publication date: December 20, 2012
    Applicant: OLYMPUS CORPORATION
    Inventors: Takashi MIYOSHI, Akio KOSAKA, Hidekazu IWAKI