Patents by Inventor Takashi Nakao

Takashi Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7863166
    Abstract: A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: January 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Suzuki, Hirokazu Ishida, Ichiro Mizushima, Yoshio Ozawa, Fumiki Aiso, Katsuyuki Sekine, Takashi Nakao, Yoshihiko Saito
  • Patent number: 7830758
    Abstract: An optical disk drive includes focusing means, moving means for moving the focusing means in a direction perpendicular to a track direction, light detection means having a first light acceptance section accepting a light beam reflected by one information recording layer and a second light acceptance section accepting stray light reflected by another information recording layer, tracking error signal generating means for generating and correcting the tracking error signal using an output of the second light acceptance section, and tracking control means, wherein the second light acceptance section is composed of a disk inner area and a disk outer area, and where the stray light is accepted without accepting the light beam, and the tracking control means removes an offset caused by the stray light using a difference between the output of the disk inner area and the output of the disk outer area.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: November 9, 2010
    Assignee: Sony Corporation
    Inventor: Takashi Nakao
  • Publication number: 20100214902
    Abstract: An optical pickup includes: a light source outputting a light beam; an objective lens collecting the light beam on a target recording layer as a target of plural recording layers provided in an optical disc; a lens moving unit moving the objective lens in a tracking direction nearly orthogonal to track grooves helically or coaxially formed in the target recording layer; a collective lens collecting a reflected light beam formed when the light beam is reflected by the optical disc; a diffraction optical element diffracting part of the reflected first-order light beam in predetermined directions as first, second, third and fourth beams; and a photodetector receiving the first and second beams using first and second light receiving areas, and generating light reception signals, and receiving the third and fourth beams using third and fourth light receiving areas, and generates light reception signals.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 26, 2010
    Applicant: Sony Corporation
    Inventors: Fumiaki Nakano, Nobuhiko Ando, Noriaki Nishi, Takashi Nakao, Hiroaki Nakagawa, Yutaka Tentaku
  • Publication number: 20100190317
    Abstract: A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidation processing at a first temperature to reform a surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms, and conducting a second oxidation processing at a second temperature which is higher than the first temperature to form a coated silicon oxide film inside the element isolation trenches.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 29, 2010
    Inventors: Kazuaki IWASAWA, Takeshi Hoshi, Keisuke Nakazawa, Shogo Matsuo, Takashi Nakao, Ryu Kato, Tetsuya Kai, Katsuyuki Sekine
  • Patent number: 7762559
    Abstract: A gasket in an integrated double-layered structure comprising an outer layer and an inner layer enclosed by the outer layer, in which the outer layer is a low-hardness rubber layer having a JIS A hardness of 40-70, and the inner layer is a high-hardness rubber layer having a JIS A hardness of 80-100, where a ratio h/h0 of height h of the inner layer to height h0 of the outer layer is preferably 0.3-0.8, and ratio d/d0 of height d of the inner layer to width d0 of the outer layer is preferably 0.5-0.8 in the longitudal cross-section as view from the width direction of the gasket, has a low reaction force, and distinguished sealability and insertibility, and used as inserted between two members, one of which has a groove for insertion.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: July 27, 2010
    Assignee: NOK Corporation
    Inventors: Kiyohiro Suzuki, Manshu Kameike, Shuji Yoshitsune, Takashi Nakao
  • Publication number: 20100171164
    Abstract: A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.
    Type: Application
    Filed: March 17, 2010
    Publication date: July 8, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Ichiro Mizushima, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki, Masahiro Kiyotoshi
  • Publication number: 20100112822
    Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.
    Type: Application
    Filed: September 22, 2009
    Publication date: May 6, 2010
    Inventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
  • Publication number: 20100112791
    Abstract: A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
    Type: Application
    Filed: December 23, 2009
    Publication date: May 6, 2010
    Inventors: Takashi Suzuki, Hirokazu Ishida, Ichiro Mizushima, Yoshio Ozawa, Fumiki Aiso, Katsuyuki Sekine, Takashi Nakao, Yoshihiko Saito
  • Patent number: 7703396
    Abstract: In a curve section, a comb tooth mark 28 is provided concentrically with a center line 44 of a running rail 4. A comb tooth sensor 34 on an overhead running vehicle 2 reads comb teeth 40. Then, corrections are made using the ratio of the radius of curvature (R) of the center line 44 and the radius of curvature (r) of the comb tooth mark 28. An encoder interpolates the areas between the teeth 40. Then, the position of the overhead running vehicle 2 in the curve section is determined. The present invention thus enables the exact position of the overhead running vehicle 2 to be recognized even when the overhead running vehicle 2 is located in a curve section. This makes it possible to provide a load port in a curve section.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: April 27, 2010
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventors: Takashi Nakao, Yoichi Nakamura, Akihiko Ishiura
  • Patent number: 7705515
    Abstract: A surface acoustic wave device utilizing a Rayleigh wave includes a LiNbO3 substrate having Euler angles of (0°±5°, ?±5°, 0°±10°), an electrode which is disposed on the LiNbO3 substrate and which includes an IDT electrode primarily including Cu, a first silicon oxide film disposed in a region other than the region in which the electrode is disposed, the first silicon oxide film having a film thickness substantially equal to the thickness of the electrode, and a second silicon oxide film arranged to cover the electrode and the first silicon oxide film, wherein the film thickness of the electrode is within the range of about 0.12? to about 0.18?, where ? represents the wavelength of a surface acoustic wave, and ? of the above-described Euler angles of (0°±5°, ?±5°, 0°±10°) is in the range satisfying the following Formula (1): ?=32.01?351.92×exp(?TCu/0.0187)??Formula (1) where TCu is a value of Cu electrode film thickness normalized with the wavelength ?.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: April 27, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Nishiyama, Takashi Nakao, Michio Kadota
  • Publication number: 20100078622
    Abstract: A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.
    Type: Application
    Filed: September 4, 2009
    Publication date: April 1, 2010
    Inventors: Yasuhito Yoshimizu, Fumiki Aiso, Atsushi Fukumoto, Takashi Nakao
  • Publication number: 20100078045
    Abstract: An LPCVD apparatus is provided with a processing chamber and a reaction cooling apparatus. The reaction cooling apparatus is placed outside the processing chamber and is configured to generate hydrogen fluoride gas by reaction of hydrogen gas and fluorine gas and to cool the hydrogen fluoride gas. The hydrogen fluoride gas cooled by the reaction cooling apparatus is supplied into the processing chamber as a cleaning gas.
    Type: Application
    Filed: September 10, 2009
    Publication date: April 1, 2010
    Inventors: Kenichiro TORATANI, Fumiki Aiso, Takashi Nakao, Kazuhei Yoshinaga
  • Patent number: 7686932
    Abstract: A gas sensor including: a cylindrical metal shell; a detection element having a detection portion provided on a front end side thereof, the detection element being fixed inside the metal shell while the detection portion of the detection element protrudes from a front end side of the metal shell; and an element protection cap having ventholes, the element protection cap being fixed to the metal shell so that the detection portion of the detection element is covered with the element protection cap. A crimping cylindrical portion is provided which extends to a front end side of the metal shell. A protrusion portion of the element protection cap which abuts a metal ring packing is provided with concave and convex portions outward along an outer circumferential direction. As such, the metal ring packing is deformed so as to be interlocked with the concave and convex portions when the crimping cylindrical portion is compressively deformed.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: March 30, 2010
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hisaharu Nishio, Takashi Nakao, Kazuhiro Kohzaki, Keiichi Adachi
  • Publication number: 20100044970
    Abstract: A gasket in an integrated double-layered structure comprising an outer layer and an inner layer enclosed by the outer layer, in which the outer layer is a low-hardness rubber layer having a JIS A hardness of 40-70, and the inner layer is a high-hardness rubber layer having a JIS A hardness of 80-100, where a ratio h/h0 of height h of the inner layer to height h0 of the outer layer is preferably 0.3-0.8, and ratio d/d0 of height d of the inner layer to width d0 of the outer layer is preferably 0.5-0.8 in the longitudal cross-section as view from the width direction of the gasket, has a low reaction force, and distinguished sealability and insertibility, and used as inserted between two members, one of which has a groove for insertion.
    Type: Application
    Filed: April 13, 2006
    Publication date: February 25, 2010
    Inventors: Kiyohiro Suzuki, Manshu Kameike, Shuji Yoshitsune, Takashi Nakao
  • Publication number: 20100037721
    Abstract: An end effecter is positioned with high precision by stabilizing its attitude. Included are arms each having a pair of rods arranged in parallel, a bracket having the end effecter attached thereto and retained by the pair of rods, ball joints and each including a first joint element having a ball and displaceably connecting the bracket with the arm and a second joint element having a socket for retaining the ball, a connecting member for connecting the pair of parallel rods together and restricting rotation of the rods about an axis that is parallel to the longitudinal direction thereof, and a biasing member for providing a biasing force for retaining the ball in the socket.
    Type: Application
    Filed: September 14, 2007
    Publication date: February 18, 2010
    Inventors: Takashi Nakao, Tatsuhiko Nishida, Hideaki Nakanishi, Daigoro Nakamura
  • Patent number: 7651930
    Abstract: A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: January 26, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Suzuki, Hirokazu Ishida, Ichiro Mizushima, Yoshio Ozawa, Fumiki Aiso, Katsuyuki Sekine, Takashi Nakao, Yoshihiko Saito
  • Publication number: 20100014410
    Abstract: An optical pickup includes: a light source that emits a light beam; an object lens that condenses the light beam on a target recording layer of an optical disk; a lens moving unit; a condensing lens; a hologram element that diffracts, in diffracting a reflected light beam and separating it into reflected zeroth-order and first-order light beams, parts of the reflected first-order light beam in a first direction and sets them as first and second beams, diffracts parts of the reflected first-order light beam in a second direction and sets them as third and fourth beams; and a photodetector that receives the first and second beams and the third and fourth beams and generates light reception signals, and receives interlayer stray light of a part of the light beam reflected by the other recording layers other than the target recording layer and generates a stray light reception signal.
    Type: Application
    Filed: July 13, 2009
    Publication date: January 21, 2010
    Applicant: Sony Corporation
    Inventors: Takashi NAKAO, Fumiaki NAKANO, Noriaki NISHI, Nobuhiko ANDO, Hiroaki NAKAGAWA, Yutaka TENTAKU
  • Patent number: 7649655
    Abstract: An ID tag describing control data on a stopped position for each station 10, movement required for a transfer, and the like is installed in front of the station 10. An overhead vehicle 8 reads the control data and uses it for stoppage and transfer. The overhead vehicle 8 need not store the stoppage or transfer control data for each station 10. Further, the control data can be changed without updating the storage in the overhead vehicle 8.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: January 19, 2010
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventors: Kikuo Hori, Takashi Nakao, Koichiro Oshiumi, Akihiko Ishura
  • Patent number: 7644664
    Abstract: Guide tracks 56, 56 projecting in a vertical direction are provided in a right and left of a running track 50 and left and right guide rollers 20, 21 are provided on a track guided vehicle and guided using inner surfaces of the left and right guide tracks. Branching rollers 22, 23 each comprising elevating and lowering means are provided in the right and left of the track guided vehicle and outside the right and left guide tracks. Thus, branching and rectilinear progression of the track guided vehicle is controlled by switching between a state where the branching rollers 22, 23 are elevated or lowered to guide the track guided vehicle using outer surfaces of the guide tracks 56, 56 and a state where the branching rollers 22, 23 do not contact with the outer surfaces.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: January 12, 2010
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventors: Takashi Nakao, Tamotsu Shiwaku, Yoichi Nakamura, Isao Fukuda, Ryosuke Tahara
  • Publication number: 20090283821
    Abstract: Isolation trenches are formed in the main surface of a semiconductor substrate, and isolation regions. are embedded in these trenches. First insulating films, charge storage layers, a second insulating film, and a control gate are formed on the main surface of the semiconductor substrate sectioned by the isolation regions. Shielding layers are arranged in the isolation regions in such a manner that their bottom portions are lower than the channel regions and their upper portions are higher than at least the main surface of the semiconductor substrate to provide an electric and magnetic shield between their storage layers and channel regions of adjacent memory cells.
    Type: Application
    Filed: May 18, 2009
    Publication date: November 19, 2009
    Inventor: Takashi NAKAO