Patents by Inventor Takashi Ohashi

Takashi Ohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200026224
    Abstract: A transport device includes a first belt member movably stretched, a second belt member, a first roller, a second roller, a third roller, a fourth roller, a fifth roller, and a sixth roller. The second belt member is in contact with the first belt member to form a contact portion in cooperation with the first belt member. The second belt member is movably stretched. The first roller stretches the first belt member and is capable of adjusting a tilt in a longitudinal direction of the first roller. The second roller stretches the second belt member and is capable of adjusting a tilt in a longitudinal direction of the second roller. The third roller stretches the first belt member and is located adjacent to the first roller and upstream of the first roller in a movement direction of the first belt member. The fourth roller stretches the first belt member and is located adjacent to the first roller and downstream of the first roller in the movement direction of the first belt member.
    Type: Application
    Filed: March 7, 2019
    Publication date: January 23, 2020
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Keitaro MORI, Takashi OCHI, Yoshiki SHIMODAIRA, Toshimasa TOYAMA, Masato YAMASHITA, Takashi OHASHI
  • Publication number: 20200015400
    Abstract: ‘Tochigi i37 Go’ is a new variety of strawberry bred by crossbreeding variety ‘Tochigi 32 Go’ and ‘09-48-5’ in 2012. The plant may be used, e.g., for cultivation of fruit for consumption. ‘Tochigi i37 Go’ is a high-quality, high-yielding variety having early maturing and high-yielding characteristic, fruit with a taste similar to those of ‘Tochiotome’, a large fruit size, a firm fruit firmness, and adaptability to forcing culture.
    Type: Application
    Filed: April 5, 2019
    Publication date: January 9, 2020
    Inventors: Kobayashi Yasuhiro, Takashi Shigeno, Takashi Ohashi, Akitsugu Hatakeyama, Kazunari Iimura, Tatsuro Nakanishi, Masaaki Ueki, Akina Toyoda, Asami Nagashima, Yoshinori Saito, Risa Tsurumi, Natsumi Kojima, Yukio Ohashi
  • Patent number: 10522372
    Abstract: A plasma processing device includes a stage, a cluster generation machine, and a plasma generation machine. The stage is disposed in a processing chamber. The stage may support a substrate. The cluster generation machine generates cluster gas by clustering process gas. The plasma generation machine generates plasma of at least one of the process gas and the cluster gas in the processing chamber. The plasma generation machine processes the substrate using the generated plasma.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 31, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takashi Ohashi
  • Patent number: 10438845
    Abstract: A semiconductor device according to the present embodiment is provided with a lower layer. A first film is provided on the lower layer. A first side-wall film covers a contact hole provided in the first film, along a side wall in the contact hole and from a lower end of the contact hole to an upper end of the contact hole. A second side-wall film is provided on the side wall in the contact hole via the first side-wall film, to cover the contact hole from a position higher than a lower end of the first side-wall film to the upper end of the contact hole. A conductor is provided inside the first and second side-wall films in the contact hole. An upper layer is provided on the first film.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: October 8, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takashi Ohashi
  • Publication number: 20190273021
    Abstract: A semiconductor device according to the present embodiment is provided with a lower layer. A first film is provided on the lower layer. A first side-wall film covers a contact hole provided in the first film, along a side wall in the contact hole and from a lower end of the contact hole to an upper end of the contact hole. A second side-wall film is provided on the side wall in the contact hole via the first side-wall film, to cover the contact hole from a position higher than a lower end of the first side-wall film to the upper end of the contact hole. A conductor is provided inside the first and second side-wall films in the contact hole. An upper layer is provided on the first film.
    Type: Application
    Filed: August 17, 2018
    Publication date: September 5, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Takashi OHASHI
  • Publication number: 20190259582
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a treatment chamber configured to treat a substrate with plasma, a first annular coil configured to generate a first magnetic field to be applied to the plasma, and a second annular coil configured to generate a second magnetic field to be applied to the plasma. The apparatus further includes a first electric current supplying module configured to supply, to the first annular coil, a first electric current flowing in a first direction, and cause the first annular coil to generate the first magnetic field. The apparatus further includes a second electric current supplying module configured to supply, to the second annular coil, a second electric current flowing in a second direction that is different from the first direction, and cause the second annular coil to generate the second magnetic field.
    Type: Application
    Filed: July 26, 2018
    Publication date: August 22, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Ryo SUEMITSU, Takashi OHASHI
  • Patent number: 10388662
    Abstract: A manufacturing method of a semiconductor memory device includes disposing a first stacked body on a substrate, forming a first through via hole in the first stacked body, and determining to remove an upper portion of the first stacked body based on a comparison of a determined value of a width of the first through via hole with a reference value. The method further includes forming a second film in the first through via hole responsive to the determination to remove the upper portion of the first stacked body, removing the upper portion of the first stacked body and a portion of the second film, and disposing a second stacked body on the first stacked body and the second film. The method further includes forming a second through via hole to expose at least a portion of the second film, and removing the second film in the first through via hole.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: August 20, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Kazunori Horiguchi, Takashi Ohashi
  • Publication number: 20190080935
    Abstract: A plasma processing device includes a stage, a cluster generation machine, and a plasma generation machine. The stage is disposed in a processing chamber. The stage may support a substrate. The cluster generation machine generates cluster gas by clustering process gas. The plasma generation machine generates plasma of at least one of the process gas and the cluster gas in the processing chamber. The plasma generation machine processes the substrate using the generated plasma.
    Type: Application
    Filed: February 28, 2018
    Publication date: March 14, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Takashi OHASHI
  • Publication number: 20180269223
    Abstract: A manufacturing method of a semiconductor memory device includes disposing a first stacked body on a substrate, forming a first through via hole in the first stacked body, and determining to remove an upper portion of the first stacked body based on a comparison of a determined value of a width of the first through via hole with a reference value. The method further includes forming a second film in the first through via hole responsive to the determination to remove the upper portion of the first stacked body, removing the upper portion of the first stacked body and a portion of the second film, and disposing a second stacked body on the first stacked body and the second film. The method further includes forming a second through via hole to expose at least a portion of the second film, and removing the second film in the first through via hole.
    Type: Application
    Filed: September 5, 2017
    Publication date: September 20, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Kazunori HORIGUCHI, Takashi OHASHI
  • Patent number: 10042292
    Abstract: An image forming apparatus includes a transfer unit and a pair of measuring units. The transfer unit transfers an image onto at least one recording medium by applying a voltage between the at least one recording medium and the image along a thickness direction of the at least one recording medium. Before the transfer unit applies the voltage, the pair of measuring units measure respective electrical resistance values of a front surface and a rear surface of the at least one recording medium in a direction crossing the thickness direction.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: August 7, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Takashi Ochi, Hisashi Murase, Yuki Yokoyama, Takashi Ohashi, Keitaro Mori, Masahiko Fujita
  • Publication number: 20170357193
    Abstract: An image forming apparatus includes a transfer unit and a pair of measuring units. The transfer unit transfers an image onto at least one recording medium by applying a voltage between the at least one recording medium and the image along a thickness direction of the at least one recording medium. Before the transfer unit applies the voltage, the pair of measuring units measure respective electrical resistance values of a front surface and a rear surface of the at least one recording medium in a direction crossing the thickness direction.
    Type: Application
    Filed: November 9, 2016
    Publication date: December 14, 2017
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Takashi OCHI, Hisashi MURASE, Yuki YOKOYAMA, Takashi OHASHI, Keitaro MORI, Masahiko FUJITA
  • Publication number: 20170243777
    Abstract: In one embodiment, a plasma processing apparatus includes an electrostatic chuck configured to hold a substrate. The apparatus further includes a surrounding member holder configured to hold a surrounding member that surrounds an edge portion of the substrate. The apparatus further includes a plasma feeder configured to feed plasma for processing the substrate to a side of a first face of the substrate. The apparatus further includes a gas feeder configured to feed a gas to a space between the edge portion of the substrate and the surrounding member by discharging the gas to a side of a second face of the substrate from a gas hole provided on a side face of the electrostatic chuck or a gas hole provided in the surrounding member.
    Type: Application
    Filed: August 26, 2016
    Publication date: August 24, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi OHASHI, Atsushi KUBOTA
  • Patent number: 9633862
    Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a reactor, a mover, and a controller. The reactor houses an outer edge portion of a semiconductor substrate in inside thereof through a gap portion and scrapes the outer edge portion. The mover moves at least either the semiconductor substrate or end faces of the gap portion in a thickness direction of the semiconductor substrate to change distances in the thickness direction between the semiconductor substrate and the end faces of the gap portion. The controller controls a movement amount in the thickness direction of at least either the semiconductor substrate or the end faces of the gap portion according to a warp amount of the outer edge portion in the thickness direction.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: April 25, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Kubota, Takashi Ohashi
  • Publication number: 20170076980
    Abstract: According to one embodiment, a manufacturing method of a semiconductor device comprises forming a first pattern and a second pattern to be placed apart on a semiconductor substrate; and forming an arch pattern in which the tops of the first pattern and of the second pattern touch by making the first pattern and the second pattern bend in directions in which they face each other.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takuya OHTSUKI, Takashi OHASHI
  • Patent number: 9595472
    Abstract: According to one embodiment, a manufacturing method of a semiconductor device comprises forming a first pattern and a second pattern to be placed apart on a semiconductor substrate; and forming an arch pattern in which the tops of the first pattern and of the second pattern touch by making the first pattern and the second pattern bend in directions in which they face each other.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: March 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuya Ohtsuki, Takashi Ohashi
  • Publication number: 20170062226
    Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a reactor, a mover, and a controller. The reactor houses an outer edge portion of a semiconductor substrate in inside thereof through a gap portion and scrapes the outer edge portion. The mover moves at least either the semiconductor substrate or end faces of the gap portion in a thickness direction of the semiconductor substrate to change distances in the thickness direction between the semiconductor substrate and the end faces of the gap portion. The controller controls a movement amount in the thickness direction of at least either the semiconductor substrate or the end faces of the gap portion according to a warp amount of the outer edge portion in the thickness direction.
    Type: Application
    Filed: February 5, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi KUBOTA, Takashi OHASHI
  • Publication number: 20170010567
    Abstract: A heating device includes a belt member that is rotated, plural heating elements that are arranged in a width direction of the belt member and generate heat so as to heat the belt member, plural resistance elements that have positive temperature coefficients and are connected to the plural heating elements such that each of the plural resistance elements is connected in series with a corresponding one of the plural heating elements, and a base material that includes a heat-conductive metal layer and a pair of heat-resistant metal layers between which the heat-conductive metal layer is interposed and has a surface on which the plural heating elements and the plural resistance elements are disposed. A temperature of the belt member is reduced by an increase in resistances of the plural resistance elements caused by an increase in temperatures of the plural resistance elements.
    Type: Application
    Filed: February 24, 2016
    Publication date: January 12, 2017
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Hiroshi TAMEMASA, Tohru INOUE, Takashi OHASHI, Jumpei AMANO, Kiyoshi KOYANAGI
  • Patent number: 9523950
    Abstract: A heating device includes a belt member that is rotated, plural heating elements that are arranged in a width direction of the belt member and generate heat so as to heat the belt member, plural resistance elements that have positive temperature coefficients and are connected to the plural heating elements such that each of the plural resistance elements is connected in series with a corresponding one of the plural heating elements, and a base material that includes a heat-conductive metal layer and a pair of heat-resistant metal layers between which the heat-conductive metal layer is interposed and has a surface on which the plural heating elements and the plural resistance elements are disposed. A temperature of the belt member is reduced by an increase in resistances of the plural resistance elements caused by an increase in temperatures of the plural resistance elements.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: December 20, 2016
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Hiroshi Tamemasa, Tohru Inoue, Takashi Ohashi, Jumpei Amano, Kiyoshi Koyanagi
  • Patent number: 9480034
    Abstract: A radio communication device includes: a receiver configured to receive first and second compressed data strings obtained by compressing, in a control device, a first data string as an object of radio transmission via a first antenna and a second data string as an object of radio transmission via a second antenna different from the first antenna; and a processor configured to process the first and second compressed data strings, wherein the processor: decompresses the first and second compressed data strings and restores the first and second data strings; measures a first decompression time taken for decompressing the first compressed data string and a second decompression time taken for decompressing the second compressed data string; and synchronizes radio transmission timings of restored first and second data strings based on a difference between the first decompression time and the second decompression time.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: October 25, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Takashi Ohashi
  • Patent number: RE46628
    Abstract: A pattern forming method including: (a) forming a porous layer above an etching target layer; (b) forming an organic material with a transferred pattern on the porous layer; (c) forming, by use of the transferred pattern, a processed pattern in a transfer oxide film that is more resistant to etching than the porous layer; and (d) transferring the processed pattern to the etching target layer by use of the transfer oxide film as a mask.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: December 12, 2017
    Assignee: Toshiba Memory Corporation
    Inventor: Takashi Ohashi