Patents by Inventor Takashi Okawa

Takashi Okawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047213
    Abstract: A method of manufacturing a semiconductor device includes: injecting an inert element or an electron beam into a GaN-based semiconductor substrate; implanting magnesium into the GaN-based semiconductor substrate; and performing a heat treatment after the injecting and the implanting. A first implantation range of inert element or electron beam and a second implantation range of magnesium overlap with each other. A reference depth Dref (nm) calculated using a formula of Dref=D1+140 and a deepest injection depth D1 (nm) in the injecting is deeper than a deepest implantation depth D2 (nm) in the implanting. After the heat treatment, a concentration of magnesium decreases toward a deeper side at a predetermined decrease rate at a position of the reference depth Dref. The predetermined decrease rate is smaller than a decrease rate at which a concentration of magnesium becomes 1/10 per depth of 300 nm.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 8, 2024
    Inventors: Takashi OKAWA, Kenta WATANABE
  • Publication number: 20230379039
    Abstract: A wireless communication apparatus provided with an antenna that transmits and receives signals; a polarization beam combiner that is connected to the antenna and that performs multiplexed transmission of polarized waves; a power combiner that is connected to the antenna, that functions as a combiner when transmitting and that functions as a duplexer when receiving; a switch circuit to which a transmission signal is input during transmission, from which a reception signal is output during reception, and which switches between a first path connecting the polarization beam combiner with the antenna and a second path connecting the power combiner with the antenna; and a processor that switches the switch circuit based on a reception power so as to switch between connection to the first path and the second path.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 23, 2023
    Applicant: NeC Corporation
    Inventor: Takashi OKAWA
  • Publication number: 20220406597
    Abstract: A manufacturing method of a nitride semiconductor device includes: introducing a p type impurity into at least a part of an upper layer portion of a first nitride semiconductor layer to form a p type impurity introduction region; forming a second nitride semiconductor layer from an upper surface of the first nitride semiconductor layer so as to include the p type impurity introduction region; and performing an anneal treatment in a state where the second nitride semiconductor layer is formed on the first nitride semiconductor layer.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 22, 2022
    Inventors: Takashi OKAWA, Kenta WATANABE
  • Publication number: 20220406614
    Abstract: A semiconductor device includes: a compound semiconductor layer having a first compound semiconductor layer and a second compound semiconductor layer having a higher melting point than the first compound semiconductor layer; and an insulation gate on the second compound semiconductor layer. The compound semiconductor layer further includes: a drift region; a source region; and a body region between the drift region and the source region. The insulation gate faces the body region. The body region bridges over both the first compound semiconductor layer and the second compound semiconductor layer.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 22, 2022
    Inventors: KENTA WATANABE, TAKASHI OKAWA
  • Patent number: 11470486
    Abstract: A wireless communication system capable of dealing with weather that changes abruptly and capable of keeping communication quality at a certain standard or higher is provided. The wireless communication system comprises a first base station, and a second base station that performs communication mutually with the first base station. Each of the first base station and the second base station includes a transceiver unit being connected to an antenna for the communication, and a processing unit that controls the transceiver unit for the communication by referring to meteorological data in a place where the base station is located. The processing unit of the first base station, at a predetermined cycle, accumulates a set of meteorological data in a place where the first base station is located, and data on received electric power for the communication by referring to the meteorological data.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: October 11, 2022
    Assignee: NEC CORPORATION
    Inventor: Takashi Okawa
  • Publication number: 20220270882
    Abstract: A switching includes a gallium nitride semiconductor and a gate insulation film. The gate insulation film is made of silicon oxide and disposed above the gallium nitride semiconductor layer. An interface between the gallium nitride insulation film and the gate insulation film is either free of a gallium oxide layer or provided with the gallium oxide layer with a thickness of 1 nanometer or smaller.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 25, 2022
    Inventors: Hidemoto TOMITA, Takashi OKAWA, Toshiyuki KAWAHARAMURA, Li LIU
  • Publication number: 20220271144
    Abstract: A method for manufacturing a nitride semiconductor device includes formation of a gate insulation film above a nitride semiconductor layer. The formation of the gate insulation film includes formation of silicon oxynitride film in contact with a surface of the nitride semiconductor layer. The formation of the silicon oxynitride film includes oxidation of a film source material having both of silicon and nitride in a molecule to form the silicon oxynitride film.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 25, 2022
    Inventors: Takashi OKAWA, Hidemoto TOMITA, Toshiyuki KAWAHARAMURA, Li Liu
  • Publication number: 20220131252
    Abstract: A high-frequency module including a transmission line for a high-frequency signal and a waveguide conversion structure, capable of reducing the size thereof, and a method for manufacturing such a high-frequency module are provided. A high-frequency module includes a core material in which a first dielectric layer is provided between a first conductive layer and a second conductive layer, a laminated filter in which a plurality of core materials and dielectric layers are alternately laminated, and a through hole pierces therethrough from a lowermost conductive layer provided so as to be in contact with the lowermost dielectric layer to the uppermost first conductive layer, a first surface dielectric layer provided above the laminated filter, and a first surface conductive layer provided above the first surface dielectric layer, the first surface conductive layer including a transmission line for a high-frequency signal and a ground GND.
    Type: Application
    Filed: January 9, 2020
    Publication date: April 28, 2022
    Applicant: NEC Corporation
    Inventor: Takashi OKAWA
  • Patent number: 11195906
    Abstract: A semiconductor device includes a semiconductor substrate that includes an element region and a peripheral withstand voltage region. An insulating protection film is provided above the peripheral withstand voltage region. The peripheral withstand voltage region includes a plurality of guard ring regions of p-type in direct contact with the insulating protection film and a drift region of n-type separating the guard ring regions from each other. Each guard ring region includes a guard ring low concentration region being in direct contact with the insulating protection film and a guard ring high concentration region having a p-type impurity concentration equal to or more than ten times as high as that in the corresponding guard ring low concentration region. Each guard ring high concentration region is provided under the corresponding guard ring low concentration region, and separated from the insulating protection film by the corresponding guard ring low concentration region.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: December 7, 2021
    Assignee: Denso Corporation
    Inventor: Takashi Okawa
  • Publication number: 20210168626
    Abstract: A wireless communication system capable of dealing with weather that changes abruptly and capable of keeping communication quality at a certain standard or higher is provided. The wireless communication system comprises a first base station, and a second base station that performs communication mutually with the first base station. Each of the first base station and the second base station includes a transceiver unit being connected to an antenna for the communication, and a processing unit that controls the transceiver unit for the communication by referring to meteorological data in a place where the base station is located. The processing unit of the first base station, at a predetermined cycle, accumulates a set of meteorological data in a place where the first base station is located, and data on received electric power for the communication by referring to the meteorological data.
    Type: Application
    Filed: November 13, 2020
    Publication date: June 3, 2021
    Applicant: NEC CORPORATION
    Inventor: Takashi OKAWA
  • Publication number: 20200127086
    Abstract: A semiconductor device includes a semiconductor substrate that includes an element region and a peripheral withstand voltage region. An insulating protection film is provided above the peripheral withstand voltage region. The peripheral withstand voltage region includes a plurality of guard ring regions of p-type in direct contact with the insulating protection film and a drift region of n-type separating the guard ring regions from each other. Each guard ring region includes a guard ring low concentration region being in direct contact with the insulating protection film and a guard ring high concentration region having a p-type impurity concentration equal to or more than ten times as high as that in the corresponding guard ring low concentration region. Each guard ring high concentration region is provided under the corresponding guard ring low concentration region, and separated from the insulating protection film by the corresponding guard ring low concentration region.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventor: Takashi Okawa
  • Patent number: 10361267
    Abstract: A semiconductor device includes a compound semiconductor substrate including a gate region and an active region, a trench provided in a range between the gate region and the active region, a gate insulating film disposed in the trench, a source electrode, and a drain electrode. The gate region includes a first gate region of a p-type being in contact with the gate insulating film, a second gate region of the p-type having a p-type impurity concentration lower than a p-type impurity concentration of the first gate region, a third gate region of an n-type, and a fourth gate region of the p-type. The active region includes a source region of the n-type being in contact with the gate insulating film, a body region of the p-type facing the second gate region via the gate insulating film, and a drain region of the n-type.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: July 23, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takashi Okawa
  • Patent number: 10312362
    Abstract: A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer, and a second n-type semiconductor layer separated from the first n-type semiconductor layer by the body layer, a gate insulating film that covers a range across the surface of the first n-type semiconductor layer, the surface of the body layer, and the surface of the second n-type semiconductor layer, and a gate electrode that faces the body layer through the gate insulating film. An interface between the first n-type semiconductor layer and the body layer includes an inclined surface. The inclined surface is inclined such that the depth of the body layer increases as a distance from an end of the body layer increases in a horizontal direction. The inclined surface is disposed below the gate electrode.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: June 4, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tetsuya Yamada, Takashi Okawa, Tomohiko Mori, Hiroyuki Ueda
  • Patent number: 10276707
    Abstract: A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer, and a second n-type semiconductor layer separated from the first n-type semiconductor layer by the body layer, a gate insulating film that covers a range across the surface of the first n-type semiconductor layer, the surface of the body layer, and the surface of the second n-type semiconductor layer, and a gate electrode that faces the body layer through the gate insulating film. An interface between the first n-type semiconductor layer and the body layer includes an inclined surface. The inclined surface is inclined such that the depth of the body layer increases as a distance from an end of the body layer increases in a horizontal direction. The inclined surface is disposed below the gate electrode.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: April 30, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tetsuya Yamada, Takashi Okawa, Tomohiko Mori, Hiroyuki Ueda
  • Patent number: 10186591
    Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a p-type semiconductor layer located on the second nitride semiconductor layer; and a gate electrode located on the p-type semiconductor layer. A first interface and a second interface are located in parallel between the gate electrode and the p-type semiconductor layer. The first interface has a first barrier with respect to holes moving in a direction from the p-type semiconductor layer to the gate electrode. The second interface has a second barrier with respect to the holes moving in a direction from the p-type semiconductor layer to the gate electrode. The second barrier is higher than the first barrier.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: January 22, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takashi Okawa
  • Patent number: 10050108
    Abstract: A semiconductor device may include a semiconductor layer, an insulation gate section, and a first conductivity-type semiconductor region; wherein the semiconductor layer may include a vertical drift region being of a second conductivity type and disposed at the one of main surfaces; a body region being of the first conductivity type, adjoining the vertical drift region, and disposed at the one of main surfaces; and a source region being of the second conductivity type, separated from the vertical drift region by the body region, and disposed at the one of main surfaces, wherein the insulation gate section is opposed to a portion of the body region which separates the vertical drift region and the source region; and the first conductivity-type semiconductor region is opposed to at least a part of a portion of the vertical drift region which is disposed at the one of main surfaces.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: August 14, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takashi Okawa
  • Patent number: 10017135
    Abstract: A branching structure for connecting a branch harness to a main line harness, includes connection terminals configured to electrically connect branch lines of the branch harness to main lines of the main line harness respectively, a terminal block on which the connection terminals are supported, and fasteners that respectively fasten the connection terminals onto the terminal block. Each of the connection terminals has a belt-shaped wound portion to be wound around a corresponding one of the main lines. The wound portion is fastened by a corresponding one of the fasteners so that both ends of the wound portion come closer to each other and a center portion of the wound portion tightens around the main line so as to be brought into surface contact with a bar conductor of the main line.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: July 10, 2018
    Assignee: YAZAKI CORPORATION
    Inventors: Masashi Tsukamoto, Shingo Kambara, Yoshihiko Sano, Motoko Hara, Takashi Okawa, Mai Shimizu, Satoshi Saitou, Akihiro Takagi, Masahiro Ichikawa
  • Publication number: 20180182883
    Abstract: A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer, and a second n-type semiconductor layer separated from the first n-type semiconductor layer by the body layer, a gate insulating film that covers a range across the surface of the first n-type semiconductor layer, the surface of the body layer, and the surface of the second n-type semiconductor layer, and a gate electrode that faces the body layer through the gate insulating film. An interface between the first n-type semiconductor layer and the body layer includes an inclined surface. The inclined surface is inclined such that the depth of the body layer increases as a distance from an end of the body layer increases in a horizontal direction. The inclined surface is disposed below the gate electrode.
    Type: Application
    Filed: December 6, 2017
    Publication date: June 28, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tetsuya YAMADA, Takashi OKAWA, Tomohiko MORI, Hiroyuki UEDA
  • Patent number: 10002974
    Abstract: A Zener diode includes a semiconductor substrate, an anode electrode and a cathode electrode. The semiconductor substrate includes a p-type anode region, an n-type current path region and a drift region. The p-type anode region is connected to the anode electrode. The n-type current path region is in contact with the anode region. The drift region is in contact with the anode region and the current path region. The drift region is of an n type. The drift region has a lower n-type impurity concentration than the current path region. The drift region is connected to the cathode electrode directly or via another n-type region.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 19, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroomi Eguchi, Hiromichi Kinpara, Takashi Okawa, Satoshi Ikeda
  • Patent number: 10002863
    Abstract: A semiconductor device is capable of accurately sensing a temperature of a semiconductor element incorporated in a semiconductor substrate. The semiconductor device includes a temperature sensor. The temperature sensor includes a first nitride semiconductor layer of p-type, a first sense electrode, and a second sense electrode. The first sense electrode and the second sense electrode are located to be capable of passing an electric current between the first sense electrode and the second sense electrode through the first nitride semiconductor layer.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 19, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidemoto Tomita, Yoshitaka Nagasato, Takashi Okawa, Masakazu Kanechika, Hiroyuki Ueda