Patents by Inventor Takashi Udagawa

Takashi Udagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7781866
    Abstract: A gallium nitride-based semiconductor stacked structure includes a single crystal substrate, a low-temperature buffer layer grown at a low temperature in a region contiguous to the single crystal substrate and a gallium nitride-based semiconductor layer overlying the low-temperature buffer layer. The low-temperature buffer layer possesses therein a single crystal layer formed of a hexagonal AlXGa?N-based Group III nitride material containing gallium predominantly over aluminum, wherein 0.5<??1 and X+?=1. The single crystal layer has crystal defects at a smaller density on a (10-10) crystal face than on a (11-20) crystal face. A method for production of the gallium nitride-based semiconductor stacked structure is also disclosed.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: August 24, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7772599
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a low-temperature-deposited buffer layer and an active layer. The low-temperature-deposited buffer layer is composed of a Group III nitride material that has been grown at low temperature and includes a single-crystal layer in an as-grown state, the single-crystal layer being present in the vicinity of a junction area that is in contact with a (0001) (c) plane of a sapphire substrate. The active layer is composed of a gallium-nitride (GaN)-based semiconductor layer that is provided on the low-temperature-deposited buffer layer. The single-crystal layer is composed of a hexagonal AlXGaYN (0.5<X?1, X+Y=1) crystal that contains aluminum in a predominant amount with respect to gallium such that a [2.?1.?1.0.] direction of the AlXGaYN crystal orients along with a [2.?1.?1.0.] direction of the (0001) bottom plane of the sapphire substrate.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 10, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7759149
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a sapphire substrate; a low-temperature-deposited buffer layer which is composed of a Group III nitride material of AlXGaYN (0.5<Y?1, X+Y=1) containing gallium (Ga) in a predominant amount with respect to aluminum (Al), which has been grown at low temperature and which is provided in a junction area thereof joined to a (0001) plane (c-plane) of the sapphire substrate with a single crystal in an as-grown state; and a gallium-nitride (GaN)-based semiconductor layer formed on the low-temperature-deposited buffer layer. The low-temperature-deposited buffer layer is predominantly composed of an as-grown single crystal which has a [1.0.?1.0.] orientation parallel to a [2.?1.?1.0.] direction of a lattice forming a (0001) basal plane of the sapphire substrate.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: July 20, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7759225
    Abstract: A semiconductor layer containing defects only in a small density, possessing good quality and exhibiting a large ionic bonding property as to GaN, for example, is formed on a semiconductor layer, such as a silicon carbide layer, which is made of a material possessing a small ionicity and exhibiting a strong covalent bonding property. A method for forming a semiconductor layer includes forming on the surface of a first semiconductor layer 102 possessing a first ionicity a second semiconductor layer 103 possessing a second ionicity larger than the first ionicity. The second semiconductor layer 103 is formed while irradiating the surface of the first semiconductor layer existing on the side for forming the second semiconductor layer with electrons in a vacuum.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: July 20, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20100155742
    Abstract: The present invention provides a light-emitting diode (10) including a substrate (101) made of a first conductive type silicon (Si) single crystal, a pn junction structured light-emitting section (40) composed of a III-group nitride semiconductor on the substrate, a first polarity ohmic electrode (107a) for the first conductive type semiconductor provided on the light-emitting section (40) and a second polarity ohmic electrode (108) for a second conductive type semiconductor on the same side as the light-emitting section (40) with respect to the substrate (101), wherein a second pn junction structure (30) is provided which is made up of a pn junction between the first conductive type semiconductor layer (102) and the second conductive type semiconductor layer (103) which is different from the pn junction structure of the light-emitting section (10).
    Type: Application
    Filed: July 27, 2006
    Publication date: June 24, 2010
    Applicant: Showa Denko K.K.
    Inventors: Rouichi Takeuchi, Takashi Udagawa
  • Patent number: 7732832
    Abstract: This pn-junction compound semiconductor light-emitting device includes a crystal substrate; an n-type light-emitting layer formed of a hexagonal n-type Group III nitride semiconductor and provided on the crystal substrate; a p-type Group III nitride semiconductor layer formed of a hexagonal p-type Group III nitride semiconductor and provided on the n-type light-emitting layer; a p-type boron-phosphide-based semiconductor layer having a sphalerite crystal type and provided on the p-type Group III nitride semiconductor layer; and a thin-film layer composed of an undoped hexagonal Group III nitride semiconductor formed on the p-type Group III nitride semiconductor layer, wherein the p-type boron-phosphide-based semiconductor layer is joined to the thin-film layer composed of an undoped hexagonal Group III nitride semiconductor.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: June 8, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7732831
    Abstract: A pn-junction compound semiconductor light-emitting device is provided, which comprises a stacked structure including a light-emitting layer composed of an n-type or a p-type aluminum gallium indium phosphide and a light-permeable substrate for supporting the stacked structure, and the stacked structure and the light-permeable substrate being joined together, wherein the stacked structure includes an n-type or a p-type conductor layer, the conductor layer and the substrate are joined together, and the conductor layer is composed of a Group III-V compound semiconductor containing boron.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: June 8, 2010
    Assignee: Showa Denko K.K.
    Inventors: Ryouichi Takeuchi, Wataru Nabekura, Takashi Udagawa
  • Patent number: 7732830
    Abstract: A compound semiconductor light-emitting diode comprising a light-emitting layer composed of a Group III-V compound semiconductor, and a current diffusion layer provided on the light-emitting layer and composed of a Group III-V compound semiconductor, characterized in that the current diffusion layer is composed of a conductive boron-phosphide-based semiconductor and has a bandgap at room temperature wider than that of the light-emitting layer.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: June 8, 2010
    Assignee: Showa Denko K.K.
    Inventors: Ryouichi Takeuchi, Takashi Udagawa
  • Patent number: 7646040
    Abstract: A boron phosphide-based semiconductor device having a junction structure of a Group-III nitride semiconductor layer and a boron phosphide layer with excellent device properties is provided. The boron phosphide-based compound semiconductor device has a heterojunction structure comprising a Group-III nitride semiconductor layer and a boron phosphide layer, wherein the surface of the Group-III nitride semiconductor layer has (0.0.0.1.) crystal plane, and the boron phosphide layer is a {111}-boron phosphide layer having a {111} crystal plane stacked on the (0.0.0.1.) crystal plane of the Group-III nitride semiconductor layer in parallel to the (0.0.0.1.) crystal plane.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: January 12, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20090309135
    Abstract: A compound semiconductor device (1) includes a compound semiconductor having a stacked structure (100) of a hexagonal single crystal layer (101), a boron phosphide-based semiconductor layer (102) formed on a surface of the hexagonal single crystal layer and a compound semiconductor layer (103) disposed on the boron phosphide-based semiconductor layer, and electrodes (108, 109) disposed on the stacked structure, wherein the boron phosphide-based semiconductor layer is formed of a hexagonal crystal disposed on a surface formed of a (1.1.-2.0.) crystal face of the hexagonal single crystal layer.
    Type: Application
    Filed: September 6, 2006
    Publication date: December 17, 2009
    Applicant: SHOWA DENKO K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7622398
    Abstract: A semiconductor device is prepared by the use of a vapor phase method and is provided with a semiconductor layer composed of boron phosphide (BP) having a band gap at room temperature of not less than 2.8 eV and not more than 3.4 eV or a boron phosphide (BP)-base mixed crystal which contains the boron phosphide (BP) and which is represented by the formula: B?Al?Ga?In1-?-?-?P?As?N1-?-? (0<??1, 0??<1, 0??<1, 0<?+?+??1, 0<??1, 0??<1, 0<?+??1).
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: November 24, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20090267081
    Abstract: A semiconductor device includes a substrate formed of a single crystal. a silicon carbide layer disposed on a surface of the single crystal substrate and an intermediate layer disposed on a surface of the silicon carbide layer and formed of a Group III nitride semiconductor, wherein the silicon carbide layer is formed of a cubic crystal stoichiometrically containing silicon copiously and the surface thereof has a (3×3) reconstruction structure.
    Type: Application
    Filed: September 12, 2006
    Publication date: October 29, 2009
    Inventor: Takashi Udagawa
  • Patent number: 7598593
    Abstract: The present invention provides a constitution of n-type ohmic electrode suitable for n-type group III nitride semiconductor, and a forming method thereof for providing low contact resistivity. The n-type ohmic electrode is provided to comprise an alloy of aluminum and lanthanum or comprises lanthanum at the junction interface with the n-type group III nitride semiconductor. The method comprising forming a lanthanum-aluminum alloy layer at 300° C. or less to form an n-type ohmic electrode enriched in lanthanum at the junction interface.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: October 6, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7576365
    Abstract: A Group III nitride semiconductor light-emitting device having a stacked structure includes a transparent crystal substrate having a front surface and a back surface, a first Group III nitride semiconductor layer of first conductive type formed on the front surface of the transparent crystal substrate, a second Group III nitride semiconductor layer of second conductive type which is opposite from the first conductive type, a light-emitting layer made of a Group III nitride semiconductor between the first and second Group III nitride semiconductor layers, and a plate body including fluorescent material, attached onto the back surface of the transparent crystal substrate.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: August 18, 2009
    Assignee: Showa Denko K.K.
    Inventors: Kazuhiro Mitani, Takashi Udagawa, Katsuki Kusunoki
  • Patent number: 7573075
    Abstract: A compound semiconductor device includes hexagonal silicon carbide crystal substrate and a boron-phosphide-based semiconductor layer formed on the silicon carbide crystal substrate, wherein the silicon carbide crystal substrate has a surface assuming a {0001} crystal plane, and the boron-phosphide-based semiconductor layer is composed of a {111} crystal stacked on and in parallel with the {0001} crystal plane of the silicon carbide crystal substrate, and when the number of the layers contained in one periodical unit of an atomic arrangement in the [0001] crystal orientation of the silicon carbide crystal substrate is n, an n-layer-stacked structure included in the {111} crystal plane forming the {111} crystal has a stacking height virtually equal to the c-axis lattice constant of the silicon carbide crystal substrate.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: August 11, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20090152579
    Abstract: The present invention provides a light-emitting diode (10) including a first conductive type silicon single crystal substrate (101), a light-emitting section (40) including a first pn junction structure composed of a III-group nitride semiconductor on the substrate, a first polarity ohmic electrode (107b) provided on the light-emitting section, and a second polarity ohmic electrode (108) on the same side as the light-emitting section with respect to the substrate, wherein a second pn junction structure (30) is configured in a region which extends from the substrate to the light-emitting section, the substrate is provided with a light-reflecting hole (109) from the back surface of the substrate opposite to the side on which the light-emitting section of the substrate is provided toward the stacking direction, and the inner surface of the light-reflecting hole and the back surface of the substrate are coated with a metallic film (110).
    Type: Application
    Filed: August 3, 2006
    Publication date: June 18, 2009
    Applicant: SHOWA DENKO K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7538361
    Abstract: An Ohmic electrode structure comprising a p-conductivity-type boron phosphide-based semiconductor layer containing boron and phosphorus as constitutional elements and having a surface; and an electrode disposed on said surface of said semiconductor layer and having an Ohmic contact with said semiconductor layer, wherein at least a surface portion of said electrode which is in contact with said semiconductor layer is formed from a lanthanide element or a lanthanide element-containing alloy. A compound semiconductor light-emitting device comprising a light-emitting layer formed of a compound semiconductor may advantageously comprise the Ohmic electrode structure.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: May 26, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20090127583
    Abstract: Provided is a semiconductor device containing a silicon single crystal substrate 101, a silicon carbide layer 102 provided on a surface of the substrate, a Group III nitride semiconductor junction layer 103 provided in contact with the silicon carbide layer, and a superlattice-structured layer 104 constituted by Group III nitride semiconductors on the Group III nitride semiconductor junction layer. In this semiconductor device, the silicon carbide layer is a layer of a cubic system whose lattice constant exceeds 0.436 nm and is not more than 0.460 nm and which has a nonstoichiometric composition containing silicon abundantly in terms of composition, and the Group III nitride semiconductor junction layer has a composition of AlxGayInzN1-?M? (0?X, Y, Z?1, X+Y+Z=1, 0??<1, M is a Group V element except nitrogen).
    Type: Application
    Filed: August 7, 2006
    Publication date: May 21, 2009
    Applicants: SHOWA DENKO K.K., THE DOSHISHA
    Inventors: Tadashi Ohachi, Takashi Udagawa
  • Publication number: 20090127571
    Abstract: A semiconductor layer containing defects only in a small density, possessing good quality and exhibiting a large ionic bonding property as to GaN, for example, is formed on a semiconductor layer, such as a silicon carbide layer, which is made of a material possessing a small ionicity and exhibiting a strong covalent bonding property. A method for forming a semiconductor layer includes forming on the surface of a first semiconductor layer 102 possessing a first ionicity a second semiconductor layer 103 possessing a second ionicity larger than the first ionicity. The second semiconductor layer 103 is formed while irradiating the surface of the first semiconductor layer existing on the side for forming the second semiconductor layer with electrons in a vacuum.
    Type: Application
    Filed: August 30, 2006
    Publication date: May 21, 2009
    Applicant: SHOWA DENKO K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20090114900
    Abstract: A semiconductor light-emitting diode 20 is provided with a silicon single crystal substrate 201, an intervening layer 203 formed of a Group III nitride semiconductor and stacked on the silicon single crystal substrate 201, and a light-emitting part (205, 206, 207) formed with a p-n-junction hetero-junction structure and stacked on the intervening layer 203. The intervening layer 203 is formed of an aluminum-containing Group III nitride semiconductor. The intervening layer 203 and the light-emitting part (205, 206, 207) have interposed therebetween a superlattice structure 204 formed of a plurality of Group III nitride semiconductor layers that contain aluminum and have mutually different aluminum composition ratios. A DBR film formed of the superlattice structure 204 is enabled to excel in reflectance and enhance the light-emitting property.
    Type: Application
    Filed: November 2, 2006
    Publication date: May 7, 2009
    Applicant: Showa Denko K.K.
    Inventor: Takashi Udagawa