Patents by Inventor Takashi Udagawa

Takashi Udagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7508010
    Abstract: A boron phosphide-based compound semiconductor device with excellent device properties, comprising a boron phosphide-based compound semiconductor layer having a wide bandgap is provided. The boron phosphide-based compound semiconductor layer consists of an amorphous layer and a polycrystal layer provided to join with the amorphous layer, and the room-temperature bandgap of the boron phosphide-based compound semiconductor layer is from 3.0 eV to less than 4.2 eV.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: March 24, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7498612
    Abstract: A pn-heterojunction compound semiconductor light-emitting device includes a crystalline substrate 101, a lower cladding layer 102 formed on a surface of the crystalline substrate and composed of an n-type Group III-V compound semiconductor, a light-emitting layer 103 formed on a surface of the lower cladding layer and composed of an n-type Group III-V compound semiconductor, an upper cladding layer 105 formed on a surface of the light-emitting layer and composed of p-type boron phosphide, an n-type electrode 106 attached to the lower cladding layer and a p-type electrode 107 attached to the upper cladding layer. The lower and upper cladding layers are opposed to each other and sandwich the light-emitting layer to form, in cooperation with the light-emitting layer, a light-emitting portion of a pn-heterojunction structure. The light-emitting device has an intermediate layer 104 composed of an n-type boron-containing Group III-V compound between the light-emitting layer and the upper cladding layer.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: March 3, 2009
    Assignee: Showa Denko K.K.
    Inventors: Michiya Odawara, Akira Kasahara, Takashi Udagawa
  • Patent number: 7495261
    Abstract: A Group III nitride semiconductor light-emitting device includes a stacked structure 11 formed on a crystal substrate (100) to be removed from it and including two Group III nitride semiconductor layers 104 and 106 having different electric conductive types and a light-emitting layer 105 which is stacked between the two Group III nitride semiconductor layers and which includes a Group III nitride semiconductor, and a plate body 111made of material different from that of the crystal substrate and formed on a surface of an uppermost layer which is opposite from the crystal substrate that is removed from the stacked structure.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: February 24, 2009
    Assignee: Showa Denko K.K.
    Inventors: Katsuki Kusunoki, Kazuhiro Mitani, Takashi Udagawa
  • Publication number: 20090045412
    Abstract: A method for producing a silicon carbide layer on a surface of a silicon substrate includes the step of irradiating the surface of the silicon substrate heated in a high vacuum at a temperature in a range of from 500° C. to 1050° C. with a hydrocarbon-based gas as well as an electron beam to form a cubic silicon carbide layer on the silicon substrate surface.
    Type: Application
    Filed: May 23, 2006
    Publication date: February 19, 2009
    Inventor: Takashi Udagawa
  • Patent number: 7488987
    Abstract: A boron phosphide-based semiconductor light-emitting device, comprising: a crystalline substrate; a first semiconductor layer formed on said crystalline substrate, said first semiconductor layer including a light-emitting layer, serving as a base layer and having a first region and a second region different from the first region; a boron phosphide-based semiconductor amorphous layer formed on said first region of said first semiconductor layer, said boron phosphide-based semiconductor amorphous layer including a high-resistance boron phosphide-based semiconductor amorphous layer or a first boron phosphide-based semiconductor amorphous layer having a conduction type opposite to that of said first semiconductor layer; a pad electrode formed on said high-resistance or opposite conductivity-type boron phosphide-based semiconductor amorphous layer for establishing wire bonding; and a conductive boron phosphide-based crystalline layer formed on said second region of said first semiconductor layer, said conductive b
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: February 10, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7479731
    Abstract: The present invention provides a technique for fabricating a multicolor light-emitting lamp by using a blue LED having a structure capable of avoiding cumbersome bonding. In particular, the present invention provides a technique for fabricating a multicolor light-emitting lamp by using a hetero-junction type GaP-base LED capable of emitting high intensity green light in combination. Also, for example, in fabricating a multicolor light-emitting lamp from the blue LED and the yellow LED, the present invention provides a technique for fabricating a multicolor light-emitting lamp from a blue LED requiring no cumbersome bonding and a hetero-junction type GaAs1-ZPZ-base yellow LED of emitting light having high light emission intensity.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: January 20, 2009
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7465499
    Abstract: A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of a triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, where in each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: December 16, 2008
    Assignee: Showa Denko K.K.
    Inventors: Takashi Udagawa, Tamotsu Yamashita
  • Publication number: 20080283823
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a sapphire substrate; a low temperature-deposited buffer layer which is composed of a Group III nitride material of AlxGayN (0.5<Y?1, X+Y=1) containing gallium (Ga) in a predominant amount with respect to aluminum (Al), which has been grown at low temperature and which is provided in a junction area thereof joined to a (0001) plane (c-plane) of the sapphire substrate with a single crystal in an as-grown state; and a gallium-nitride (GaN)-based semiconductor layer formed on the low-temperature-deposited buffer layer. The low-temperature-deposited buffer layer is predominantly composed of an as-grown single crystal which has a [1.0.-1.0.] orientation parallel to a [2.-1.1.0.] direction of a lattice forming a (0001) basal plane of the sapphire substrate.
    Type: Application
    Filed: June 9, 2005
    Publication date: November 20, 2008
    Applicant: SHOWA DENKO K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20080268562
    Abstract: A pn-junction compound semiconductor light-emitting device is provided, which comprises a stacked structure including a light-emitting layer composed of an n-type or a p-type aluminum gallium indium phosphide and a light-permeable substrate for supporting the stacked structure, and the stacked structure and the light-permeable substrate being joined together, wherein the stacked structure includes an n-type or a p-type conductor layer, the conductor layer and the substrate are joined together, and the conductor layer is composed of a Group III-V compound semiconductor containing boron.
    Type: Application
    Filed: May 15, 2008
    Publication date: October 30, 2008
    Inventors: Ryouichi TAKEUCHI, Wataru Nabekura, Takashi Udagawa
  • Publication number: 20080157079
    Abstract: A boron phosphide-based semiconductor light-emitting device, comprising: a crystalline substrate; a first semiconductor layer formed on said crystalline substrate, said first semiconductor layer including a light-emitting layer, serving as a base layer and having a first region and a second region different from the first region; a boron phosphide-based semiconductor amorphous layer formed on said first region of said first semiconductor layer, said boron phosphide-based semiconductor amorphous layer including a high-resistance boron phosphide-based semiconductor amorphous layer or a first boron phosphide-based semiconductor amorphous layer having a conduction type opposite to that of said first semiconductor layer; a pad electrode formed on said high-resistance or opposite conductivity-type boron phosphide-based semiconductor amorphous layer for establishing wire bonding; and a conductive boron phosphide-based crystalline layer formed on said second region of said first semiconductor layer, said conductive b
    Type: Application
    Filed: February 29, 2008
    Publication date: July 3, 2008
    Inventor: Takashi UDAGAWA
  • Publication number: 20080135852
    Abstract: A gallium nitride-based semiconductor stacked structure includes a single crystal substrate, a low-temperature buffer layer grown at a low temperature in a region contiguous to the single crystal substrate and a gallium nitride-based semiconductor layer overlying the low-temperature buffer layer. The low-temperature buffer layer possesses therein a single crystal layer formed of a hexagonal AlXGa?N-based Group III nitride material containing gallium predominantly over aluminum, wherein 0.5<??1 and X+?=1. The single crystal layer has crystal defects at a smaller density on a (1.0.?1.0.) crystal face than on a (1.1.?2.0.) crystal face. A method for the production of the gallium nitride-based semiconductor stacked structure includes forming on a single crystal substrate a low-temperature buffer layer grown at a low temperature falling in a range of 250° C. to 500° C.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 12, 2008
    Applicant: SHOWA DENKO K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7365366
    Abstract: A boron phosphide-based semiconductor light-emitting device, comprising: a crystalline substrate; a first semiconductor layer formed on said crystalline substrate, said first semiconductor layer including a light-emitting layer, serving as a base layer and having a first region and a second region different from the first region; a boron phosphide-based semiconductor amorphous layer formed on said first region of said first semiconductor layer, said boron phosphide-based semiconductor amorphous layer including a high-resistance boron phosphide-based semiconductor amorphous layer or a first boron phosphide-based semiconductor amorphous layer having a conduction type opposite to that of said first semiconductor layer; a pad electrode formed on said high-resistance or opposite conductivity-type boron phosphide-based semiconductor amorphous layer for establishing wire bonding; and a conductive boron phosphide-based crystalline layer formed on said second region of said first semiconductor layer, said conductive b
    Type: Grant
    Filed: December 25, 2003
    Date of Patent: April 29, 2008
    Assignee: Showa Denka K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20080067522
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a low-temperature-deposited buffer layer and an active layer. The low-temperature-deposited buffer layer is composed of a Group III nitride material that has been grown at low temperature and includes a single-crystal layer in an as-grown state, the single-crystal layer being present in the vicinity of a junction area that is in contact with a (0001) (c) plane of a sapphire substrate. The active layer is composed of a gallium-nitride (GaN)-based semiconductor layer that is provided on the low-temperature-deposited buffer layer. The single-crystal layer is composed of a hexagonal AlxGayN (0.5<X?1, X+Y=1) crystal that contains aluminum in a predominant amount with respect to gallium such that a [2.?1.?1.0.] direction of the AlxGayN crystal orients along with a [2.?1.?1.0.] direction of the (0001) bottom plane of the sapphire substrate.
    Type: Application
    Filed: May 25, 2005
    Publication date: March 20, 2008
    Inventor: Takashi Udagawa
  • Patent number: 7315050
    Abstract: A semiconductor device is prepared by the use of a vapor phase method and is provided with a semiconductor layer composed of boron phosphide (BP) having a band gap at room temperature of not less than 2.8 eV and not more than 3.4 eV or a boron phosphide (BP)-base mixed crystal which contains the boron phosphide (BP) and which is represented by the formula: B?Al?Ga?In1??????P?As?N1???? (0<??1, 0??<1, 0??<1, 0<?+?+??1, 0<??1, 0??<1, 0<?+??1).
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: January 1, 2008
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20070278509
    Abstract: A Group III nitride semiconductor light-emitting device includes a stacked structure 11 formed on a crystal substrate (100) to be removed from it and including two Group III nitride semiconductor layers 104 and 106 having different electric conductive types and a light-emitting layer 105 which is stacked between the two Group III nitride semiconductor layers and which includes a Group III nitride semiconductor, and a plate body 111 made of material different from that of the crystal substrate and formed on a surface of an uppermost layer which is opposite from the crystal substrate that is removed from the stacked structure.
    Type: Application
    Filed: March 17, 2005
    Publication date: December 6, 2007
    Inventors: Katsuki Kusunoki, Kazuhiro Mitani, Takashi Udagawa
  • Publication number: 20070259510
    Abstract: A semiconductor device is prepared by the use of a vapor phase method and is provided with a semiconductor layer composed of boron phosphide (BP) having a band gap at room temperature of not less than 2.8 eV and not more than 3.4 eV or a boron phosphide (BP)-base mixed crystal which contains the boron phosphide (BP) and which is represented by the formula: B?Al?Ga?In1-?-?-?P?As?N1-?-? (0<??1, 0??<1, 0??<1, 0<?+?+??1, 0<??1, 0??<1, 0<?+??1).
    Type: Application
    Filed: June 27, 2007
    Publication date: November 8, 2007
    Inventor: Takashi Udagawa
  • Publication number: 20070246719
    Abstract: In a p-n junction-type compound semiconductor light-emitting diode provided on a crystal substrate with at least an n-type active layer formed of a Group m nitride semiconductor as a light emitting layer, and with a Group m nitride semiconductor layer containing a p-type impurity on the n-type active layer, the diode has a boron phosphide-based Group III-V compound semiconductor layer possessing a band gap exceeding that of the Group m nitride semiconductor forming the n-type active layer at room temperature and exhibiting a p-type electroconductivity in an undoped state deposited on the p-type impurity-containing Group III nitride semiconductor layer, and has an ohmic positive electrode joined to a surface of the boron phosphide-based Group III-V compound semiconductor layer.
    Type: Application
    Filed: May 6, 2005
    Publication date: October 25, 2007
    Applicant: SHOWA DENKO K.K.
    Inventors: Michiya Odawara, Takashi Udagawa
  • Publication number: 20070221946
    Abstract: This pn-junction compound semiconductor light-emitting device includes a crystal substrate; an n-type light-emitting layer formed of a hexagonal n-type Group III nitride semiconductor and provided on the crystal substrate; a p-type Group III nitride semiconductor layer formed of a hexagonal p-type Group III nitride semiconductor and provided on the n-type light-emitting layer; a p-type boron-phosphide-based semiconductor layer having a sphalerite crystal type and provided on the p-type Group III nitride semiconductor layer; and a thin-film layer composed of an undoped hexagonal Group III nitride semiconductor formed on the p-type Group III nitride semiconductor layer, wherein the p-type boron-phosphide-based semiconductor layer is joined to the thin-film layer composed of an undoped hexagonal Group III nitride semiconductor.
    Type: Application
    Filed: April 27, 2005
    Publication date: September 27, 2007
    Inventor: Takashi Udagawa
  • Publication number: 20070215886
    Abstract: A pn-junction compound semiconductor light-emitting device is provided, which comprises a stacked structure including a light-emitting layer composed of an n-type or a p-type aluminum gallium indium phosphide and a light-permeable substrate for supporting the stacked structure, and the stacked structure and the light-permeable substrate being joined together, wherein the stacked structure includes an n-type or a p-type conductor layer, the conductor layer and the substrate are joined together, and the conductor layer is composed of a Group III-V compound semiconductor containing boron.
    Type: Application
    Filed: March 28, 2005
    Publication date: September 20, 2007
    Inventors: Ryouichi Takeuchi, Wataru Nabekura, Takashi Udagawa
  • Publication number: 20070200114
    Abstract: A compound semiconductor device includes hexagonal silicon carbide crystal substrate and a boron-phosphide-based semiconductor layer formed on the silicon carbide crystal substrate, wherein the silicon carbide crystal substrate has a surface assuming a {0001} crystal plane, and the boron-phosphide-based semiconductor layer is composed of a {111} crystal stacked on and in parallel with the {0001} crystal plane of the silicon carbide crystal substrate, and when the number of the layers contained in one periodical unit of an atomic arrangement in the [0001] crystal orientation of the silicon carbide crystal substrate is n, an n-layer-stacked structure included in the {111} crystal plane forming the {111} crystal has a stacking height virtually equal to the c-axis lattice constant of the silicon carbide crystal substrate.
    Type: Application
    Filed: March 28, 2005
    Publication date: August 30, 2007
    Inventor: Takashi Udagawa