Abstract: A method of producing a composite wafer including a semiconductor crystal layer, includes forming a sacrificial layer and the semiconductor crystal layer above a semiconductor crystal layer forming wafer in the stated order, etching the semiconductor crystal layer to partially expose the sacrificial layer and dividing the semiconductor crystal layer into a plurality of divided pieces, bonding the semiconductor crystal layer forming wafer and a transfer target wafer made of an inorganic material in such a manner that a first surface of the semiconductor crystal layer forming wafer faces and comes into contact with a second surface of the transfer target wafer, and etching the sacrificial layer to separate the transfer target wafer and the semiconductor crystal layer forming wafer from each other with the semiconductor crystal layer being left on the transfer target wafer.

Abstract: A programmable logic device includes a plurality of programmable logic elements (PLE) whose electrical connection is controlled by first configuration data. Each of The PLEs includes an LUT in which a relationship between a logic level of an input signal and a logic level of an output signal is determined by second configuration data, an FF to which the output signal of the LUT is input, and an MUX. The MUX includes at least two switches each including first and second transistor. A signal including third configuration data is input to a gate of the second transistor through the first transistor. The output signal of the LUT or an output signal of the FF is input to one of a source and a drain of the second transistor.

Abstract: A semiconductor wafer comprises, on a semiconductor crystal layer forming wafer, a first semiconductor crystal layer, a second semiconductor crystal layer, and a third semiconductor crystal layer in this order, wherein both the etching rates of the first semiconductor crystal layer and the third semiconductor crystal layer by a first etching agent are higher than the etching rate of the second semiconductor crystal layer by the first etching agent, and both the etching rates of the first semiconductor crystal layer and the third semiconductor crystal layer by a second etching agent are lower than the etching rate of the second semiconductor crystal layer by the second etching agent.

Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.

Abstract: A method of manufacturing a solid-state image sensor having a pixel region and a peripheral circuit region, includes forming an oxide film on a semiconductor substrate, forming an insulating film on the oxide film, forming a first opening in the insulating film and the oxide film in the peripheral circuit region, forming a trench in the semiconductor substrate in the peripheral circuit region by etching the semiconductor substrate through the first opening using the insulating film as a mask, forming a second opening in the insulating film to penetrate through the insulating film in the pixel region and to reach a predetermined depth of the oxide film, and forming insulators in the trench and the second opening.

Abstract: A solid-state image sensor including an effective pixel portion in which a plurality of pixels including photodiodes formed on a semiconductor substrate are arranged, and a peripheral portion arranged around the effective pixel portion, includes a plurality of metal wiring layers arranged above the semiconductor substrate, and a planarizing film covering a patterned metal wiring layer that is a top layer among the plurality of metal wiring layers, wherein in the effective pixel portion, the plurality of metal wiring layers have openings configured to guide light to the photodiodes, and in the peripheral portion, an opening is provided in the top layer, and at least one metal wiring layer between the top layer and the semiconductor substrate has a pattern which blocks light incident on the photodiodes via the opening in the top layer.

Abstract: To provide a PLD having a reduced circuit area and an increased operation speed. In the circuit structure, a gate of a transistor provided between an input terminal and an output terminal of a programmable switch element is in an electrically floating state in a period when a signal is input to the programmable switch element. The structure enables the voltage of a gate to be increased by a boosting effect in response to a signal supplied from programmable logic elements, suppressing a reduction in amplitude voltage. This can reduce a circuit area by a region occupied by a booster circuit such as a pull-up circuit and increase operation speed.

Abstract: A control device for a rotating electrical machine, which is able to reduce a tracking delay of an actual output torque and actual currents with respect to a fluctuating torque command and fluctuating current commands and to reduce steady state deviations, is obtained. The control device includes a torque current computing unit; an actual current computing unit; a current feedback control unit; and a voltage control unit that controls voltages on the basis of the two-phase voltage commands. The torque command includes a fluctuation cancellation torque command for cancelling transmission torque fluctuations transmitted from the internal combustion engine, and the current feedback control unit includes a harmonic controller that calculates the two-phase voltage commands by using a characteristic of a transfer function corresponding to a periodic function of a frequency of the transmission torque fluctuations.

Abstract: A medium transport device includes a medium transport pathway that inverts a medium that is supplied from a processing unit and is capable of transporting the medium to the processing unit again, a plurality of supply units that supply media, and a plurality of convergence units at which the plurality of supply units and the medium transport route converge. A transport roller is provided in each convergence unit.

Abstract: A semiconductor device includes a photodiode, a first transistor, a second transistor, and a third transistor. The second transistor and the third transistor have a function of retaining a charge accumulated in a gate of the first transistor. In a period during which the second transistor and the third transistor are off, a voltage level of a voltage applied to a gate of the second transistor is set to be lower than a voltage level of a source of the second transistor and a voltage level of a drain of the second transistor, and a voltage level of a voltage applied to a gate of the third transistor is set to be lower than a voltage level of a source of the third transistor and a voltage level of a drain of the third transistor.

Abstract: A recording apparatus includes a apparatus main body, and a unit body that forms a medium transportation path, and is configured to be attachable and detachable with respect to the apparatus main body. The unit body includes a feeding roller that transports a medium, and a driven transportation unit that transmits the drive force of the drive transportation unit to the feeding roller. The unit body is displaceable between a first position at which the driven transmission unit is connected to the drive transmission unit and a second position at which the driven transmission unit is separated from the drive transmission unit. When a user pulls out the medium, the unit body retained at the first position moves from the first position to the second position.

Abstract: A medium transporting device includes a first roller that inverts a medium supplied from a processing section side, the processing section processing the medium; a second roller that is located closer to the processing section than the first roller, the second roller having a function of inverting the medium supplied from the processing section side and a function of applying a transporting force to the medium using an outer peripheral surface of the second roller that faces both a pre-inversion medium transporting pathway for transporting a medium that has not been inverted by the first roller and a post-inversion medium transporting pathway for transporting a medium that has been inverted by the first roller; a medium transporting pathway that causes the medium supplied from the processing section side to be inverted along the second roller and causes the medium thus inverted to be supplied to the processing section side.

Abstract: An apparatus for controlling an air-fuel ratio of an internal-combustion engine includes an air-fuel ratio detector, a fluctuation signal generating device, an air-fuel ratio fluctuation device, a 0.5th-order frequency component strength calculator, a fluctuation frequency component strength calculator, a reference component strength calculator, and an imbalance fault determining device. The reference component strength calculator is configured to calculate strength of a reference component in accordance with strength of a first frequency component and strength of a second frequency component. The imbalance fault determining device is configured to make a determination of an imbalance fault in which air-fuel ratios of a plurality of cylinders vary beyond a tolerance limit on a basis of a relative relationship between strength of the 0.5th-order frequency component and the strength of the reference component.

Abstract: A semiconductor device includes a photodiode, a first transistor, a second transistor, and a third transistor. The second transistor and the third transistor have a function of retaining a charge accumulated in a gate of the first transistor. In a period during which the second transistor and the third transistor are off, a voltage level of a voltage applied to a gate of the second transistor is set to be lower than a voltage level of a source of the second transistor and a voltage level of a drain of the second transistor, and a voltage level of a voltage applied to a gate of the third transistor is set to be lower than a voltage level of a source of the third transistor and a voltage level of a drain of the third transistor.

Abstract: A medium transport device includes a restricting unit that is provided in a device main body, and that is coupled with an attaching and detaching operation of a unit body, which configures a portion of a transport pathway, to the device main body. The restricting unit changes between a first state that allows the cover to attain a closed state with respect to the device main body and a second state that restricts the cover from attaining a closed state with respect to the device main body.

Abstract: In a first slip suppression control by a first slip suppression control unit when a vehicle stops on a slope, an electronic control unit controls an output torque of an electric motor so that a rotation speed of an input rotation member of a hydraulic power transmission reaches a predetermined target rotation speed during stopping of an engine. The electronic control unit starts the engine when the output torque of the electric motor is greater than a predetermined torque. Accordingly, when the output torque of the electric motor at a rotation speed under a slip suppression control is insufficient, the output torque of the engine can be used and thus a locked state of the electric motor is appropriately prevented.

Abstract: To provide a semiconductor memory device which can be manufactured with high yield and which can achieve higher integration. A pair of memory cells adjacent to each other in the bit line direction is connected to a bit line through a common contact hole. The pair of memory cells adjacent to each other in the bit line direction shares an electrode connected to the bit line. An oxide semiconductor layer included in the memory cell is provided to overlap with a word line and a capacitor line. A transistor and a capacitor included in the memory cell are each provided to overlap with the bit line connected to the memory cell.

Abstract: Provided is a slot machine capable of reducing unfairness which may result between a player who has made an investment and a player who has not made an investment and allowing a player to proceed with a game by making an investment in expectation of a jackpot at ease. Each money amount which is constant is accumulated independently of a number of bets each time betting is conducted, and upon winning a jackpot, a money amount calculated by multiplying a money amount accumulated until then by a multiplying factor based on the number of bets is provided.

Abstract: In a medium transport device, when a unit body is inserted into an installation unit and an opening and closing body is closed with respect to the device main body, the unit body is positioned in a position that configures a portion of a transport pathway as a result of the opening and closing body pressing first target pressing units that are provided in the unit body.

Abstract: An abnormality determining apparatus includes an air-fuel ratio controller, an output change period parameter calculator, an output change amount extremum calculator, and an abnormality determining device. The abnormality determining device is configured to determine an abnormality of an air-fuel ratio sensor based on a relationship between an output change period parameter and an output change amount extremum.