Patents by Inventor Takeshi Kitahara

Takeshi Kitahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140110771
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor substrate including a pixel area and a peripheral circuit area, a first line provided in the peripheral circuit area and on a first principal surface of the semiconductor substrate, a second line provided in the peripheral circuit area and on a second principal surface of the semiconductor substrate, a first through electrode connected to one end of the first line and one end of the second line and passing through the semiconductor substrate, and a second through electrode connected to the other end of the first line and the other end of the second line and passing through the semiconductor substrate.
    Type: Application
    Filed: July 23, 2013
    Publication date: April 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoyuki YODA, Jiro Hayakawa, Ikuko Inoue, Eiji Sato, Takeshi Kitahara
  • Publication number: 20140078684
    Abstract: A power module substrate includes: a ceramics substrate composed of AlN, having a top face; a metal plate composed of pure aluminum and joined to the top face of the ceramics substrate with a brazing filler metal including silicon interposed therebetween; and a high concentration section formed at a joint interface at which the metal plate is joined to the ceramics substrate, having a silicon concentration that is more than five times the silicon concentration in the metal plate.
    Type: Application
    Filed: November 13, 2013
    Publication date: March 20, 2014
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Yoshirou Kuromitsu, Kazuhiro Akiyama, Takeshi Kitahara, Hiroshi Tonomura
  • Publication number: 20140071633
    Abstract: A power module substrate includes: a ceramics substrate composed of AlN, having a top face; a metal plate composed of pure aluminum and joined to the top face of the ceramics substrate with a brazing filler metal including silicon interposed therebetween; and a high concentration section formed at a joint interface at which the metal plate is joined to the ceramics substrate, having a silicon concentration that is more than five times the silicon concentration in the metal plate.
    Type: Application
    Filed: November 13, 2013
    Publication date: March 13, 2014
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Yoshirou Kuromitsu, Kazuhiro Akiyama, Takeshi Kitahara, Hiroshi Tonomura
  • Patent number: 8637777
    Abstract: A power module substrate having a heatsink, includes: a power module substrate having an insulating substrate having a first face and a second face, a circuit layer formed on the first face, and a metal layer formed on the second face; and a heatsink directly connected to the metal layer, cooling the power module substrate, wherein a ratio B/A is in the range defined by 1.55?B/A?20, where a thickness of the circuit layer is represented as A, and a thickness of the metal layer is represented as B.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: January 28, 2014
    Assignee: Mitsubishi Materials Corporation
    Inventors: Hiromasa Hayashi, Takeshi Kitahara, Hiroshi Tonomura, Hiroya Ishizuka, Yoshirou Kuromitsu
  • Publication number: 20140015140
    Abstract: A power module substrate includes: a ceramics substrate having a surface; and a metal plate connected to the surface of the ceramics substrate, composed of aluminum, and including Cu at a joint interface between the ceramics substrate and the metal plate, wherein a Cu concentration at the joint interface is in the range of 0.05 to 5 wt %.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 16, 2014
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Yoshirou Kuromitsu, Yoshiyuki Nagatomo, Takeshi Kitahara, Hiroshi Tonomura, Kazuhiro Akiyama
  • Patent number: 8609993
    Abstract: A power module substrate includes: a ceramics substrate composed of AlN, having a top face; a metal plate composed of pure aluminum and joined to the top face of the ceramics substrate with a brazing filler metal including silicon interposed therebetween; and a high concentration section formed at a joint interface at which the metal plate is joined to the ceramics substrate, having a silicon concentration that is more than five times the silicon concentration in the metal plate.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: December 17, 2013
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshirou Kuromitsu, Kazuhiro Akiyama, Takeshi Kitahara, Hiroshi Tonomura
  • Patent number: 8564118
    Abstract: A power module substrate includes: a ceramics substrate having a surface; and a metal plate connected to the surface of the ceramics substrate, composed of aluminum, and including Cu at a joint interface between the ceramics substrate and the metal plate, wherein a Cu concentration at the joint interface is in the range of 0.05 to 5 wt %.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: October 22, 2013
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshirou Kuromitsu, Yoshiyuki Nagatomo, Takeshi Kitahara, Hiroshi Tonomura, Kazuhiro Akiyama
  • Publication number: 20130232783
    Abstract: Disclosed is a ceramic substrate including silicon in which the concentration of a silicon oxide and a silicon composite oxide in the surface thereof is less than or equal to 2.7 Atom %.
    Type: Application
    Filed: April 22, 2013
    Publication date: September 12, 2013
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Hiroshi Tonomura, Takeshi Kitahara, Hiroya Ishizuka, Yoshirou Kuromitsu, Yoshiyuki Nagatomo
  • Patent number: 8446827
    Abstract: A radio communication terminal includes a link-usage level calculating section that calculates usage level of a radio link, and a data reception continuation/suspension determining section that determines continuation of data reception or suspension of data reception according to the level of usage calculated by the link-usage level calculating section. The link-usage level calculating section calculates a current usage level indicating a level of usage of the radio link associated with current data reception in the radio communication terminal. The data reception continuation/suspension determining section determines continuation of data reception when the current usage level is equal to or higher than a reference level of usage being a threshold and determines suspension of data reception when the current usage level is lower than the reference level of usage.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: May 21, 2013
    Assignee: KDDI Corporation
    Inventors: Takeshi Kitahara, Hajime Nakamura, Yasuhiko Hiehata
  • Patent number: 8311052
    Abstract: Control of readout of packets from a packet buffer is disclosed in which equal numbers of tokens are removed and used from token buckets having different bucket sizes; tokens are generated at token rates for the token buckets, wherein each token rate is preset such that the larger the token bucket size, the lower the token rate, and the generated tokens are added to the token buckets; a used-token count is measured for each token bucket, and a stored-token count is measured for each token bucket, with the stored-token count given a negative value if each token bucket is empty; and a number of data packets are read out of the packet buffer, which depends on the measured value of the used-token count for each token buffer.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: November 13, 2012
    Assignee: KDDI Corporation
    Inventors: Hajime Nakamura, Norihiro Fukumoto, Takeshi Kitahara
  • Patent number: 8198540
    Abstract: A power element mounting substrate including a circuit layer brazed to a surface of a ceramic plate, and a power element soldered to a front surface of the circuit layer, wherein the circuit layer is constituted using an Al alloy with an average purity of more than or equal to 98.0 wt % and less than or equal to 99.9 wt %, Fe concentration of the circuit layer at a side of a surface to be brazed to the ceramic plate is less than 0.1 wt %, and Fe concentration of the circuit layer at a side of the surface opposite to the surface to be brazed is more than or equal to 0.1 wt %.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: June 12, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshirou Kuromitsu, Hiroya Ishizuka, Hiroshi Miyata, Takeshi Kitahara, Hiroshi Tonomura
  • Patent number: 8116084
    Abstract: A method for manufacturing a power module substrate, includes: preparing a ceramics substrate and a metal plate made of pure aluminum; a fusion step in which the ceramics substrate and the metal plate are stacked in layers with a brazing filler metal interposed therebetween, and a fused aluminum layer is formed at an interface between the ceramics substrate and the metal plate by fusing the brazing filler metal which is caused by heating; and a solidifying step in which the fused aluminum layer is solidified by cooling, and a crystal is grown so as to be arranged in a crystal orientation of the metal plate when the fused aluminum layer is solidified.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: February 14, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Takeshi Kitahara, Yoshiyuki Nagatomo, Toshiyuki Nagase, Yoshirou Kuromitsu
  • Publication number: 20110260764
    Abstract: A method for designing a semiconductor integrated circuit according to an embodiment includes: placing standard flip-flop circuits and low power-consumption flip-flop circuits; grouping the placed flip-flop circuits into clusters by using an evaluation function having indices including cell types; assigning a first clock buffer to each cluster formed only by standard flip-flop circuits; assigning a second clock buffer to each cluster including low power-consumption flip-flop circuits, the second clock buffer having a larger size than the first clock buffer; and performing clock wiring.
    Type: Application
    Filed: November 24, 2010
    Publication date: October 27, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takeshi KITAHARA, Takashi ISHIOKA, Toshiaki SHIRAI
  • Patent number: 8044500
    Abstract: Disclosed is a power module having improved joint reliability. Specifically disclosed is a power module including a power module substrate wherein a circuit layer is brazed on the front surface of a ceramic substrate, a metal layer is brazed on the rear surface of the ceramic substrate and a semiconductor chip is soldered to the circuit layer. The metal layer is composed of an Al alloy having an average purity of not less than 98.0 wt. % but not more than 99.9 wt. % as a whole. In this metal layer, the Fe concentration in the side of a surface brazed with the ceramic substrate is set at less than 0.1 wt. %, and the Fe concentration in the side of a surface opposite to the brazed surface is set at not less than 0.1 wt. %.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: October 25, 2011
    Assignees: Mitsubishi Materials Corporation, Toyota Jidosha Kabushiki Kaisha
    Inventors: Takeshi Kitahara, Hiroya Ishizuka, Yoshirou Kuromitsu, Tomoyuki Watanabe
  • Patent number: 7974203
    Abstract: The invention is directed to a traffic control system. The traffic control system comprises a communication device. The communication device includes a traffic type differentiation unit for differentiating a traffic type of an application that generates traffic to be processed on a communication network, a traffic control execution unit for controlling the traffic according to a traffic control condition corresponding to the traffic type, and a setting change reception unit for receiving setting change information on the traffic type or setting change information on the traffic control condition from the communication network. The traffic control system also comprises a setting change information transmission device provided on the communication network for transmitting setting change information.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: July 5, 2011
    Assignee: KDDI Corporation
    Inventors: Takeshi Kitahara, Masaki Fukushima, Yoji Kishi, Hajime Nakamura
  • Patent number: 7962883
    Abstract: This disclosure concerns a semiconductor circuit design method for designing a clock wiring structure supplying a clock to a flip-flop by using a computer. The semiconductor circuit design method comprises setting the flip-flop based on circuit information on a semiconductor integrated circuit; obtaining a control signal controlling the flip-flop; calculating a first evaluation value indicating a power consumption and a magnitude of a clock skew time when clock gating is applied to the flip-flop; setting a gated clock structure clock-gating the flip-flop when the first evaluation value is higher than a first threshold; calculating a second evaluation value indicating the power consumption and a magnitude of a cell area when a low power flip-flop lower in power consumption than the flip-flop is applied to the flip-flop; and replacing the flip-flop by the lower power flip-flop when the second evaluation value is higher than a second threshold.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: June 14, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Kitahara, Tetsuaki Utsumi
  • Publication number: 20110074010
    Abstract: A power module substrate includes: a ceramics substrate having a surface; and a metal plate connected to the surface of the ceramics substrate, composed of aluminum, and including Cu at a joint interface between the ceramics substrate and the metal plate, wherein a Cu concentration at the joint interface is in the range of 0.05 to 5 wt %.
    Type: Application
    Filed: June 5, 2009
    Publication date: March 31, 2011
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Yoshirou Kuromitsu, Yoshiyuki Nagatomo, Takeshi Kitahara, Hiroshi Tonomura, Kazuhiro Akiyama
  • Publication number: 20110067906
    Abstract: A power module substrate includes: a ceramics substrate composed of AlN, having a top face; a metal plate composed of pure aluminum and joined to the top face of the ceramics substrate with a brazing filler metal including silicon interposed therebetween; and a high concentration section formed at a joint interface at which the metal plate is joined to the ceramics substrate, having a silicon concentration that is more than five times the silicon concentration in the metal plate.
    Type: Application
    Filed: May 15, 2009
    Publication date: March 24, 2011
    Applicant: Mitsubishi Materials Corporation
    Inventors: Yoshirou Kuromitsu, Kazuhiro Akiyama, Takeshi Kitahara, Hiroshi Tonomura
  • Patent number: 7889688
    Abstract: A radio communication apparatus has a battery, a transmit buffer for temporarily accumulating packets to be sent, a battery state monitoring unit for monitoring a battery state of the battery, and a traffic control unit. The traffic control unit determines a packet burst length and an interval time between the packet bursts in order to obtain charge recovery effect based on the battery state, and controls so as to take out data packets of the packet burst length from the transmit buffer for every interval time between the packet bursts of the packet burst.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 15, 2011
    Assignee: KDDI Corporation
    Inventors: Takeshi Kitahara, Hajime Nakamura, Satoshi Konishi
  • Publication number: 20110017496
    Abstract: A power module substrate having a heatsink, includes: a power module substrate having an insulating substrate having a first face and a second face, a circuit layer formed on the first face, and a metal layer formed on the second face; and a heatsink directly connected to the metal layer, cooling the power module substrate, wherein a ratio B/A is in the range defined by 1.55?B/A?20, where a thickness of the circuit layer is represented as A, and a thickness of the metal layer is represented as B.
    Type: Application
    Filed: March 11, 2009
    Publication date: January 27, 2011
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Hiromasa Hayashi, Takeshi Kitahara, Hiroshi Tonomura, Hiroya Ishizuka, Yoshinoru Kuromitsu