Patents by Inventor Takeshi Matsushita

Takeshi Matsushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4014037
    Abstract: A polycrystalline silicon layer as a passivation layer formed on a semiconductor single crystal layer in a semiconductor device and in which polycrystalline silicon layer contains 2 to 45 atomic percent of oxygen. This layer can be formed under accurate control by utilizing a mixed gas of nitrogen oxide as an oxygen supply source and a silicon compound as a silicon supply source is thermally decomposed. The polycrystalline silicon is constituted of grains comprising single crystals of silicon. Oxygen atoms are uniformly distributed in the grains. Substantially no SiO.sub.2 layer exists between the grains and the semiconductor single crystal layer.
    Type: Grant
    Filed: March 24, 1975
    Date of Patent: March 22, 1977
    Assignee: Sony Corporation
    Inventors: Takeshi Matsushita, Hisao Hayashi, Teruaki Aoki, Hisayoshi Yamoto, Yoshiyuki Kawada
  • Patent number: 4003072
    Abstract: A semiconductor device including a substrate of semiconductor material having charge carriers of one conductivity type and a main region of opposite conductivity type. A ring of said opposite conductivity type is disposed around the main region and an auxiliary region of said opposite conductivity type is disposed on the opposite surface of the substrate. The said rings and the said auxiliary region are spaced from the main region by distances that permit the depletion region of the main region to reach the ring and the auxiliary region when the main region is reversed biased with respect to the substrate.
    Type: Grant
    Filed: November 1, 1974
    Date of Patent: January 11, 1977
    Assignee: Sony Corporation
    Inventors: Takeshi Matsushita, Hisao Hayashi
  • Patent number: 3990100
    Abstract: A polycrystalline silicon layer provides an antireflective coating on a semiconductor surface of a photo-sensitive detector, the polycrystalline silicon layer containing from 25 to 45 atomic percent of oxygen and having a refractive index intermediate that of the semiconductor crystal and the exterior environment.
    Type: Grant
    Filed: October 2, 1975
    Date of Patent: November 2, 1976
    Assignee: Sony Corporation
    Inventors: Takayoshi Mamine, Takeshi Matsushita
  • Patent number: 3977019
    Abstract: A semiconductor integrated circuit, in which an isolation region with one conductivity type and a plurality of island regions with another conductivity type separated by the isolation region are provided, is disclosed. In this case, a high resistance polycrystalline semiconductor layer is formed to cover whole of a surface portion of a PN-junction formed between the isolation region and the island regions.
    Type: Grant
    Filed: May 14, 1974
    Date of Patent: August 24, 1976
    Assignee: Sony Corporation
    Inventors: Takeshi Matsushita, Yoshiyuki Kawana
  • Patent number: 3971061
    Abstract: A semiconductor device is provided having at least two semiconductor regions of opposite conductivity type and forming a planar-type PN junction. A field limiting ring is disposed spaced from the PN junction. A high-resistivity polycrystalline silicon layer covers the PN junction and the field limiting ring.
    Type: Grant
    Filed: May 15, 1974
    Date of Patent: July 20, 1976
    Assignee: Sony Corporation
    Inventors: Takeshi Matsushita, Hisao Hayashi, Yoshiyuki Kawana