Abstract: The present application discloses a scanning signal line drive circuit capable of reducing power consumption and narrowing a picture-frame while ensuring high-speed scanning for image display. First and second gate drivers 410, 420 are arranged to face each other via a display unit 500. Based on a DC buffer method, odd-numbered gate lines are driven by the first gate driver 410 while even-numbered gate bus lines are driven by the second gate driver 420, and when each gate bus line GLi is to be brought into a non-selected state, charges are released from both ends thereof. For this purpose, for example, the end portion of the odd-numbered gate bus line on the first gate driver side is connected to a buffer made up of the activation and inactivation transistors M10, M13L, and the end portion of the odd-numbered gate bus line on the second gate driver side is connected to the inactivation auxiliary transistor M13R.

Abstract: There is provided a configuration, including a storage unit that stores a theoretical driving wheel rotating speed based on a correspondence relationship with a predetermined engine speed in each gear stage of a transmission of a vehicle; gear stage detection means for detecting the gear stage when currently travelling; engine speed detection means for detecting an engine speed; driving wheel rotating speed detection means for detecting a driving wheel rotating speed; and torque control means for controlling output torque, in which the output torque is increased so that a current driving wheel rotating speed becomes close to the theoretical driving wheel rotating speed when a relative value of a calculated value which is calculated by using the detected driving wheel rotating speed with respect to a calculated value which is calculated by using the theoretical driving wheel rotating speed is equal to or greater than a first threshold value.

Abstract: A configuration in which a voltage (a gate on voltage) of only one system is used as a voltage for turning scanning lines to a selected state is employed (single power supply system configuration). A unit circuit that constitutes a shift register within a gate driver includes a thin film transistor whose source terminal is connected to an output control node. In such a configuration, when the external power supply is stopped, a voltage supplied to a gate terminal of the thin film transistor and a voltage supplied to a drain terminal of the thin film transistor are set to the gate on voltage.

Abstract: In accordance with codes of applications, it is determined whether the applications access predetermined privacy information due to permission, a first label is assigned to an application that is determined to make an access, and a second label to an application that is determined not to make an access. The score of each word is calculated such that a high score is set to a word that is included in the text of the description of the application, to which the first label is assigned, more often than in the text of the description of the application, to which the second label is assigned, and a predetermined number of words at the top with regard to the score is extracted. The application whose text of the description includes the extracted word is classified as an application that refers to the permission.

Abstract: A gas recovery system separates a mixed gas including a process gas and an inert gas. The gas recovery system includes a cooling section for cooling and liquefying the process gas contained in the mixed gas by cooling the mixed gas at a temperature higher than a condensation temperature of the inert gas and lower than a condensation temperature of the process gas, a separating section for separating the cooled mixed gas into the process gas in a liquid state and the inert gas in a gas state, and a process gas recovery line that is connected to the separating section which circulates and gasifies the liquid-state process gas and then supplies the process gas into the a compressor. The mixed gas is formed by mixing the process gas, which is compressed by the compressor, and the inert gas, which is supplied to a seal portion of the compressor.

Abstract: An active matrix substrate is provided with a gate driver including a multi-stage shift register (240). Each stage of the multi-stage shift register has a plurality of oxide semiconductor TFTs, a first input terminal for receiving a set signal, a second input terminal for receiving a clock signal, a third input terminal for receiving a clear signal, and an output terminal for outputting a gate output signal to one of the plurality of gate bus lines. The clock signal and the clear signal have the same high-level potential, and the clock signal and the clear signal have the same low-level potential. The plurality of oxide semiconductor TFTs include a first TFT (101) having a back-gate structure. The main gate electrode of the first TFT (101) is coupled to the third input terminal or a negative power supply voltage VSS. The back-gate electrode of the first TFT has a potential set to a positive power supply voltage VDD or a ground potential GND.

Abstract: A TFT circuit (101) includes a first node (N1) to which a first low potential (Vc) is supplied, a depression-type first TFT (21) which is arranged between the first node (N1) and low-potential wiring (11) for supplying a second low potential (Va) higher than the first low potential (Vc), and in which a drain terminal is connected to the first node, and a depression-type second TFT (22) which is arranged between the first TFT (21) and the low potential wiring (11) and in which a source terminal is connected to a source terminal of the first TFT, in which the first low potential (Vc) is supplied to a gate terminal of the second TFT, a second node (N2) enterable a floating state is formed between the source terminal of the first TFT and the source terminal of the second TFT, and the second node (N2) is connected to a sub-circuit (SC1) which is settable a potential of the second node (N2) to be lower than the second low potential (Va) and higher than the first low potential (Vc).

Abstract: An object of the present invention is to realize a shift register that can interrupt a scan without causing a display failure or an abnormal action. A plurality of unit circuits each constitutes corresponding one of a plurality of stages in a shift register (310), the unit circuits each including a first unit circuit (UCa) connected to a gate bus line (GL) and configured to output a shift pulse to the connected gate bus line (GL) and to a succeeding stage, and a second unit circuit (UCb) connected to none of the gate bus lines (GL) and configured to output a shift pulse to a succeeding stage.

Abstract: Each unit circuit includes a thin film transistor (first stabilization transistor) having a gate terminal to which a clear signal which goes to an on level when a frame period ends applied, a drain terminal connected to a charge holding node, and a source terminal to which a potential of an off level is applied. Here, a gate length of the thin film transistor is set to be larger than gate lengths of other charge holding node turn-off transistors. Alternatively, a multi-gate structure is adopted for the thin film transistor and a single gate structure is adopted for the other charge holding node turn-off transistors.

Abstract: Each unit circuit that constitutes each of stages of a shift register is provided with a charge supply unit including a third node whose potential becomes high level at identical timing with a first node (a node for holding an electric charge in order to output a scanning signal (output signal) at high level), and capable of supplying an electric charge to the first node throughout a period after the potential of the third node becomes high level until the scanning signal (output signal) at high level is outputted. Here, all of the unit circuits within the shift register have an identical configuration.

Abstract: An output control node stabilization portion includes a thin film transistor having a gate terminal to which is provided a fourth clock that changes to an on level at timing at which a scanning signal outputted from a previous stage is to change from an off level to an on level, a drain terminal connected to an output control node, and a source terminal to which the scanning signal outputted from the previous stage is provided; and a thin film transistor having a gate terminal to which is provided a third clock that changes to an on level at timing at which a scanning signal outputted from a subsequent stage is to change from an off level to an on level, a drain terminal connected to the output control node, and a source terminal to which the scanning signal outputted from the subsequent stage is provided.

Abstract: Oil console equipment includes: a lubrication oil tank in which a lubrication oil is stored; a lubrication oil supply line which is connected to the lubrication oil tank and through which a liquid lubrication oil stored in the lubrication oil tank is supplied to a bearing supporting a rotor; a first cooler which is provided in the lubrication oil supply line and cools the liquid lubrication oil supplied to the bearing; a lubrication oil recovery line which is connected to the lubrication oil tank and through which the lubrication oil recovered from the bearing is introduced into the lubrication oil tank; a first atmosphere discharge pipe which is connected to the lubrication oil tank and through which a lubrication oil mist which exists in a gas phase in the lubrication oil tank and is a misted lubrication oil and a first exhaust gas containing a gas are introduced out.

Abstract: A unit circuit 4 that forms each stage of a shift register is configured by a transfer unit 401 having substantially the same configuration as that of the conventional unit circuit, a state memory unit 402 configured to store a state of a first node N1 within the transfer unit 401 when suspension of scanning is performed, and a connecting unit 403 that connects the state memory unit 402 with the transfer unit 401 so that an electric charge based on an output signal QX from the state memory unit 402 is supplied to the first node N1. A clock operation of control clock signals CKX and CKXB for controlling an operation of the state memory unit 402 is performed when a clock operation of a gate clock signal is suspended.

Abstract: The present disclosure relates to an information processing apparatus, an information processing method, and a program making it possible to achieve camerawork corresponding to changes in various conditions when controlling multiple robot cameras. Position information about a subject is acquired, timing information indicating a passage of time is acquired, and on a basis of the timing information and the position information about the subject, camerawork control information controlling the camerawork of an image capture apparatus that captures the subject is generated. The present disclosure is applicable to a switcher apparatus that controls multiple robot cameras.

Abstract: This shooting system includes a plurality of cameras capable of capturing a subject that moves on a course from different directions, and a controller that receives a setting made by the user regarding a switch order of the plurality of cameras that temporally share continuous shooting of the subject that moves on the course, and switches output videos of the plurality of cameras in accordance with the set switch order.

Abstract: The invention has a purpose of improving applicability of a controller and a control method to a vehicle, the controller and the control method executing brake control in which primary information is selectively supplemented by secondary information that is information on an assumed state related to connection and disconnection of a clutch. A determination section 5A1 and a brake control section 5A4 are provided, the determination section 5A1 determining whether an actual state related to the connection and the disconnection of the clutch matches the assumed state in accordance with a relationship between the secondary information and travel state information indicative of a travel state of the vehicle, and the brake control section 5A4 executing the brake control by using the primary information but not the secondary information in the case where the determination section 5A1 determines that the actual state does not match the assumed state.

Abstract: A shift register is implemented that can increase the reliability of long-term operation regarding the driving of gate bus lines over a conventional configuration. The shift register is allowed to operate by clock signals of eight or more phases with an on-duty of less than ½. A stabilization node control portion brings a stabilization node (NB) to an on level for a period less than 50 percent of a normal operation period, based on two or more clock signals among the clock signals of eight or more phases, the stabilization node (NB) being connected to a gate terminal of a thin film transistor that contributes to the drawing of a potential of an output control node (NA) to a VSS potential.

Abstract: An object of the present invention is to realize a shift register that can interrupt a scan without causing a display failure or an abnormal action. A plurality of unit circuits each constitutes corresponding one of a plurality of stages in a shift register (310), the unit circuits each including a first unit circuit (UCa) connected to a gate bus line (GL) and configured to output a shift pulse to the connected gate bus line (GL) and to a succeeding stage, and a second unit circuit (UCb) connected to none of the gate bus lines (GL) and configured to output a shift pulse to a succeeding stage.

Abstract: To suppress occurrence of a wheelie of a motorcycle. A torque control apparatus includes a the detection unit that detects a state in which the front wheel of the motorcycle is likely to be lifted up based on at least one of engine information of the motorcycle, accelerator operation information of the driver of the motorcycle, and information of the vehicle body or wheel of the motorcycle. The torque control apparatus further includes an output unit that, when the detection unit detects the state in which the front wheel is likely to be lifted up, outputs a torque smaller than a request torque of the driver as a request torque for an the engine of the motorcycle or outputs the difference between the request torque of the driver and a torque smaller than the request torque of the driver as a brake torque.

Abstract: In accordance with codes of applications, it is determined whether the applications access predetermined privacy information due to permission, a first label is assigned to an application that is determined to make an access, and a second label to an application that is determined not to make an access. The score of each word is calculated such that a high score is set to a word that is included in the text of the description of the application, to which the first label is assigned, more often than in the text of the description of the application, to which the second label is assigned, and a predetermined number of words at the top with regard to the score is extracted. The application whose text of the description includes the extracted word is classified as an application that refers to the permission.