Patents by Inventor Tanmay Kumar

Tanmay Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7897453
    Abstract: An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. The diode is a metal-insulator diode having a first metal layer, a first insulating layer, a second insulating layer and a second metal layer. At least one asymmetric interface state is provided at the intersection of at least two of the layers to increase the ratio of the diode's on-current to its reverse bias leakage current. In various examples, the asymmetric interface state is formed by a positive or negative sheet charge that alters the barrier height and/or electric field at one or more portions of the diode. Two-terminal devices such as passive element memory cells can utilize the diode as a steering element in series with a state change element. The devices can be formed using pillar structures at the intersections of upper and lower conductors.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: March 1, 2011
    Assignee: SanDisk 3D LLC
    Inventors: Xiying Chen, Deepak Chandra Sekar, Mark Clark, Dat Nguyen, Tanmay Kumar
  • Publication number: 20110021019
    Abstract: The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the present invention can be used, for example, to connect the channel layer of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells formed above the first device level. Similarly, vias according to the present invention can be used to connect the wordline of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells.
    Type: Application
    Filed: October 4, 2010
    Publication date: January 27, 2011
    Inventors: Michael W. Konevecki, Usha Raghuram, Maitreyee Mahajani, Sucheta Nallamothu, Andrew J. Walker, Tanmay Kumar
  • Patent number: 7875871
    Abstract: In the present invention a metal oxide or nitride compound which is a wide-band-gap semiconductor abuts a silicon, germanium, or alloy of silicon and/or germanium of the opposite conductivity type to form a p-n heterojunction. This p-n heterojunction can be used to advantage in various devices. In preferred embodiments, one terminal of a vertically oriented p-i-n heterojunction diode is a metal oxide or nitride layer, while the rest of the diode is formed of a silicon or silicon-germanium resistor; for example a diode may include a heavily doped n-type silicon region, an intrinsic silicon region, and a nickel oxide layer serving as the p-type terminal. Many of these metal oxides and nitrides exhibit resistivity-switching behavior, and such a heterojunction diode can be used in a nonvolatile memory cell, for example in a monolithic three dimensional memory array.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: January 25, 2011
    Assignee: SanDisk 3D LLC
    Inventors: Tanmay Kumar, S. Brad Herner
  • Patent number: 7859887
    Abstract: A method of programming a nonvolatile memory cell includes applying at least one initialization pulse having a duration of at least 1 ms, followed by applying plural programming pulses having a duration of less than 1 ms. The cell includes a steering element located in series with a storage element, and the storage element includes a carbon material.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: December 28, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Xiying Chen, Tanmay Kumar
  • Publication number: 20100302836
    Abstract: In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HfxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.
    Type: Application
    Filed: August 12, 2010
    Publication date: December 2, 2010
    Inventors: S. Brad Herner, Tanmay Kumar, Christopher J. Petti
  • Patent number: 7840833
    Abstract: A system for managing a cluster of nodes, the cluster comprising a plurality of groups of nodes, each node being associated with a vote, the system further comprising an arbitration device, the arbitration device being associated with a number of votes dependent on the number of nodes in the cluster, each node further being associated with a cluster manager, one of the cluster managers for each group being operable: if the group is in communication with the arbitration device, to determine whether the group has the greatest number of votes, including the votes of the arbitration device; if the arbitration device is operative, but the group is not in communication with the arbitration device, to determine whether the group meets the quorum without adjusting the quorum; and if the arbitration device is not operative, to determine whether the group meets the quorum after adjusting the quorum.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: November 23, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shailendra Tripathi, Tanmay Kumar Pradhan, Akshay Nesari
  • Patent number: 7830698
    Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element. The storage element includes a carbon material and the memory cell includes a rewritable cell having multiple memory levels.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: November 9, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Xiying Chen, Bing K. Yen, Dat Nguyen, Huiwen Xu, George Samachisa, Tanmay Kumar, Er-Xuan Ping
  • Patent number: 7816659
    Abstract: A layer of resistivity-switching metal oxide or nitride can attain at least two stable resistivity states. Such a layer may be used in a state-change element in a nonvolatile memory cell, storing its data state, for example a “0” or a “1”, in this resistivity state. Including additional metal atoms in a layer of such a resistivity-switching metal oxide or nitride compound decreases the current required to cause switching between resistivity states, reducing power requirements for an array of memory cells storing data in the resistivity state of such a layer. In various embodiments a memory cell may include a layer of resistivity-switching metal oxide or nitride compound with added metal formed in series with another element, such as a diode or a transistor.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: October 19, 2010
    Assignee: SanDisk 3D LLC
    Inventors: S. Brad Herner, Tanmay Kumar
  • Patent number: 7812404
    Abstract: In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HFxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: October 12, 2010
    Assignee: SanDisk 3D LLC
    Inventors: S. Brad Herner, Tanmay Kumar, Christopher J. Petti
  • Patent number: 7800933
    Abstract: A nonvolatile memory cell comprising a diode formed of semiconductor material can store memory states by changing the resistance of the semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) In preferred embodiments, set pulses are applied with the diode under forward bias, while reset pulses are applied with the diode in reverse bias. By switching resistivity of the semiconductor material of the diode, a memory cell can be either one-time programmable or rewriteable, and can achieve two, three, four, or more distinct data states.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 21, 2010
    Assignee: Sandisk 3D LLC
    Inventors: Tanmay Kumar, S. Brad Herner, Roy E Scheuerlein, Christopher J Petti
  • Patent number: 7800939
    Abstract: A method of making a nonvolatile memory device includes forming a semiconductor diode steering element, and forming a semiconductor read/write switching element.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: September 21, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Tanmay Kumar, Christopher J. Petti
  • Patent number: 7800932
    Abstract: A nonvolatile memory cell comprising doped semiconductor material and a diode can store memory states by changing the resistance of the doped semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) Set pulses are of short duration and above a threshold voltage, while reset pulses are longer duration and below a threshold voltage. In some embodiments multiple resistance states can be achieved, allowing for a multi-state cell, while restoring a prior high-resistance state allows for an rewriteable cell. In some embodiments, the diode and a switchable memory formed of doped semiconductor material are formed in series, while in other embodiments, the diode itself serves as the semiconductor switchable memory element.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: September 21, 2010
    Assignee: Sandisk 3D LLC
    Inventors: Tanmay Kumar, S. Brad Herner
  • Patent number: 7800934
    Abstract: A method of operating a nonvolatile memory cell includes providing the nonvolatile memory cell comprising a diode which is fabricated in a first resistivity, unprogrammed state, and applying a forward bias to the diode having a magnitude greater than a minimum voltage required for programming the diode to switch the diode to a second resistivity, programmed state. The second resistivity state is lower than the first resistivity state.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: September 21, 2010
    Assignee: Sandisk 3D LLC
    Inventors: Tanmay Kumar, S. Brad Herner, Christopher J. Petti
  • Patent number: 7759666
    Abstract: A nonvolatile memory device includes a semiconductor diode steering element, and a semiconductor read/write switching element.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: July 20, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Tanmay Kumar, Christopher J. Petti
  • Publication number: 20100176366
    Abstract: A nonvolatile memory cell includes a storage element, the storage element comprising a carbon material, a steering element located in series with the storage element, and a metal silicide layer located adjacent to the carbon material. A method of making a device includes forming a metal silicide over a silicon layer, forming a carbon layer over the metal silicide layer, forming a barrier layer over the carbon layer, and patterning the carbon layer, the metal silicide layer, and the silicon layer to form an array of pillars.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 15, 2010
    Inventors: Chu-Chen Fu, Tanmay Kumar, Er-Xuan Ping, Huiwan Xu
  • Publication number: 20100157652
    Abstract: A method of programming a memory cell comprises applying a reverse bias to the memory cell using a temporary resistor in series with the memory cell. The memory cell comprises a diode and a resistivity switching material element in series. The state of the resistivity switching material element changes from a first initial state to a second state different from the first state.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 24, 2010
    Inventors: Yibo Nian, Tanmay Kumar, Roy E. Scheuerlein
  • Publication number: 20100157651
    Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element, where the storage element comprises a carbon material. A method of programming the cell includes applying a reset pulse to change a resistivity state of the carbon material from a first state to a second state which is higher than the first state, and applying a set pulse to change a resistivity state of the carbon material from the second state to a third state which is lower than the second state. A fall time of the reset pulse is shorter than a fall time of the set pulse.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 24, 2010
    Inventors: Tanmay Kumar, Xiying Chen
  • Publication number: 20100148324
    Abstract: An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. The diode is a metal-insulator diode having a first metal layer, a first insulating layer, a second insulating layer and a second metal layer. At least one asymmetric interface state is provided at the intersection of at least two of the layers to increase the ratio of the diode's on-current to its reverse bias leakage current. In various examples, the asymmetric interface state is formed by a positive or negative sheet charge that alters the barrier height and/or electric field at one or more portions of the diode. Two-terminal devices such as passive element memory cells can utilize the diode as a steering element in series with a state change element. The devices can be formed using pillar structures at the intersections of upper and lower conductors.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 17, 2010
    Inventors: Xiying Chen, Deepak Chandra Sekar, Mark Clark, Dat Nguyen, Tanmay Kumar
  • Publication number: 20100142256
    Abstract: A method of programming a nonvolatile memory cell. The nonvolatile memory cell includes a diode steering element in series with a carbon storage element The method includes providing a first voltage to the nonvolatile memory cell. The first voltage reverse biases the diode steering element. The carbon storage element sets to a lower resistivity state.
    Type: Application
    Filed: February 10, 2010
    Publication date: June 10, 2010
    Inventors: Tanmay KUMAR, Roy E. Scheuerlein, Pankaj Kalra, Jingyan Zhang
  • Patent number: 7723180
    Abstract: A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon resistivity switching material electrically contacts the steering element, and forming a second electrode.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: May 25, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Xiying Chen, Chuanbin Pan, Tanmay Kumar, Er-Xuan Ping