Patents by Inventor Tao Cheng

Tao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9625520
    Abstract: Latch-up test device and method are provided, and the method includes following steps. A set operation is performed for setting a basic test value according to a test range and setting a trigger pulse and a predetermined error value by the basic test value. A test on a test chip in a wafer under test is performed by the trigger pulse, and whether the test chip is in a latch-up state is determined. Whether to update a test range and a latch-up threshold value and whether to return to the step of performing the set operation are determined according to a determination result, the latch-up threshold value and the basic test value. When the test chip is in the latch-up state and a difference between the latch-up threshold value and the basic test value is not greater than the predetermined error value, the test on the test chip is stopped.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: April 18, 2017
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Shih-Yu Wang, Yao-Wen Chang, Tao-Cheng Lu
  • Publication number: 20170084541
    Abstract: A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.
    Type: Application
    Filed: May 24, 2016
    Publication date: March 23, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Patent number: 9597752
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: March 21, 2017
    Assignee: MEDIATEK INC.
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Patent number: 9594831
    Abstract: A targeted disambiguation system is described herein which determines true mentions of a list of named entities in a collection of documents. The list of named entities is homogenous in the sense that the entities pertain to the same subject matter domain. The system determines the true mentions by leveraging the homogeneity in the list, and, more specifically by applying a context similarity hypothesis, a co-mention hypothesis, and an interdependency hypothesis. In one implementation, the system executes its analysis using a graph-based model. The system can operate without the existence of additional information regarding the entities in the list; nevertheless, if such information is available, the system can integrate it into its analysis.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: March 14, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chi Wang, Kaushik Chakrabarti, Tao Cheng, Surajit Chaudhuri
  • Patent number: 9574878
    Abstract: A terminal device is described that includes a housing configured to accommodate various components of the terminal device; a first sensing unit configured to collect first status information of the terminal device; a second sensing unit configured to collect second status information of the terminal device; and a processing unit configured to determine a manner that a user holds the terminal device based on the first status information and the second status information.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: February 21, 2017
    Assignee: LENOVO (BEIJING) CO., LTD.
    Inventors: Qian Zhao, Hanfeng Zheng, Hao Chen, Yufei Zhang, Chenghu Wu, Tao Cheng, Xiaofei Xu, Xiaoming Liu
  • Publication number: 20170040292
    Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.
    Type: Application
    Filed: May 24, 2016
    Publication date: February 9, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng
  • Publication number: 20170031579
    Abstract: According to the present invention, a terminal executes a program correlated to content displayed in a window, etc., of a browser operating in the terminal. When the content is loaded into the window, etc., by execution of the program, the terminal registers a callback function by a window.requestAnimationFrame method assigned to the window, etc. When the callback function is invoked, the terminal determines, on the basis of an interval of timestamps at which the callback function is invoked with respect to the window, etc., whether or not the window, etc., is being browsed by a user, and re-registers the callback function by the window.requestAnimationFrame method assigned to the window, etc.. The terminal intermittently notifies a server of the result of the determination.
    Type: Application
    Filed: February 27, 2015
    Publication date: February 2, 2017
    Inventors: Tao CHENG, Martin MIRANDA
  • Patent number: 9556015
    Abstract: The present disclosure provides a substrate structure for a micro electro mechanical system (MEMS) device. The substrate structure includes a cap and a micro electro mechanical system (MEMS) substrate. The cap has a cavity, and the MEMS substrate is disposed on the cap. The MEMS substrate has a plurality of through holes exposing the cavity, and an aspect ratio of the through hole is greater than 30.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 31, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsai-Hao Hung, Shih-Chi Kuo, Tsung-Hsien Lee, Tao-Cheng Liu
  • Publication number: 20170010321
    Abstract: Latch-up test device and method are provided, and the method includes following steps. A set operation is performed for setting a basic test value according to a test range and setting a trigger pulse and a predetermined error value by the basic test value. A test on a test chip in a wafer under test is performed by the trigger pulse, and whether the test chip is in a latch-up state is determined. Whether to update a test range and a latch-up threshold value and whether to return to the step of performing the set operation are determined according to a determination result, the latch-up threshold value and the basic test value. When the test chip is in the latch-up state and a difference between the latch-up threshold value and the basic test value is not greater than the predetermined error value, the test on the test chip is stopped.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 12, 2017
    Inventors: Shih-Yu Wang, Yao-Wen Chang, Tao-Cheng Lu
  • Publication number: 20160372269
    Abstract: The present invention provides a resin composition comprising: 1 to 20 parts by weight of a reinforcing fiber; 0.2 to 5 parts by weight of an anti-settling agent; 20 to 40 parts by weight of an epoxy resin; 0.1 to 3 parts by weight of a curing agent; and 50 to 75 parts by weight of a high dielectric constant filler. The present invention further provides a dielectric layer produced from the resin composition and a capacitor comprising the dielectric layer. In the dielectric layer made from the resin composition provided by the present invention, the fibers can be evenly dispersed and can enhance the mechanical strength of the resin composition, and cooperate with the epoxy resin to bring excellent toughness. Therefore, the mechanical strength of the produced dielectric layer can be remarkably improved, and its fragility can be effectively overcome when the dielectric layer is used in the PCB double-side etching process.
    Type: Application
    Filed: August 30, 2016
    Publication date: December 22, 2016
    Inventors: Tao Cheng, Qilin Chen, Zhou Jin
  • Patent number: 9509137
    Abstract: An electrostatic discharge protection device including a PNP transistor, a protection circuit and an adjustment circuit is provided. An emitter of the PNP transistor is electrically connected to a pad, and a collector of the PNP transistor is electrically connected to a ground. The protection circuit is electrically connected between a base of the PNP transistor and the ground, and provides a discharge path. When an electrostatic signal occurs on the pad, the electrostatic signal is conducted to the ground through the discharge path and the PNP transistor. The adjustment circuit is electrically connected between the emitter and the base of the PNP transistor. When a power voltage is supplied to the pad, the adjustment circuit provides a control voltage to the base of the PNP transistor according to the power voltage, so as to prevent the emitter and the base of the PNP transistor from being forward biased.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: November 29, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Shih-Yu Wang, Tao-Cheng Lu, Yao-Wen Chang
  • Patent number: 9483137
    Abstract: A touch mouse including a pressure sensing region, a touch sensing region, and a control unit is disclosed. The pressure sensing region is disposed at a first side and a second side of the touch mouse, and the touch sensing region covers at least the pressure sensing region at the first side. The first side is opposite to the second side. When the user clicks the pressure sensing region, it generates a pressure sensing signal. When the user clicks the touch sensing region, it generates a touch sensing signal. When the pressure sensing signal and the touch sensing signal are generated, the control unit outputs a first clicking signal representing that the first side is clicked. When the pressure sensing signal is generated but the touch sensing signal is not, the control unit outputs a second clicking signal representing that the second side is clicked.
    Type: Grant
    Filed: February 1, 2014
    Date of Patent: November 1, 2016
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventor: Tao-Cheng Yen
  • Patent number: 9460928
    Abstract: A semiconductor device manufacturing method includes preparing a wafer having projections formed on a substrate. The projections project upward from a surface of the substrate and have a height measured from the surface of the substrate. The method further includes determining an interval distribution representing a distribution of intervals between neighboring projections and calculating an implantation angle based on the height and the interval distribution. The implantation angle is an angle between a normal direction of the substrate and an implantation direction. The method also includes implanting ions at the calculated implantation angle.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: October 4, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen-Han Chou, I-Chen Yang, Yao-Wen Chang, Tao-Cheng Lu
  • Patent number: 9455088
    Abstract: The present invention provides a resin composition comprising: 1 to 20 parts by weight of a reinforcing fiber; 0.2 to 5 parts by weight of an anti-settling agent; 20 to 40 parts by weight of an epoxy resin; 0.1 to 3 parts by weight of a curing agent; and 50 to 75 parts by weight of a high dielectric constant filler. The present invention further provides a dielectric layer produced from the resin composition and a capacitor comprising the dielectric layer. In the dielectric layer made from the resin composition provided by the present invention, the fibers can be evenly dispersed and can enhance the mechanical strength of the resin composition, and cooperate with the epoxy resin to bring excellent toughness. Therefore, the mechanical strength of the produced dielectric layer can be remarkably improved, and its fragility can be effectively overcome when the dielectric layer is used in the PCB double-side etching process.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: September 27, 2016
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Tao Cheng, Qilin Chen, Zhou Jin
  • Publication number: 20160276274
    Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.
    Type: Application
    Filed: May 31, 2016
    Publication date: September 22, 2016
    Inventors: Ching-Chung KO, Tao CHENG, Tien-Yueh LIU, Ta-Hsi CHOU, Peng-Cheng KAO, Ling-Wei KE
  • Publication number: 20160263709
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: October 21, 2015
    Publication date: September 15, 2016
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Patent number: 9443955
    Abstract: Provided is a semiconductor device. Two stack layers are disposed on a substrate of a first conductivity type. Each of stack layers includes a dielectric layer and a conductive layer. The dielectric layer is disposed on the substrate. The conductive layer is disposed on the dielectric layer. First doped region of a second conductivity type has a first dopant and is disposed in the substrate between the stack layers. A pre-amorphization implantation (PAI) region is disposed in the first doped region. A second doped region of the second conductivity type has a second dopant and is disposed in the PAI region. The first conductivity type is different from the second conductivity type. A diffusion rate of the second dopant is faster than a diffusion rate of the first dopant, and a thermal activation of the second dopant is higher than that of the first dopant.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: September 13, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Guan-Wei Wu, Yao-Wen Chang, I-Chen Yang, Tao-Cheng Lu
  • Patent number: 9437303
    Abstract: A programming method of a memory array is provided and includes following steps, wherein the memory array includes a target memory cell and two periphery memory cells electrically connected to a first word line. After a first programming operation is performed on the target memory cell, the target memory cell and the two periphery memory cells are verified to obtain a first verification result. Whether to perform a second programming operation or a third programming operation on the target memory cell is determined according to the first verification result. The step of performing the second programming operation or the third programming operation on the target memory cell includes: turning off a first transistor and a second transistor; and increasing a level of a passing voltage for turning on a plurality of non-target memory cells and a level of a programming voltage transmitted by the first word line.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: September 6, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chu-Yung Liu, Hsing-Wen Chang, Yao-Wen Chang, Tao-Cheng Lu
  • Patent number: 9424885
    Abstract: A pre-processing method for video data playback and a playback interface apparatus are provided, wherein a video receiver module receives a video data with clips, the clips corresponding to numbers in first and second time-sequences, and wherein a display module creates a corresponding GUI component for each clip and arranges the GUI components in the playback interface. When two clips consecutive in the first time-sequence are not consecutive in the second, the display module places their corresponding GUI components separately or distinguishably. By discerning the several time-sequences of the video data, this invention ensures random access of data while being visually intuitive and uniform design-wise.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: August 23, 2016
    Assignee: VIVOTEK INC.
    Inventors: Chien-Wen Liu, Ting-Wen Chen, Tao-Cheng Yang
  • Publication number: 20160241021
    Abstract: An electrostatic discharge protection device that includes a plurality of voltage drop elements, an impedance element, a driving circuit, and a clamping circuit is provided. The voltage drop elements are electrically connected in series between a first line and a node, and the voltage drop elements are configured to define an activating voltage. If a signal from the first line is greater than the activating voltage, the voltage drop elements conduct the first line to the node in response to the signal from the first line. The impedance element is electrically connected between the node and a second line. The driving circuit amplifies a control signal from the node and accordingly generates a driving signal. The clamping circuit determines whether to generate a discharging path between the first line and the second line according to the driving signal.
    Type: Application
    Filed: February 17, 2015
    Publication date: August 18, 2016
    Inventors: Shih-Yu Wang, Chieh-Wei He, Yao-Wen Chang, Tao-Cheng Lu