Patents by Inventor Tao Cheng

Tao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180272866
    Abstract: A vehicle dashboard structure is provided. A steering unit of a vehicle is provided with a screen-included dashboard. The screen-included dashboard includes a screen-based display zone, which is operable to display different message modes. The steering unit includes a steering grip, which is provided with a control operator seat, which is provided with a control operator module that is operable to control the screen-based display zone for switching of the different message displaying mode. As such, one the one hand, switching of the display mode contents of the screen-based display zone is made easy to ensure riding safety of a rider, and on the other hand, the space of the control operator seat that is provided on the steering grip can be better used.
    Type: Application
    Filed: July 11, 2017
    Publication date: September 27, 2018
    Inventors: YI-YANG TSAI, NAI-KUN YEH, CHENG-TAO CHENG
  • Publication number: 20180250305
    Abstract: Provided are a type of compounds that can be used for treating cardiovascular diseases and compositions containing the compounds. The compounds and the compositions can improve lipid metabolism disorders by increasing high-density lipoprotein cholesterol in blood; in addition, the compounds and the compositions can also release nitric oxide, and reduce the onset risk of cardiovascular diseases by means of relaxing blood vessels, lowering blood pressure, inhibiting platelet adhesion and aggregation and maintaining vascular tension, and thus play an important role in preventing and treating the occurrence and development of cardiovascular diseases.
    Type: Application
    Filed: September 6, 2016
    Publication date: September 6, 2018
    Applicants: ZHEJIANG HUAHAI PHARMACEUTICAL CO., LTD., SHANGHAI SYNERGY PHARMACEUTICAL SCIENCES CO., LTD
    Inventors: Jian GE, Yunfei LI, Zhen ZHANG, Yijin WANG, Jiamiao WANG, Tao CHENG
  • Publication number: 20180248445
    Abstract: A rotor assembly, which includes a rotor casing (1); a rotor shaft (2) with an external thread, the rotor shaft (2) being installed inside the rotor casing (1); a magnet (3), the magnet (3) being installed outside the rotor casing (1); and a telescopic shaft (4), the telescopic shaft (4) being mounted on the external thread of the rotor shaft (2) via an internal thread on an inner surface of the telescopic shaft. The rotor assembly according to the present device has the advantages of being long, having few components, the manufacturing cost being low, and the linear accuracy being high.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 30, 2018
    Applicant: Continental Automotive GmbH
    Inventors: Kun CHEN, Tao CHENG
  • Publication number: 20180248444
    Abstract: A stator assembly, having a stator formed by a plurality of pole pieces by means of injection overmolding, a columnar connection portion protruding outward being provided on an edge of one of the pole pieces; a mounting groove located at a side face of the stator; a coil wound around the stator; a pin connector with a ground pin, the pin connector being press-fitted onto the mounting groove in the direction perpendicular to the axial direction of the stator; and a magnetically conductive ring, the stator, which is mounted with the coil and the pin connector, being pressed into the magnetically conductive ring. The stator assembly has the features of having few parts and being convenient to assemble.
    Type: Application
    Filed: March 20, 2018
    Publication date: August 30, 2018
    Applicant: Continental Automotive GmbH
    Inventors: Kun CHEN, Tao CHENG
  • Publication number: 20180228763
    Abstract: The present invention provides a method for treating leukemia utilizing somatic cell reprogramming. The method includes a step of introduction of somatic cell reprogramming inducing factors Oct-4, Sox-2, Klf4 and c-Myc (OSKM for short) into leukemic cells or a step of utilizing small reprogramming molecules in in-vitro culture. It promotes leukemic cells to initiate process of somatic cell reprogramming in order to induce apoptosis and finally purpose of eliminating leukemic cells in-vivo or in-vitro is achieved. It provides new ideas and methods for clinical treatment of leukemia in the future.
    Type: Application
    Filed: July 22, 2016
    Publication date: August 16, 2018
    Applicant: Institute of Hematology and Blood Disease Hospital Chinese Academy of Medical Sciences and Peking
    Inventors: Tao CHENG, Hui CHENG, Yajie WANG, Hongyan ZHANG, Yawei ZHENG, Sha HAO
  • Patent number: 10032131
    Abstract: A data service system is described herein which processes raw data assets from at least one network-accessible system (such as a search system), to produce processed data assets. Enterprise applications can then leverage the processed data assets to perform various environment-specific tasks. In one implementation, the data service system can generate any of: synonym resources for use by an enterprise application in providing synonyms for specified terms associated with entities; augmentation resources for use by an enterprise application in providing supplemental information for specified seed information; and spelling-correction resources for use by an enterprise application in providing spelling information for specified terms, and so on.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: July 24, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Tao Cheng, Kris Ganjam, Kaushik Chakrabarti, Zhimin Chen, Vivek R. Narasayya, Surajit Chaudhuri
  • Patent number: 10002833
    Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: June 19, 2018
    Assignee: MediaTek Inc.
    Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
  • Publication number: 20180114779
    Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.
    Type: Application
    Filed: December 20, 2017
    Publication date: April 26, 2018
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng
  • Patent number: 9908203
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: March 6, 2018
    Assignee: MEDIATEK INC.
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Patent number: 9905515
    Abstract: The present invention provides an integrated circuit (IC) package with stress releasing structure. The IC package comprises: a metal plane, a substrate, an IC chip, and an IC fill layer. The metal plane has at least one first etching line for separating the metal plane into a plurality of areas. The substrate is formed on metal layer. The IC chip is formed on the substrate, and the IC fill layer is formed around the IC chip. The at least one first etching line forms at least one half cut line in the metal plane and the substrate.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: February 27, 2018
    Assignee: MediaTek Inc.
    Inventors: Chin-Chiang Chang, Tao Cheng
  • Patent number: 9881902
    Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: January 30, 2018
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng
  • Publication number: 20170338183
    Abstract: A manufacturing method of a semiconductor package includes the follow steps. Firstly, a carrier is provided. Then, a package substrate is formed. Then, a first electronic component is disposed above the second conductive layer of the package substrate. Then, a second package body encapsulating the first electronic component and the second conductive layer is formed. Then, the carrier is carried. Wherein in the step of forming the package substrate includes a step of forming a first conductive layer on the carrier, a step of forming a first pillar layer on the first conductive layer, a step of forming a first package body encapsulating the first conductive layer and the first pillar layer and a step of forming a second conductive layer on the first pillar layer.
    Type: Application
    Filed: August 9, 2017
    Publication date: November 23, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Patent number: 9779880
    Abstract: The present invention provides a resin composition comprising: 1 to 20 parts by weight of a reinforcing fiber; 0.2 to 5 parts by weight of an anti-settling agent; 20 to 40 parts by weight of an epoxy resin; 0.1 to 3 parts by weight of a curing agent; and 50 to 75 parts by weight of a high dielectric constant filler. The present invention further provides a dielectric layer produced from the resin composition and a capacitor comprising the dielectric layer. In the dielectric layer made from the resin composition provided by the present invention, the fibers can be evenly dispersed and can enhance the mechanical strength of the resin composition, and cooperate with the epoxy resin to bring excellent toughness. Therefore, the mechanical strength of the produced dielectric layer can be remarkably improved, and its fragility can be effectively overcome when the dielectric layer is used in the PCB double-side etching process.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: October 3, 2017
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Tao Cheng, Qilin Chen, Zhou Jin
  • Patent number: 9774615
    Abstract: Techniques for detecting anomalous network traffic are disclosed. In one particular embodiment, the techniques may be realized as a method for detecting anomalous network traffic comprising the steps of receiving a list including a plurality of processes and, for each process, a list of approved types of network traffic; monitoring network traffic of each process on the list of processes; upon detecting network traffic for a process on the list of processes, determining that the type of network traffic detected is not on the list of approved types for that process; and identifying the process as infected based on determining that the type of network traffic detected is not on the list of approved types for that process.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: September 26, 2017
    Assignee: Symantec Corporation
    Inventors: Kevin Alejandro Roundy, Jie Fu, Tao Cheng, Zhi Kai Li, Fanglu Guo, Sandeep Bhatkar
  • Publication number: 20170263559
    Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.
    Type: Application
    Filed: May 25, 2017
    Publication date: September 14, 2017
    Applicant: MediaTek Inc.
    Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
  • Patent number: 9761534
    Abstract: A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: September 12, 2017
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Patent number: 9698102
    Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: July 4, 2017
    Assignee: MediaTek Inc.
    Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
  • Publication number: 20170154137
    Abstract: A device may detect a user interaction, via a user interface, with a particular component of a model. The device may generate a set of components, associated with the particular component, based on detecting the user interaction with the particular component of the model. The device may cause a representation of the set of components to be provided, via the user interface, in association with the model. The representation may indicate that the set of components are associated with permitting interoperability.
    Type: Application
    Filed: October 19, 2016
    Publication date: June 1, 2017
    Inventors: Mojdeh SHAKERI, Tao Cheng, Robert O. Aberg, Michael D. Tocci, Jamieson M. Cobleigh, Haihua Feng, Kaushik Krishnasamy
  • Publication number: 20170136582
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Publication number: 20170129767
    Abstract: The present disclosure provides a substrate structure for a micro electro mechanical system (MEMS) device. The substrate structure includes a cap and a micro electro mechanical system (MEMS) substrate. The cap has a cavity, and the MEMS substrate is disposed on the cap. The MEMS substrate has a plurality of through holes exposing the cavity, and an aspect ratio of the through hole is greater than 30.
    Type: Application
    Filed: January 20, 2017
    Publication date: May 11, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Tsai-Hao HUNG, Shih-Chi KUO, Tsung-Hsien LEE, Tao-Cheng LIU