Patents by Inventor Tao Yang

Tao Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250045503
    Abstract: Systems, methods, and devices are disclosed herein for developing a cell design. Operations of a plurality of electrical cells are simulated to collect a plurality of electrical parameters. A machine learning model is trained using the plurality of electrical parameters. The trained machine learning model receives data having cell layout design constraints. The trained machine learning model determines a cell layout for the received data based on the plurality of electrical parameters. The cell layout is provided for further characterization of electrical performance within the cell layout design constraints.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 6, 2025
    Inventors: Wen-Shen Chou, Jie-Ren Huang, Yu-Tao Yang, Yung-Chow Peng, Yung-Hsu Chuang
  • Publication number: 20250040226
    Abstract: The present disclosure provides a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device includes: a substrate; an insulating layer provided with a plurality of trenches extending in a first direction; a first electrode layer and a second electrode layer, where a spacing region is provided between the first electrode layer and the second electrode layer; a semiconductor layer covering bottom portions and sidewalls of all channel trenches, where the channel trenches are at least a part of trench bodies of the trenches located in the spacing region; a gate dielectric layer covering a surface of the semiconductor layer in the channel trenches on a side away from the bottom portions and the sidewalls of the channel trenches; a gate layer, where at least a part of the channel trenches are fully filled with the gate layer.
    Type: Application
    Filed: July 26, 2024
    Publication date: January 30, 2025
    Inventors: Junjie LI, Gaobo Xu, Na Zhou, Chenchen Zhang, Jianfeng Gao, Yihong Lu, Tao Yang, Junfeng Li, Jun Luo, Rui Chen
  • Patent number: 12210129
    Abstract: A method of mapping reservoir fluid in a mature field includes identifying a region of interest within a hydrocarbon field, drilling a plurality of production wells through the region of interest, and collecting mud gas data as each production well is drilled. This mud gas data is used to generate a reservoir fluid property log, such as gas-oil ratio log, along a length of each of the production wells, which is in turn used to generate a refined model based on the 4D seismic data. The refined model permits better reservoir fluid mapping and has an improved vertical resolution at the region of interest than the first model of the field.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: January 28, 2025
    Assignee: EQUINOR ENERGY
    Inventor: Tao Yang
  • Patent number: 12203918
    Abstract: The present disclosure relates to techniques for prediction of reservoir fluid properties of a hydrocarbon reservoir fluid, such as the density, the saturation pressure, the formation volume factor and the gas-oil ratio of the reservoir fluid. To predict the reservoir fluid properties, a model is generated by selecting a subset of available reservoir samples based on a degree of biodegradation of the samples, generating an input data set comprising input data and target data, the input data comprising measured or predicted mud-gas data; and generating a model using the input data. The application of this technique allows a continuous log of the selected property to be generated using mud-gas data collected during the well drilling process.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: January 21, 2025
    Assignee: Equinor Energy AS
    Inventors: Tao Yang, Ibnu Hafidz Arief, Martin Niemann, Thibault Forest, Knut Kristian Meisingset
  • Patent number: 12205649
    Abstract: A method for data erasing of a non-volatile memory device is disclosed. The memory includes multiple memory cell strings each including a select gate transistor and multiple memory cells that are connected in series. The method comprises applying a step erase voltage to one memory cell string for an erase operation, the step erase voltage having a step-rising shaped voltage waveform. The method further comprises, during a period when the step erase voltage rises from an intermediate level to a peak level, raising a voltage of the select gate transistor from a starting level to a peak level, and raising a voltage of a predetermined region from a starting level to a peak level, such that a gate-induced drain leakage current is generated in the one memory cell string. The predetermined region is adjacent to the at least one select gate transistor and includes at least one memory cell.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: January 21, 2025
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Tao Yang, Dongxue Zhao, Lei Liu, Kun Zhang, Wenxi Zhou, Zhiliang Xia, Zongliang Huo
  • Publication number: 20250019809
    Abstract: The present invention relates to a carbon-doped alloy steel with super room-temperature ductility, the carbon-doped alloy steel includes a chemical composition including 10-30 wt. % of nickel (Ni), 0.01-5 wt. % of silicon (Si), 0.01-2 wt. % of carbon (C), and 60-90 wt. % of iron (Fe). Different from traditional super-plastic alloys that could only obtain superplasticity at high homologous temperatures, the present invention introduces a super-ductile steel that exhibits a giant uniform elongation of over 100% at room temperature. Meanwhile, different from deformation softening in super-plastic alloys, super-ductile steels show an exceptional work-hardening capability, enabling them to obtain enough strength for application.
    Type: Application
    Filed: July 16, 2023
    Publication date: January 16, 2025
    Inventors: Tao YANG, Qian LI
  • Publication number: 20250021737
    Abstract: Techniques for generating one or more non-final layouts for an analog integrated circuit are disclosed. The techniques include generating a non-final layout of an analog integrated circuit based on device specifications, partitioning the non-final layout into a plurality of subcells, merging the verified sub-cells to form a merged layout of the analog integrated circuit, and performing quality control checks on the merged layout. Additionally or alternatively, generating the non-final layout can include determining an allowable spacing between adjacent cells of different cell types or inserting one or more filler cells into a filler zone in the non-final layout.
    Type: Application
    Filed: July 30, 2024
    Publication date: January 16, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Tao Yang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang
  • Patent number: 12199086
    Abstract: A method of generating a layout design of an integrated circuit includes forming an active zone and partitioning the active zone into a center portion between a first side portion and a second side portion. The method also includes forming a plurality of gate-strips and forming a routing line. The plurality of gate-strips includes a first group of gate-strips intersecting the active zone over first channel regions in the center portion, a second group of gate-strips intersecting the active zone over second channel regions in the center portion, a third group of gate-strips intersecting the active zone over third channel regions in the first side portion, and a fourth group of gate-strips intersecting the active zone over fourth channel regions in the second side portion.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: January 14, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Tao Yang, Wen-Shen Chou, Yung-Chow Peng
  • Publication number: 20250016985
    Abstract: A memory device includes a vertical transistor including a semiconductor body extending in a first direction. The semiconductor body includes a doped source, a doped drain, and a channel portion. The memory device further includes a storage unit coupled to one of the source and the drain, a word line extending in a second direction perpendicular to the first direction, and a body line coupled to the channel portion of the semiconductor body. The word line is between the storage unit and the body line in the first direction.
    Type: Application
    Filed: September 18, 2024
    Publication date: January 9, 2025
    Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Tao Yang, Dongxue Zhao, Yuancheng Yang, Zhiliang Xia, Zongliang Huo
  • Publication number: 20250009144
    Abstract: A crib includes a body and a support frame supporting the body. The support frame includes a lower frame, an upper frame and an operating module. The lower frame is configured to stand on a plane and has a lower support rod. The upper frame is connected to the body and has an upper support rod. The upper support rod and the lower support rod are sleeved with each other. The upper support rod is capable of moving upward and downward with respect to the lower support rod. The operating module is connected to the lower support rod and the upper support rod and configured to lock and unlock the upper support rod and the lower support rod.
    Type: Application
    Filed: June 15, 2022
    Publication date: January 9, 2025
    Applicant: Wonderland Switzerland AG
    Inventor: Tao YANG
  • Publication number: 20250006822
    Abstract: A method for manufacturing a gate-all-around TFET device. The method comprises: forming, on a substrate, a channel stack comprising channel layer(s) and sacrificial layer(s) that alternate with each other; forming, on the substrate, a dummy gate astride the channel stack; forming a first spacer at a surface of the dummy gate; etching the sacrificial layer(s) to form recesses on side surfaces of the channel stack; forming second spacers in the recesses, respectively; fabricating a source and a drain separately, where a region for fabricating the source is shielded by a dielectric material when fabricating the drain, and a region for fabricating the drain is shielded by another dielectric material when fabricating the source; etching the dummy gate and the sacrificial layer(s) to form a space for a surrounding gate; and fabricating a surrounding dielectric-metal gate in the space.
    Type: Application
    Filed: November 27, 2023
    Publication date: January 2, 2025
    Inventors: Na Zhou, Junjie Li, Jianfeng Gao, Tao Yang, Junfeng Li, Jun Luo
  • Publication number: 20250007594
    Abstract: Various example embodiments relate to devices and methods supporting beam selection adaptive to user equipment distribution. A network device may be configured to sweep a first set of beams predefined for a cell, determine one or more supplement beams for one or more user equipments in the cell, and sweep at least a portion of the one or more supplement beams. The one or more supplement beams are selected from a second set of beams different from the first set of beams.
    Type: Application
    Filed: November 25, 2021
    Publication date: January 2, 2025
    Applicant: Nokia Solutions and Networks Oy
    Inventors: Yan ZHAO, Hao LIU, Stefan WESEMANN, Nuan SONG, Rana AHMED SALEM, Tao YANG
  • Publication number: 20250003858
    Abstract: A method for background detection of a sample pipeline of a sample processor, a sample processor and a computer-readable medium are provided. The sample pipeline is configured to connect a sample probe for aspirating a sample out of a sample container to a flow cell. The method includes the following steps executed by a control device: supplying sheath liquid to the flow cell via the sample pipeline; and detecting the sheath liquid flowing through the flow cell to obtain background detection data. The method according to the present disclosure performs background detection on sample pipeline of the sample processor by using sheath liquid, omitting preparation of a specialized fluid for background detection, significantly reducing costs and avoiding introduction of impurities to increase the background when the specialized fluid is loaded into the sample processor. Therefore, the detection precision and accuracy of the sample processor can be improved.
    Type: Application
    Filed: June 7, 2024
    Publication date: January 2, 2025
    Applicant: Beckman Coulter Biotechnology (Suzhou) Co., Ltd.
    Inventors: Qi GU, Linqun TANG, Yi GUO, Tao YANG
  • Publication number: 20240416547
    Abstract: An energy storage mechanism and a nail gun having the same. The energy storage mechanism is coupled with a striking mechanism for striking nails out of the nail gun along a striking direction. The energy storage mechanism comprises an energy storage member comprising an air chamber for containing air; an inner cylinder body for installing the striking mechanism therein; and an outer cylinder arranged outside the inner cylinder, such that the air chamber is formed between the outer cylinder and the inner cylinder; an inflatable member disposed on the energy storage member and configured to inflate the air chamber; and a pressure relief member disposed on the energy storage member and configured to release the pressure in the air chamber.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 19, 2024
    Inventors: Zaijun ZHU, Mingjun Yang, Yunzai Zhang, Hongfeng Zhou, Tao Yang, Haijun Li
  • Patent number: 12169675
    Abstract: Techniques for generating one or more non-final layouts for an analog integrated circuit are disclosed. The techniques include generating a non-final layout of an analog integrated circuit based on device specifications, partitioning the non-final layout into a plurality of subcells, merging the verified sub-cells to form a merged layout of the analog integrated circuit, and performing quality control checks on the merged layout. Additionally or alternatively, generating the non-final layout can include determining an allowable spacing between adjacent cells of different cell types or inserting one or more filler cells into a filler zone in the non-final layout.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: December 17, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Tao Yang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang
  • Publication number: 20240409149
    Abstract: The present disclosure relates to a child carrier. The child carrier includes a frame, a handle and a seat support member. The handle is pivotally connected to the frame, the seat support member is configured to support a seat, the handle is capable of rotating relative to the frame to drive the seat support member to move relative to the frame from a first position to a second position.
    Type: Application
    Filed: October 19, 2022
    Publication date: December 12, 2024
    Applicant: Wonderland Switzerland AG
    Inventors: Erxue WANG, Tao YANG
  • Publication number: 20240408732
    Abstract: A driving mechanism and a nail gun having the same. The driving mechanism comprises a striking mechanism comprising a striker for striking nails out of the nail gun along a striking direction for nailing; an energy storage mechanism coupled with the striking mechanism for providing energy to drive the striking mechanism to move along the striking direction, and storing energy when the striking mechanism is driven to move in an opposite direction of the striking direction; and a transmission mechanism coupled with a driving motor and the striking mechanism for driving the striking mechanism to move in the opposite direction of the striking direction for storing energy. The transmission mechanism comprises a transmission member configured to drive the striker to move in the opposite direction of the striking direction; and a limiting member configured to operably prevent the striker from moving in the striking direction when storing energy.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 12, 2024
    Inventors: Zaijun Zhu, Mingjun Yang, Hongfeng Zhou, Yunzai Zhang, Tao Yang, Haijun LI
  • Publication number: 20240408733
    Abstract: A transmission member and an anti-jamming assembly and a nail gun having the same. The transmission member comprises a rotating member configured to be driven by a driving motor to rotate, and an engaging part arranged on the rotating member. The rotating member has a plurality of pin mounting holes having at least one movable pin mounting hole. The engaging part comprises a plurality of engaging pins installed in the plurality of pin mounting holes. The plurality of engaging pins comprises at least one movable engaging pin moveably installed in at least one movable pin mounting hole. Two adjacent engaging pins define a gap therebetween. The anti-jamming assembly comprises a striker configured to strike nails out of the nail gun along a striking direction for nailing; and the transmission member coupled with the striker for driving the striker to move in a direction opposite to the striking direction.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 12, 2024
    Inventors: Tao Yang, Mingjun Yang, Zaijun Zhu, Yunzai Zhang, Hongfeng Zhou, Haijun Li
  • Patent number: D1057233
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: January 7, 2025
    Assignee: HASCO VISION TECHNOLOGY CO., LTD.
    Inventors: Tao Yang, Qiyi Wang, Shilei Yan, He Zhu, Wenhui Sang
  • Patent number: D1061062
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: February 11, 2025
    Assignee: Anji Younike Furniture Co., Ltd.
    Inventor: Tao Yang