Abstract: A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face and including a first trench, a second trench having a distance of 100 nm or less from the first trench, a first silicon carbide region of n-type, a second silicon carbide region of p-type between the first trench and the second trench, a third silicon carbide region of n-type between the second silicon carbide region and the first face, a fourth silicon carbide region between the first trench and the second silicon carbide region and containing oxygen, and a fifth silicon carbide region between the second trench and the second silicon carbide region and containing oxygen; a first gate electrode in the first trench; a second gate electrode in the second trench; a first gate insulating layer; a second gate insulating layer; a first electrode; and a second electrode.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type including a first portion and a second portion, a second semiconductor layer of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode located between the second semiconductor region and the fourth semiconductor region and between the third semiconductor region and the fourth semiconductor region in a second direction, a first insulating region, a third electrode, and a second insulating region.

Abstract: A semiconductor device of embodiments includes: a silicon carbide layer having a first face having an off angle equal to or more than 0° and equal to or less than 8° with respect to a {0001} face and a second face facing the first face and having a 4H-SiC crystal structure; a gate electrode extending in a first direction parallel to the first face; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. Assuming that a first reference length in the first direction is 0.5 ?m, a surface roughness of a surface of the silicon carbide layer in a range of the first reference length is equal to or less than 1 nm.

Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3, and a carbon concentration at the position is equal to or less than 1×1018 cm?3.

Abstract: A semiconductor device manufacturing method of embodiments includes: performing first ion implantation for implanting aluminum into a silicon carbide layer with a first dose amount; performing first heat treatment at a temperature equal to or more than 1600° C.; performing first etching process for etching a surface of the silicon carbide layer in an atmosphere containing plasma generated from a gas containing halogen and oxygen; performing second etching process for etching the surface in an atmosphere containing hydrogen plasma or atomic hydrogen; forming a silicon oxide film on the surface; and forming a gate electrode on the silicon oxide film.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor region, a second semiconductor region, a first nitride region, and a first insulating member. The first semiconductor region includes Alx1Ga1-x1N (0?x1<1). The second semiconductor region including Alx2Ga1-x2N (0<x2<1, x1<x2). The first nitride region includes Alz1Ga1-z1N (0<z1?1, x2<z1). The first nitride region includes a first nitride portion. The first nitride portion includes a first position. The first position is a center of the first nitride portion. The third partial region of the first semiconductor region includes a first face facing the first nitride portion. A chlorine concentration at the first position is lower than a chlorine concentration at the first face.

Abstract: A semiconductor device includes first to third conductive portions, a first insulating portion, and a semiconductor portion. The semiconductor portion includes a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the first insulating region. The second conductive portion includes a first conductive region in Schottky junction with the first semiconductor region, and a second conductive region in Schottky junction with the second semiconductor region. When the first conductivity-type is an n-type, a work function of the first conductive region is smaller than a work function of the second conductive region. When the first conductivity-type is a p-type, the work function of the first conductive region is larger than the work function of the second conductive region.

Abstract: A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face opposite to the first face, and including a p-type silicon carbide region in contact with the first face, a percentage of a first silicon atom among a plurality of silicon atoms present in a first layer as an uppermost layer being equal to or more than 90% and a site position of the first silicon atom being different from a site position of a silicon atom in a third layer from the first face and the same as a site position of a silicon atom in a fifth layer from the first face; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer including nitrogen.

Abstract: According to one embodiment, a semiconductor device includes a base, a first silicon carbide region, and a second silicon carbide region. The first silicon carbide region includes at least one selected from the group consisting of nitrogen, phosphorus and arsenic. The second silicon carbide region includes at least one selected from the group consisting of boron, aluminum and gallium. The first silicon carbide region is provided between the base and the second silicon carbide region. At least a part of the first silicon carbide region includes fluorine.

Abstract: According to one embodiment, a semiconductor device include first to third electrode, a semiconductor member, a first conductive member, and a first insulating member. A second insulating region of the first insulating member includes a first face facing the third partial region of the first semiconductor region. The third insulating region of the first insulating member includes a second face facing the third partial region of the first semiconductor region. The first face includes a first end on a side of the first electrode in the first direction. The second face includes a second end on a side of the second electrode in the first direction. A second position of the second end in the second direction is different from a first position of the first end in the second direction.

Abstract: A dynamic range is extended while suppressing an increase in a chip area. A biological sample analyzer of the present disclosure includes: a first semiconductor photodetection element that detects first light generated by irradiation of a biological sample and generates a first signal; a second semiconductor photodetection element that detects second light reflected by the first semiconductor photodetection element among the first light and generates a second signal; and a processing circuit that acquires information regarding the first light on the basis of the first signal and the first signal.

Abstract: A semiconductor device of an embodiment includes a first gallium nitride region being an n-type semiconductor, and a second gallium nitride region in contact with the first gallium nitride region, the second gallium nitride region being metal, the second gallium nitride region containing a first element being at least one element selected from a group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, V, Nb, Ta, Li, Na, K, Rb, Ce, and Zn.

Abstract: A semiconductor device of an embodiment includes a first nitride region being nitride selected from aluminum gallium nitride and aluminum nitride, the first nitride region being an n-type semiconductor, and a second gallium nitride region in contact with the first nitride region, the second gallium nitride region being the nitride, the second gallium nitride region being metal, the second gallium nitride region containing a first element being at least one element selected from a group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, V, Nb, Ta, Li, Na, K, Rb, Ce, and Zn.

Abstract: A semiconductor device of an embodiment includes a SiC layer including a first face parallel to first direction and second direction perpendicular to the first direction, a trench extending in the first direction, a gate electrode, an n-type first SiC region, a p-type second SiC region between the first SiC region and the trench, extending in the second direction, an n-type third SiC region extending in the second direction, and alternately and repeatedly provided with the second SiC region in the first direction, a p-type fourth SiC region between the third SiC region and the first face, an n-type fifth SiC region between the fourth SiC region and the first face. The first face is inclined with respect to a (0001) face by 0.1 to 8 degrees in a <11-20> direction, and the first direction is along the <11-20> direction, and the second direction is along a <1-100> direction.

Abstract: A semiconductor device of an embodiment includes a silicon carbide layer including a first face parallel to a first direction, a first trench and a second trench extending in the first direction, a first gate electrode in the first trench, a second gate electrode in the second trench, an n-type first silicon carbide region, a p-type second silicon carbide region between the first silicon carbide region and the first face, an n-type third silicon carbide region between the second silicon carbide region and the first face, a p-type fourth silicon carbide region at a bottom of the first trench, and a fifth silicon carbide region at a bottom of the second trench. A width of the fourth silicon carbide region is less than a width of the first trench, and a length of the fourth silicon carbide region is more than the width of the fourth silicon carbide region.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer, a silicon oxide layer having a peak frequency of a longitudinal wave optical mode of 1245 cm?1 or more at a position 0.5 nm away from the silicon carbide layer, and a region located between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration of 1×1021 cm?3 or more. The concentration distribution of nitrogen in the silicon carbide layer, the silicon oxide layer, and the region has a peak in the region.

Abstract: A method of manufacturing a semiconductor device according to an embodiment includes: forming a mask material having an opening on a surface of a silicon carbide layer; forming a trench in the silicon carbide layer using the mask material as a mask; performing first ion implantation for implanting carbon (C) into a bottom face of the trench using the mask material as a mask; forming a sidewall material on a side face of the trench; performing second ion implantation for implanting a p-type first impurity into the bottom face of the trench using the sidewall material as a mask; and performing heat treatment at 1600° C. or more.

Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a metal layer; and a conductive layer positioned between the silicon carbide layer and the metal layer, the conductive layer containing a silicide of one metal element (M) selected from the group consisting of nickel (Ni), palladium (Pd), and platinum (Pt), and the conductive layer having a carbon concentration of 1×1017 cm?3 or less.

Abstract: According to one embodiment, a semiconductor device includes a silicon carbide member, a first member, a first layer, and a second layer. The silicon carbide member includes a first region. The first member includes silicon and oxygen. The first layer is provided between the first region and the first member. The first layer includes a bond between silicon and nitrogen. The second layer is provided between the first layer and the first member. The second layer includes a bond between silicon and oxygen and a bond between silicon and nitrogen.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.