Patents by Inventor Tatsuya Nishiwaki

Tatsuya Nishiwaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998437
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·?m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pr
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: May 4, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya Ohguro, Tatsuya Nishiwaki, Hideharu Kojima, Yoshiharu Takada, Kikuo Aida, Kentaro Ichinoseki, Kohei Oasa, Shingo Sato
  • Patent number: 10971621
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 6, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Publication number: 20210083103
    Abstract: A semiconductor device includes a semiconductor part, a first electrode, a plurality of control electrodes and a second electrode. The semiconductor part has a plurality of first trenches and a second trench. The plurality of first trenches are spaced from each other and arranged around the second trench. The first electrode is provided above the semiconductor part. The first electrode is provided over the plurality of first trenches and the second trench. The control electrodes are provided in the first trenches, respectively. The control electrodes each are electrically isolated from the semiconductor part by a first insulating film. The second electrode is provided in the second trench. The second electrode is electrically isolated from the semiconductor part by a second insulating film and electrically connected to the first electrode.
    Type: Application
    Filed: March 9, 2020
    Publication date: March 18, 2021
    Inventors: Hiroaki Katou, Kenya Kobayashi, Tatsuya Nishiwaki
  • Publication number: 20210083108
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second electrode, a gate electrode, second semiconductor regions of a second conductivity type, third semiconductor regions of the first conductivity type, and a third electrode. The second electrode is provided in a plurality in second and third directions. Each second electrode opposes a portion of the first semiconductor region in the second and third directions with an insulating layer interposed. The gate electrode is provided around each second electrode. The first semiconductor region includes first regions provided respectively around the second electrodes and the second region provided around the first regions in the second and third directions. Impurity concentration of the first conductivity type in each of the first regions is higher than impurity concentration of the first conductivity type in the second region.
    Type: Application
    Filed: March 12, 2020
    Publication date: March 18, 2021
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Shingo Sato
  • Publication number: 20210074848
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Application
    Filed: March 5, 2020
    Publication date: March 11, 2021
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20210057575
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a first insulating portion, a second electrode, a gate electrode, a second insulating portion, and a third electrode. The second electrode is provided inside the first insulating portion, and includes a portion opposing the first semiconductor region in the second direction. The gate electrode is provided inside the first insulating portion and opposes the second semiconductor region with a gate insulating layer interposed in the second direction. The second insulating portion is linked to the first insulating portion. The third electrode is electrically connected to the second semiconductor region, and the third semiconductor region.
    Type: Application
    Filed: February 18, 2020
    Publication date: February 25, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tatsuya NISHIWAKI
  • Publication number: 20210057574
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a metal-including portion being conductive, an insulating portion, a gate electrode, a second electrode, a first interconnect layer, and a second interconnect layer. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region and the metal-including portion are provided on portions of the second semiconductor region. The insulating portion is arranged in a second direction with the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region. The gate electrode and the second electrode are provided inside the insulating portion. The first interconnect layer is electrically connected to the gate electrode.
    Type: Application
    Filed: February 4, 2020
    Publication date: February 25, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Hiroaki KATOU, Kenya KOBAYASHI, Tsuyoshi KACHI
  • Publication number: 20200295150
    Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer having; a second semiconductor layer being provided on the first semiconductor layer; a third semiconductor layer being provided on the second semiconductor layer; a fourth semiconductor layer being provided on the third semiconductor layer; a field plate electrode provided in a trench via a first insulating film, the trench provided in the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer; a first electrode provided in the trench to face the third semiconductor layer via a third insulating film; and a second insulating film provided in the trench to be interposed by the first electrodes and having a first portion, the first portion being interposed by lower ends of the first electrodes and having a width wider than a width of a second portion interposed by centers of the first electrodes.
    Type: Application
    Filed: August 1, 2019
    Publication date: September 17, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya NISHIWAKI, Kentaro ICHINOSEKI, Hiroaki KATOU, Toshifumi NISHIGUCHI
  • Publication number: 20200295180
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro ICHINOSEKI, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Patent number: 10763352
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 1, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kohei Oasa, Kikuo Aida
  • Publication number: 20200266293
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Application
    Filed: August 16, 2019
    Publication date: August 20, 2020
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Patent number: 10707312
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 7, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Publication number: 20200152785
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pro
    Type: Application
    Filed: August 5, 2019
    Publication date: May 14, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya OHGURO, Tatsuya NISHIWAKI, Hideharu KOJIMA, Yoshiharu TAKADA, Kikuo AIDA, Kentaro ICHINOSEKI, Kohei OASA, Shingo SATO
  • Patent number: 10651276
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: May 12, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Hung Hung, Kikuo Aida, Kentaro Ichinoseki
  • Publication number: 20200091338
    Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer of a first conductive type; a second semiconductor layer of the first conductive type, being provided on the first semiconductor layer and including a first trench, a plurality of holes, a plurality of second trenches, and a plurality of third trenches; a first semiconductor region of a second conductive type, being provided on the second semiconductor layer; a second semiconductor region of the first conductive type, being provided on the first semiconductor region; a first electrode electrically connected to the second semiconductor region; a second electrode disposed in the first trench via a first insulation film; a plurality of first field plate electrodes having a column shape, being electrically connected to the first electrode, interposing the second electrode, and being disposed in the holes via a second insulation film; a plurality of third electrodes extending from ends of the first insulation films in a first direction t
    Type: Application
    Filed: March 11, 2019
    Publication date: March 19, 2020
    Inventor: Tatsuya Nishiwaki
  • Patent number: 10593793
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Kikuo Aida, Hung Hung
  • Publication number: 20190296116
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 26, 2019
    Inventors: Hiroshi MATSUBA, Hung HUNG, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Publication number: 20190288103
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Application
    Filed: September 10, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Kikuo AIDA, Hung HUNG
  • Publication number: 20190288071
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Hung HUNG, Kikuo AIDA, Kentaro ICHINOSEKI
  • Patent number: 10403768
    Abstract: A semiconductor device includes an anode electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a conductive portion and a cathode electrode. The first semiconductor region is electrically connected to the anode electrode. The second semiconductor region is provided on the first semiconductor region. The conductive portion is provided in the first semiconductor region and the second semiconductor region with an insulating layer interposed between the conductive portion and the first and second semiconductor regions. The cathode electrode is electrically connected to the conductive portions and is electrically isolated from the second semiconductor region.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: September 3, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tatsuya Nishiwaki