Abstract: A semiconductor device according to an embodiment, includes a source electrode, a drain electrode arranged apart from the source electrode, an oxide semiconductor film, a gate dielectric film, and a gate electrode. The oxide semiconductor film is arranged below the source electrode and the drain electrode to connect the source electrode and the drain electrode. The gate dielectric film is formed below the oxide semiconductor film such that a thickness below at least one of the source electrode and the drain electrode is made thinner than a thickness below a channel region of the oxide semiconductor film between the source electrode and the drain electrode. The gate electrode is arranged below the gate dielectric film and formed in a position where one of portions of the gate electrode overlaps with the source electrode and another one of the portions of the gate electrode overlaps with the drain electrode.

Abstract: According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.

Abstract: In one embodiment, a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich a gate electrode, a diffusion layer of the second conductivity type coming in contact with the first and second element isolation insulator films and having an upper surface in a position deeper than lower surfaces of the first and second main terminal regions, a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer. The second well region has a impurity concentration higher than that of the first well region.

Abstract: In general, according to one embodiment, a semiconductor device includes a first electrode, an oxide semiconductor film, an insulating film, a second electrode, a third electrode. The oxide semiconductor film is configured together with a first region, a second region, a third region, a fourth region, and a fifth region in one direction. The insulating film is provided between the first electrode and the oxide semiconductor film. The second electrode is provided on the second region and contacts the second region with an entire upper face of the second region as a contact face. The third electrode is provided on the fourth region and contacts the fourth region with an entire upper face of the fourth region as a contact face. The oxygen concentrations in the second region and in the fourth region are less than the oxygen concentration in the third region.

Abstract: Fins of semiconductor are formed on the substrate. Each of the fins is located separately from one another. A gate insulating film is formed on side surfaces of the fins. A gate electrode is formed on the gate insulating film. The gate electrode extends to cross over the fins. A gate contact portion is provided to supply an electric signal. In the fins, first drain regions and first source regions are formed respectively so as to sandwich portions of the fins located below the gate electrode. A width of first one of the fins is larger than that of second one of the fins which is more distant from the gate contact portion than the first one of the fins.

Abstract: In general, according to one embodiment, a semiconductor device includes a first electrode, an oxide semiconductor film, an insulating film, a first protective film, second and third electrodes. The oxide semiconductor film is provided on the first electrode. The oxide semiconductor film includes a first face on the first electrodes side and a second face on a side opposite to the first face. The insulating film is provided between the first electrode and the oxide semiconductor film. The first protective film includes a first film provided between the insulating film and the first face and a second film provided on the second face. The first protective film suppresses substances including hydrogen from being introduced from an outer side of the oxide semiconductor film to an inner side of the oxide semiconductor film. The second electrode and the third electrode are electrically connected to the oxide semiconductor film.

Abstract: In one embodiment, a semiconductor device includes a substrate, and a gate electrode provided on the substrate via a gate insulator. The device further includes a source region of a first conductivity type and a drain region of a second conductivity type provided in the substrate to sandwich the gate electrode, and a channel region provided between the source and drain regions in the substrate. The gate insulator includes a first insulator portion having a first edge which is positioned on the source region and is parallel to a channel-width direction, and a second edge which is positioned on the channel or source region and is parallel to the channel-width direction, and having a first thickness. The gate insulator further includes a second insulator portion positioned on a drain region side with respect to the first insulator portion, and having a second thickness greater than the first thickness.

Abstract: According to one embodiment, a thin-film transistor includes a thin-film semiconductor layer, a first gate electrode provided on the thin-film semiconductor layer through a first gate insulation film without overlapping an edge portion of the thin-film semiconductor layer, a source layer connected to the thin-film semiconductor layer, and a drain layer connected to the thin-film semiconductor layer.

Abstract: According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.

Abstract: A manufacturing method for a hollow sealing structure, includes, a process for filling a recessed portion in a principal surface of a substrate with a first sacrificial layer, a process for forming a functional element portion on the principal surface of the substrate, a process for forming a second sacrificial layer on the functional element portion so as to be connected to a part of the first sacrificial layer, a process for forming a covering portion over respective surfaces of the first and second sacrificial layers, a process for circulating a fluid for sacrificial layer removal through an opening in the covering portion in contact with the first sacrificial layer, thereby removing the first and second sacrificial layers, and a process for closing the opening.

Abstract: In one embodiment, a semiconductor device includes a substrate, and a gate electrode provided on the substrate via a gate insulator. The device further includes a source region of a first conductivity type and a drain region of a second conductivity type provided in the substrate to sandwich the gate electrode, and a channel region provided between the source and drain regions in the substrate. The gate insulator includes a first insulator portion having a first edge which is positioned on the source region and is parallel to a channel-width direction, and a second edge which is positioned on the channel or source region and is parallel to the channel-width direction, and having a first thickness. The gate insulator further includes a second insulator portion positioned on a drain region side with respect to the first insulator portion, and having a second thickness greater than the first thickness.

Abstract: A semiconductor device according to one embodiment includes: a substrate; a plurality of fins made of a semiconductor and formed on the substrate; a plurality of via contact regions formed between the fins, the plurality of via contact regions and the plurality of the fins constituting a closed loop structure; a gate contact region on the substrate arranged at a position surrounded by the closed loop structure; a plurality of gate electrodes connected to the gate contact region respectively, each of the plurality of gate electrodes sandwiching both side faces of each of the plurality of fins between its opposite regions via gate insulating film; and source/drain regions formed in regions in the plurality of fins and in the contact region, the regions being formed on both sides of a region sandwiched by the gate electrodes along longitudinal direction of the fin.

Abstract: According to the embodiments, a solid-state imaging device is provided, which includes a first electrode film, a first photoelectric conversion film, a first conductive film, a dielectric film, a second photoelectric conversion film, and a second conductive film. The first photoelectric conversion film covers the surface and the side of the first electrode film. The first conductive film covers the light receiving surface and the side of the first photoelectric conversion film. The dielectric film covers a portion corresponding to the side of the first photoelectric conversion film in the first conductive film. The second photoelectric conversion film covers a main portion of a portion corresponding to the light receiving surface of the first photoelectric conversion film in the first conductive film. The second conductive film covers the light receiving surface and the side of the second photoelectric conversion film.

Abstract: The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.

Abstract: A manufacturing method for a hollow sealing structure, includes, a process for filling a recessed portion in a principal surface of a substrate with a first sacrificial layer, a process for forming a functional element portion on the principal surface of the substrate, a process for forming a second sacrificial layer on the functional element portion so as to be connected to a part of the first sacrificial layer, a process for forming a covering portion over respective surfaces of the first and second sacrificial layers, a process for circulating a fluid for sacrificial layer removal through an opening in the covering portion in contact with the first sacrificial layer, thereby removing the first and second sacrificial layers, and a process for closing the opening.

Abstract: A manufacturing method for a hollow sealing structure, includes, a process for filling a recessed portion in a principal surface of a substrate with a first sacrificial layer, a process for forming a functional element portion on the principal surface of the substrate, a process for forming a second sacrificial layer on the functional element portion so as to be connected to a part of the first sacrificial layer, a process for forming a covering portion over respective surfaces of the first and second sacrificial layers, a process for circulating a fluid for sacrificial layer removal through an opening in the covering portion in contact with the first sacrificial layer, thereby removing the first and second sacrificial layers, and a process for closing the opening.

Abstract: A semiconductor device has a plurality of fins formed on a semiconductor substrate to be separated from each other, a first contact region which connects commonly one end side of the plurality of fins, a second contact region which connects commonly the other end side of the plurality of fins, a gate electrode arranged to be opposed to at least both side surfaces of the plurality of fins by sandwiching a gate insulating film therebetween, a source electrode including the first contact region and the plurality of fins on a side closer to the first contact region than the gate electrode, and a drain electrode including the second contact region and the plurality of fins on a side closer to the second contact than the gate electrode. The ratio Rd/Rs of a resistance Rd of each fin in the drain region to a resistance Rs of each fin in the source region is larger than 1.

Abstract: A semiconductor device includes: a first region, a second region and a third region surrounding the second region; an integrated circuit including an active element in the first region and provided in and above a first substrate; an antenna which is provided in the second region, connected to the integrated circuit and configured to receive or transmit a high-frequency signal; and a first shield layer which is grounded and includes a stack of a plurality of conductive layers in the third region.

Abstract: A semiconductor wafer includes a semiconductor bulk; a first insulating layer formed on the semiconductor bulk; a first semiconductor layer formed on the first insulating layer; a second insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the second insulating layer.

Abstract: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode provided in a lower part of the cavity, an actuator provided in an upper part or inside of the cavity, an upper electrode connected to the actuator, and a conductive layer in contact with the lower electrode outside the cavity via a contact hole whose bottom face is provided above an upper face of the lower electrode in the cavity.